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arm: dts: k3-j721e-r5-common-proc-board: Fix OSPI spi-tx-bus-width 

spi-tx-bus-width is set as 8 in SoM dtsi, but set to 1 in R5 common
proc board dts, which seems wrong. SPI NOR requires a 8D reset before
probe starts using 0x66+0x99 op, but that will fail if the flash tx
width is set as 1.

Set spi-tx-bus-width to 8 in R5 common proc board dtsi also.

Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com>
This commit is contained in:
Apurva Nandan 2023-10-18 03:05:35 +05:30 committed by Udit Kumar
parent 0e0a8065a2
commit 8ef4b6ee68
1 changed files with 1 additions and 1 deletions
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arch/arm/dts/k3-j721e-r5-common-proc-board.dts
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@ -358,7 +358,7 @@
flash@0{
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-tx-bus-width = <8>;
spi-rx-bus-width = <8>;
spi-max-frequency = <50000000>;
cdns,tshsl-ns = <60>;