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misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms 

QMAN_BAR{E} register setup was disabled on ARM platforms, however the
register does need to be set. Enable the code also on ARMs and fix the
CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly
enabled code works.

Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Laurentiu Tudor 2018-08-09 15:19:44 +03:00 committed by York Sun
parent 5bdfdb7d4f
commit 92d2e89c8c
2 changed files with 1 additions and 4 deletions
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3
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
View File

@ -57,8 +57,7 @@
#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0x3E80 #define CONFIG_SYS_BMAN_SWP_ISDR_REG 0x3E80
#define CONFIG_SYS_QMAN_NUM_PORTALS 10 #define CONFIG_SYS_QMAN_NUM_PORTALS 10
#define CONFIG_SYS_QMAN_MEM_BASE 0x500000000 #define CONFIG_SYS_QMAN_MEM_BASE 0x500000000
#define CONFIG_SYS_QMAN_MEM_PHYS (0xf00000000ull + \ #define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE
CONFIG_SYS_QMAN_MEM_BASE)
#define CONFIG_SYS_QMAN_MEM_SIZE 0x08000000 #define CONFIG_SYS_QMAN_MEM_SIZE 0x08000000
#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x10000 #define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x10000
#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x10000 #define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x10000

2
drivers/misc/fsl_portals.c
View File

@ -24,7 +24,6 @@ void setup_qbman_portals(void)
CONFIG_SYS_BMAN_SWP_ISDR_REG; CONFIG_SYS_BMAN_SWP_ISDR_REG;
void __iomem *qpaddr = (void *)CONFIG_SYS_QMAN_CINH_BASE + void __iomem *qpaddr = (void *)CONFIG_SYS_QMAN_CINH_BASE +
CONFIG_SYS_QMAN_SWP_ISDR_REG; CONFIG_SYS_QMAN_SWP_ISDR_REG;
#ifdef CONFIG_PPC
struct ccsr_qman *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR; struct ccsr_qman *qman = (void *)CONFIG_SYS_FSL_QMAN_ADDR;
/* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */ /* Set the Qman initiator BAR to match the LAW (for DQRR stashing) */
@ -32,7 +31,6 @@ void setup_qbman_portals(void)
out_be32(&qman->qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32)); out_be32(&qman->qcsp_bare, (u32)(CONFIG_SYS_QMAN_MEM_PHYS >> 32));
#endif #endif
out_be32(&qman->qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS); out_be32(&qman->qcsp_bar, (u32)CONFIG_SYS_QMAN_MEM_PHYS);
#endif
#ifdef CONFIG_FSL_CORENET #ifdef CONFIG_FSL_CORENET
int i; int i;