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mmc: zynq: parse dt when probing 

Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Benedikt Grassl 2020-04-14 07:32:12 +02:00 committed by Michal Simek
parent d202f67db0
commit 942b5fc032
3 changed files with 7 additions and 12 deletions
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3
drivers/mmc/sdhci.c
View File

@ -839,8 +839,7 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
cfg->host_caps &= ~MMC_MODE_HS_52MHz; cfg->host_caps &= ~MMC_MODE_HS_52MHz;
} }
if (!(cfg->voltages & MMC_VDD_165_195) || if (!(cfg->voltages & MMC_VDD_165_195))
(host->quirks & SDHCI_QUIRK_NO_1_8_V))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50); SDHCI_SUPPORT_DDR50);

15
drivers/mmc/zynq_sdhci.c
View File

@ -22,14 +22,12 @@ DECLARE_GLOBAL_DATA_PTR;
struct arasan_sdhci_plat { struct arasan_sdhci_plat {
struct mmc_config cfg; struct mmc_config cfg;
struct mmc mmc; struct mmc mmc;
unsigned int f_max;
}; };
struct arasan_sdhci_priv { struct arasan_sdhci_priv {
struct sdhci_host *host; struct sdhci_host *host;
u8 deviceid; u8 deviceid;
u8 bank; u8 bank;
u8 no_1p8;
}; };
#if defined(CONFIG_ARCH_ZYNQMP) #if defined(CONFIG_ARCH_ZYNQMP)
@ -238,8 +236,11 @@ static int arasan_sdhci_probe(struct udevice *dev)
host->quirks |= SDHCI_QUIRK_BROKEN_HISPD_MODE; host->quirks |= SDHCI_QUIRK_BROKEN_HISPD_MODE;
#endif #endif
if (priv->no_1p8) plat->cfg.f_max = CONFIG_ZYNQ_SDHCI_MAX_FREQ;
host->quirks |= SDHCI_QUIRK_NO_1_8_V;
ret = mmc_of_parse(dev, &plat->cfg);
if (ret)
return ret;
host->max_clk = clock; host->max_clk = clock;
@ -247,7 +248,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
host->mmc->dev = dev; host->mmc->dev = dev;
host->mmc->priv = host; host->mmc->priv = host;
ret = sdhci_setup_cfg(&plat->cfg, host, plat->f_max, ret = sdhci_setup_cfg(&plat->cfg, host, plat->cfg.f_max,
CONFIG_ZYNQ_SDHCI_MIN_FREQ); CONFIG_ZYNQ_SDHCI_MIN_FREQ);
if (ret) if (ret)
return ret; return ret;
@ -258,7 +259,6 @@ static int arasan_sdhci_probe(struct udevice *dev)
static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
{ {
struct arasan_sdhci_plat *plat = dev_get_platdata(dev);
struct arasan_sdhci_priv *priv = dev_get_priv(dev); struct arasan_sdhci_priv *priv = dev_get_priv(dev);
priv->host = calloc(1, sizeof(struct sdhci_host)); priv->host = calloc(1, sizeof(struct sdhci_host));
@ -277,10 +277,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1); priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1);
priv->bank = dev_read_u32_default(dev, "xlnx,mio_bank", -1); priv->bank = dev_read_u32_default(dev, "xlnx,mio_bank", -1);
priv->no_1p8 = dev_read_bool(dev, "no-1-8-v");
plat->f_max = dev_read_u32_default(dev, "max-frequency",
CONFIG_ZYNQ_SDHCI_MAX_FREQ);
return 0; return 0;
} }

1
include/sdhci.h
View File

@ -243,7 +243,6 @@
#define SDHCI_QUIRK_BROKEN_HISPD_MODE BIT(5) #define SDHCI_QUIRK_BROKEN_HISPD_MODE BIT(5)
#define SDHCI_QUIRK_WAIT_SEND_CMD (1 << 6) #define SDHCI_QUIRK_WAIT_SEND_CMD (1 << 6)
#define SDHCI_QUIRK_USE_WIDE8 (1 << 8) #define SDHCI_QUIRK_USE_WIDE8 (1 << 8)
#define SDHCI_QUIRK_NO_1_8_V (1 << 9)
/* to make gcc happy */ /* to make gcc happy */
struct sdhci_host; struct sdhci_host;