From 9cfcded5988b46aeba5bed2c0c21bb7dc53f5cb5 Mon Sep 17 00:00:00 2001 From: Rene Straub Date: Wed, 7 Feb 2018 16:01:58 +0100 Subject: [PATCH] nrhw20: cleanup board file - remove porting nbhw16 code options - cleanup --- board/nm/nrhw20/board.c | 235 +++++++++++----------------------------- board/nm/nrhw20/board.h | 6 - board/nm/nrhw20/mux.c | 219 ------------------------------------- 3 files changed, 63 insertions(+), 397 deletions(-) diff --git a/board/nm/nrhw20/board.c b/board/nm/nrhw20/board.c index 78e14cd809..4184218816 100644 --- a/board/nm/nrhw20/board.c +++ b/board/nm/nrhw20/board.c @@ -29,12 +29,9 @@ #include #include #include -#include -#include -#include #include #include -#include + #include "../common/bdparser.h" #include "../common/board_descriptor.h" #include "board.h" @@ -50,7 +47,7 @@ DECLARE_GLOBAL_DATA_PTR; #define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio)) /* - * NRHW 20 GPIOs + * CPU GPIOs * * GPIO0_2: RST_GNSS~ * GPIO0_3: GEOFENCE_GNSS @@ -98,6 +95,21 @@ DECLARE_GLOBAL_DATA_PTR; #define NETBIRD_GPIO_DIG_OUT GPIO_TO_PIN(1, 14) #define NETBIRD_GPIO_DIG_IN GPIO_TO_PIN(1, 15) +/* + * PMIC GPIOs + * + * GPIO_7: EN_SUPPLY_GSM + * GPIO_8: VOLTAGE_SEL_PCIe + * GPIO_9: EN_SUPPLY_PCIe + * GPIO_10: LED0.RD~ + * GPIO_11: LED0.GN~ + */ + +#define PMIC_GSM_SUPPLY_EN_IO 7 +#define PMIC_PCIe_SUPPLY_VSEL_IO 8 +#define PMIC_PCIe_SUPPLY_EN_IO 9 +#define PMIC_LED0_RED 10 +#define PMIC_LED0_GREEN 11 #define DDR3_CLOCK_FREQUENCY (400) @@ -107,6 +119,7 @@ DECLARE_GLOBAL_DATA_PTR; static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; #endif + #define BD_EEPROM_ADDR (0x50) /* CPU BD EEPROM (8kByte) is at 50 (A0) */ #define BD_ADDRESS (0x0000) /* Board descriptor at beginning of EEPROM */ #define PD_ADDRESS (0x0200) /* Product descriptor */ @@ -125,10 +138,6 @@ static int _bd_init(void) old_bus = i2c_get_bus_num(); i2c_set_bus_num(2); - /* TODO: Do only once in board_init */ -/* - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); -*/ if (bd_get_context(&bdctx[0], BD_EEPROM_ADDR, BD_ADDRESS) != 0) { printf("%s() no valid bd found\n", __func__); return -1; @@ -221,6 +230,7 @@ int spl_start_uboot(void) #endif #define OSC (V_OSCK/1000000) + /* TODO: Rename */ struct dpll_params dpll_ddr_nbhw16= { DDR3_CLOCK_FREQUENCY, OSC-1, 1, -1, -1, -1, -1}; @@ -236,19 +246,9 @@ void am33xx_spl_board_init(void) /* Set CORE Frequencies to OPP100 (600MHz) */ do_setup_dpll(&dpll_core_regs, &dpll_core_opp100); - /* TODO: Check PMIC settings */ + /* TODO: Check PMIC settings if required */ -#if 0 - /* Clear th PFM Flag on DCDC4 */ - if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, TPS65218_DCDC4, 0x00, 0x80)) { - puts ("tps65218_reg_write failure (DCDC4 clear PFM Flag)\n"); - }; - /* Disable DCDC2 because it is not used and could make noise */ - if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, TPS65218_ENABLE1, 0, 0x02)) { - puts ("tps65218_reg_write failure (DCDC2 disable)\n"); - }; -#endif /* Set MPU Frequency to what we detected now that voltages are set */ do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100); @@ -267,6 +267,7 @@ const struct dpll_params *get_dpll_ddr_params(void) void set_uart_mux_conf(void) { enable_uart0_pin_mux(); + /* TODO: ?? */ /* disable_uart0_pin_mux(); */ /* enable_uart1_pin_mux(); */ } @@ -325,8 +326,6 @@ err_free_gpio: #define REQUEST_AND_CLEAR_GPIO(N) request_and_set_gpio(N, #N, 0); -#ifndef NRHW20_ON_HW16_MODE - static void request_input_gpio(int gpio, const char *name, int value) { int ret; @@ -351,7 +350,6 @@ err_free_gpio: #define REQUEST_INPUT_GPIO(N) request_input_gpio(N, #N, 0); -#endif #if !defined(CONFIG_SPL_BUILD) @@ -359,7 +357,7 @@ err_free_gpio: /* TODO: Redesign to use PMIC input */ static int check_reset_button(void) { -#ifdef NRHW20_ON_HW16_MODE +#if 0 int counter = 0; int ret; @@ -444,53 +442,12 @@ static int check_reset_button(void) } #endif -static void enable_ext_usb(void) -{ -#ifdef NRHW20_ON_HW16_MODE - REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_USB_PWR_EN); - REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_USB_PWR_EN_2); - - /* Disable LS2 */ - if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, TPS65218_ENABLE2, 0x00, 0x04)) { - puts ("tps65218_reg_write failure (LS2 enable)\n"); - }; - - /* Discharge LS2 to have proper 0V at the output */ - if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, TPS65218_CONFIG3, 0x02, 0x02)) { - puts ("tps65218_reg_write failure (LS2 discharge)\n"); - }; - - mdelay(10); - - gpio_set_value(NETBIRD_GPIO_USB_PWR_EN, 1); - gpio_set_value(NETBIRD_GPIO_USB_PWR_EN_2, 1); - - mdelay(50); - - /* Disable discharge LS2 */ - if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, TPS65218_CONFIG3, 0x00, 0x02)) { - puts ("tps65218_reg_write failure (LS2 discharge)\n"); - }; - - /* Configure 500mA on LS2 */ - if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, TPS65218_CONFIG2, 0x02, 0x03)) { - puts ("tps65218_reg_write failure (LS2 enable)\n"); - }; - - /* Enable LS2 */ - if (tps65218_reg_write(TPS65218_PROT_LEVEL_2, TPS65218_ENABLE2, 0x04, 0x04)) { - puts ("tps65218_reg_write failure (LS2 enable)\n"); - }; -#else - /* TODO: Rework to use USB Hub */ - REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_RST_USB_HUB_N); -#endif -} - /* TODO: Create DA9063 Accessor Module */ #define CONFIG_PMIC_I2C_BUS 0 #define CONFIG_PMIC_I2C_ADDR 0x58 /* Pages 0 and 1, Pages 2 and 3 -> 0x59 */ + +#define PMIC_REG_GPIO_MODE0_7 0x1D /* Control register for GPIOs 0..7 */ #define PMIC_REG_GPIO_MODE8_15 0x1E /* Control register for GPIOs 8..15 */ static int da9063_i2c_bus = 0; @@ -507,7 +464,7 @@ int da9093_get_reg(int reg, u8* val) int old_bus; u8 temp; - /* TODO: Check whether swiching is required */ + /* TODO: Check whether switching is required */ old_bus = i2c_get_bus_num(); i2c_set_bus_num(da9063_i2c_bus); @@ -538,33 +495,43 @@ int da9093_set_reg(int reg, u8 val) return ret; } -/* - * Bus 0: PMIC - * Bus 2: System - */ - -static void set_status_led(int red, int green) +void da9063_set_gpio(unsigned bit, int state) { - #define LED_REG PMIC_REG_GPIO_MODE8_15 - #define RED_MASK (1U << (10-8)) - #define GREEN_MASK (1U << (11-8)) - + int pmic_reg; int ret; + u8 bitmask; u8 reg = 0x00; - ret = da9093_get_reg(LED_REG, ®); + if (bit <= 7) { + pmic_reg = PMIC_REG_GPIO_MODE0_7; + bitmask = 1U << (bit-0); + } + else { + pmic_reg = PMIC_REG_GPIO_MODE8_15; + bitmask = 1U << (bit-8); + } + + printf("da9063_set_gpio %d 0x%04x\n", pmic_reg, bitmask); + ret = da9093_get_reg(pmic_reg, ®); + if (ret == 0) { - if (red) reg &= ~RED_MASK; - else reg |= RED_MASK; + if (state) reg |= bitmask; + else reg &= ~bitmask; - if (green) reg &= ~GREEN_MASK; - else reg |= GREEN_MASK; - - (void)da9093_set_reg(LED_REG, reg); + (void)da9093_set_reg(pmic_reg, reg); } } +static void set_status_led(int red, int green) +{ + da9063_set_gpio(PMIC_LED0_RED, !red); + da9063_set_gpio(PMIC_LED0_GREEN, !green); +} + + +/* TODO: Create I2C IoExtender Accessor Module */ + #define CONFIG_SYS_I2C_BUS 2 #define CONFIG_IOEXT_I2C_ADDR 0x74 #define IOEXT_REG_DIR 0x06 @@ -574,17 +541,17 @@ static void init_indicator_leds(void) { int ret; int old_bus; - const u8 dir[2] = { 0x00, 0x00 }; - const u8 val[2] = { 0xFF, 0xFD }; + unsigned char dir[2] = { 0x00, 0x00 }; + unsigned char val[2] = { 0xFF, 0xFD }; old_bus = i2c_get_bus_num(); i2c_set_bus_num(CONFIG_SYS_I2C_BUS); /* Set all IOs as output */ - (void)i2c_write(CONFIG_IOEXT_I2C_ADDR, IOEXT_REG_DIR, 1, &dir, 2); + (void)i2c_write(CONFIG_IOEXT_I2C_ADDR, IOEXT_REG_DIR, 1, dir, 2); /* Set LED5 green, all others off */ - (void)i2c_write(CONFIG_IOEXT_I2C_ADDR, IOEXT_REG_DATA, 1, &val, 2); + (void)i2c_write(CONFIG_IOEXT_I2C_ADDR, IOEXT_REG_DATA, 1, val, 2); i2c_set_bus_num(old_bus); } @@ -623,13 +590,12 @@ int board_init(void) REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_RST_PCI); REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_DIG_OUT); - printf("ETH Reset\n"); + da9063_set_gpio(PMIC_PCIe_SUPPLY_EN_IO, 0); /* PCIe Supply off */ + da9063_set_gpio(PMIC_PCIe_SUPPLY_VSEL_IO, 0); /* PCIe voltage = 3.3V */ /* Enable Ethernet switch */ REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_RST_PHY_N); mdelay(1); -/* for (;;) {} */ - /* OMAP3 does not feature open drain pins, thus configure as input */ gpio_direction_input(NETBIRD_GPIO_RST_PHY_N); /* When the Ethernet switch senses reset, it drives reset for 8..14ms @@ -637,32 +603,20 @@ int board_init(void) */ mdelay(20); - printf("ETH Reset done\n"); -/* for (;;) {} */ - - /* Enable USB hub */ REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_RST_USB_HUB_N); /* Minimum Reset Pulse = 1us */ - mdelay(1); + mdelay(2); gpio_set_value(NETBIRD_GPIO_RST_USB_HUB_N, 1); /* Disable GSM supply, and make sure reset is set once */ -#ifdef NRHW20_ON_HW16_MODE - REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_SUPPLY_GSM); -#else - /* TODO: Control via PMIC GPIO7 */ -#endif + da9063_set_gpio(PMIC_GSM_SUPPLY_EN_IO, 0); REQUEST_AND_SET_GPIO(NETBIRD_GPIO_RST_GSM); REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_PWR_GSM); mdelay(20); /* Enable GSM supply */ -#ifdef NRHW20_ON_HW16_MODE - gpio_set_value(NETBIRD_GPIO_SUPPLY_GSM, 1); -#else - /* TODO: Control via PMIC GPIO7 */ -#endif + da9063_set_gpio(PMIC_GSM_SUPPLY_EN_IO, 1); /* Take modem out of reset, we have to wait 300ms afterwards */ mdelay(20); @@ -678,6 +632,7 @@ int board_init(void) mdelay(1200); gpio_set_value(NETBIRD_GPIO_PWR_GSM, 0); + /* TODO: Move to pinmux? Required??? RMII2 not used! */ /* There are two functions on the same mux mode for MMC2_DAT7 we want * to use RMII2_CRS_DV so we need to set SMA2 Register to 1 @@ -685,72 +640,12 @@ int board_init(void) #define SMA2_REGISTER (CTRL_BASE + 0x1320) writel(0x01, SMA2_REGISTER); /* Select RMII2_CRS_DV instead of MMC2_DAT7 */ - /* TODO: Remove - enable_ext_usb(); - */ printf("OSC: %lu MHz\n", get_osclk()/1000000); return 0; } -/* TODO: Can most likely be removed. */ -#ifdef NRHW20_ON_HW16_MODE - -/* Enable the ecap2 pwm see siemens/pxm2 */ -static int enable_pwm(void) -{ -#define PWM_TICKS 0xBEB -#define PWM_DUTY 0x5F5 -#define AM33XX_ECAP2_BASE 0x48304100 -#define PWMSS2_BASE 0x48304000 - struct pwmss_regs *pwmss = (struct pwmss_regs *)PWMSS2_BASE; - struct pwmss_ecap_regs *ecap; - int ticks = PWM_TICKS; - int duty = PWM_DUTY; - - ecap = (struct pwmss_ecap_regs *)AM33XX_ECAP2_BASE; - /* enable clock */ - setbits_le32(&pwmss->clkconfig, ECAP_CLK_EN); - /* TimeStamp Counter register */ - writel(0x0, &ecap->ctrphs); - - setbits_le16(&ecap->ecctl2, - (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK)); - - /* config period */ - writel(ticks - 1, &ecap->cap3); - writel(ticks - 1, &ecap->cap1); - /* config duty */ - writel(duty, &ecap->cap2); - writel(duty, &ecap->cap4); - /* start */ - setbits_le16(&ecap->ecctl2, ECTRL2_CTRSTP_FREERUN); - return 0; -} - -/* Enable the input clock for ecap2 and then enable the pwm */ -static void enable_wlan_clock(void) -{ - struct cm_perpll *const cmper = (struct cm_perpll*)CM_PER; - struct ctrl_dev *const cdev= (struct ctrl_dev*)CTRL_DEVICE_BASE; - u32 *const clk_domains[] = { 0 }; - - u32 *const clk_modules_nmspecific[] = { - &cmper->epwmss2clkctrl, - 0 - }; - - do_enable_clocks(clk_domains, clk_modules_nmspecific, 1); - - /* Enable timebase clock for pwmss2 */ - writel(0x04, &cdev->pwmssctrl); - - enable_pwm(); -} - -#endif - #if !defined(CONFIG_SPL_BUILD) void set_console(void) @@ -878,6 +773,7 @@ static const struct shield_command* get_shield_command(int shield_id) static void shield_config(void) { #define MAX_SHIELD_CMD_LEN 128 + char shieldcmd_linux[MAX_SHIELD_CMD_LEN]; const char *shieldcmd; const struct shield_command *cmd; @@ -955,11 +851,6 @@ int board_late_init(void) set_board_info_env(name); #endif -#ifdef NRHW20_ON_HW16_MODE - /* TODO: Remove, Clock should be provided by PMIC */ - enable_wlan_clock(); -#endif - #if !defined(CONFIG_SPL_BUILD) shield_init(); check_fct(); diff --git a/board/nm/nrhw20/board.h b/board/nm/nrhw20/board.h index b7292b0111..d0bff8ee8a 100644 --- a/board/nm/nrhw20/board.h +++ b/board/nm/nrhw20/board.h @@ -17,13 +17,7 @@ * is required on the board. */ void enable_uart0_pin_mux(void); - -#ifdef NRHW20_ON_HW16_MODE -void enable_uart0_disabled_pin_mux(void); -#else void disable_uart0_pin_mux(void); -#endif - void enable_uart1_pin_mux(void); /* void enable_uart2_pin_mux(void); diff --git a/board/nm/nrhw20/mux.c b/board/nm/nrhw20/mux.c index f5af2e21ff..db4ec88f94 100644 --- a/board/nm/nrhw20/mux.c +++ b/board/nm/nrhw20/mux.c @@ -21,224 +21,6 @@ #include #include "board.h" - -#ifdef NRHW20_ON_HW16_MODE - -#if 0 /* TODO: Remove */ -static struct module_pin_mux uart2_pin_mux[] = { - {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */ - {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */ - {-1}, -}; - -static struct module_pin_mux uart3_pin_mux[] = { - {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */ - {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */ - {-1}, -}; - -static struct module_pin_mux uart4_pin_mux[] = { - {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */ - {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */ - {-1}, -}; - -static struct module_pin_mux uart5_pin_mux[] = { - {OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */ - {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */ - {-1}, -}; -#endif - -static struct module_pin_mux i2c0_pin_mux[] = { - {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | - PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* I2C_DATA */ - {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | - PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* I2C_SCLK */ - {-1}, -}; - -/* V2OK */ -static struct module_pin_mux uart0_disabled_netbird_pin_mux[] = { - /* Leave UART0 unconfigured because we want to configure it as needed by linux (can/spi/uart/etc) */ - {OFFSET(uart0_rxd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E15) UART0_RXD */ - {OFFSET(uart0_txd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E16) UART0_TXD */ - {OFFSET(uart0_ctsn), (MODE(7) | PULLUDDIS | RXACTIVE )}, /* (E18) UART0_CTSN */ - {OFFSET(uart0_rtsn), (MODE(7) | PULLUDEN | PULLUP_EN )}, /* (E17) UART0_RTSN */ - {-1}, -}; - -static struct module_pin_mux uart0_netbird_pin_mux[] = { - /* Leave UART0 unconfigured because we want to configure it as needed by linux (can/spi/uart/etc) */ - {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (E15) UART0_RXD */ - {OFFSET(uart0_txd), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* (E16) UART0_TXD */ - {-1}, -}; - -/* V2OK */ -static struct module_pin_mux uart1_netbird_pin_mux[] = { - {OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (D16) uart1_rxd.uart1_rxd */ - {OFFSET(uart1_txd), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* (D15) uart1_txd.uart1_txd */ - {-1}, -}; - -/* V2OK */ -static struct module_pin_mux rmii1_netbird_pin_mux[] = { - {OFFSET(mii1_crs), MODE(1) | PULLUDDIS | RXACTIVE}, /* (H17) mii1_crs.rmii1_crs */ - {OFFSET(mii1_rxerr), MODE(1) | PULLUDDIS | RXACTIVE}, /* (J15) mii1_rxerr.rmii1_rxerr */ - {OFFSET(mii1_txen), MODE(1) | PULLUDDIS }, /* (J16) mii1_txen.rmii1_txen */ - {OFFSET(mii1_txd0), MODE(1) | PULLUDDIS }, /* (K17) mii1_txd0.rmii1_txd0 */ - {OFFSET(mii1_txd1), MODE(1) | PULLUDDIS }, /* (K16) mii1_txd1.rmii1_txd1 */ - {OFFSET(mii1_rxd0), MODE(1) | PULLUDDIS | RXACTIVE }, /* (M16) mii1_rxd0.rmii1_rxd0 */ - {OFFSET(mii1_rxd1), MODE(1) | PULLUDDIS | RXACTIVE }, /* (L15) mii1_rxd1.rmii1_rxd1 */ - {OFFSET(rmii1_refclk), MODE(0) | PULLUDDIS | RXACTIVE}, /* (H18) rmii1_refclk.rmii1_refclk */ - {OFFSET(mdio_clk), MODE(0) | PULLUDDIS }, /* (M18) mdio_clk.mdio_clk */ - {OFFSET(mdio_data), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE }, /* (M17) mido_data.mdio_data */ - {OFFSET(xdma_event_intr0), MODE(3) }, /* (A15) xdma_event_intr0.clkout1 (25 MHz clk for MDIO) */ - {-1}, -}; - -static struct module_pin_mux mmc0_sdio_netbird_pin_mux[] = { - {OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* MMC0_CLK */ - {OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN)}, /* MMC0_CMD */ - {OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT0 */ - {OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT1 */ - {OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT2 */ - {OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC0_DAT3 */ - {-1}, -}; - -static struct module_pin_mux mmc1_emmc_netbird_pin_mux[] = { - {OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* MMC1_CLK */ - {OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* MMC1_CMD */ - {OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT0 */ - {OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT1 */ - {OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT2 */ - {OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */ - {OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */ - {OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */ - {OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */ - {OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE )}, /* MMC1_DAT3 */ - {-1}, -}; - -static struct module_pin_mux gpio_netbird_pin_mux[] = { - /* Bank 0 */ - {OFFSET(spi0_sclk), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (A17) spi0_sclk.gpio0[2] */ /* BUTTON */ - {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (C18) eCAP0_in_PWM0_out.gpio0[7] */ /* PWM */ - {OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gmii1_txd3.gpio0[16] */ /* RST_PHY~ */ - {OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)}, /* (U12) gpmc_ad11.gpio0[27] */ /* RST_EXT~ */ - /* Bank 1 */ - {OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS)}, /* (V13) gpmc_ad14.gpio1[14] */ /* LED_A */ - {OFFSET(gpmc_ad15), (MODE(7) | PULLUDDIS)}, /* (U13) gpmc_ad15.gpio1[15] */ /* LED_B */ - {OFFSET(gpmc_a11), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (V17) gpmc_a11.gpio1[27] */ /* USB_PWR_EN */ - {OFFSET(gpmc_a9), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (U16) gpmc_a9.gpio1[25] */ /* RST_GSM */ - {OFFSET(gpmc_csn3), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (U17) gpmc_csn3.gpio0[31] */ /* GSM_SUPP_EN */ - {OFFSET(gpmc_a5), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (V15) gpmc_a5.gpio1[21] */ /* GSM_PWR_EN */ - /* Bank 2 */ - {OFFSET(lcd_data3), (MODE(7) | PULLUDEN| PULLUP_EN)}, /* (V5) lcd_pclk.gpio2[9] */ /* SYSBOOT */ - {OFFSET(lcd_data4), (MODE(7) | PULLUDEN| PULLUP_EN)}, /* (V5) lcd_pclk.gpio2[10] */ /* SYSBOOT */ - /* Bank 3 */ - {OFFSET(mii1_rxdv), (MODE(7) | PULLUDDIS)}, /* (J17) gmii1_rxdv.gpio3[4] */ /* BT_EN */ - {OFFSET(mii1_rxdv), (MODE(7) | RXACTIVE)}, /* (K18) gmii1_txclk.gpio3[9] */ /* WLAN_IRQ */ - {OFFSET(mii1_rxclk), (MODE(7) | PULLUDDIS)}, /* (L18) gmii1_rxclk.gpio3[10] */ /* WLAN_EN */ - {OFFSET(mcasp0_ahclkr), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (C12) mcasp0_ahclkr.ecap2_in_pwm2_out */ /* WLAN_CLK */ - {-1}, -}; - -static struct module_pin_mux usb_netbird_pin_mux[] = { - {OFFSET(usb0_drvvbus), (MODE(0) | PULLUDDIS | PULLDOWN_EN)}, /* (F16) USB0_DRVVBUS.USB0_DRVVBUS */ /* PWM */ - {OFFSET(usb1_drvvbus), (MODE(0) | PULLUDDIS | PULLDOWN_EN)}, /* (F15) USB1_DRVVBUS.USB1_DRVVBUS */ /* RST_PHY~ */ - {-1}, -}; - -static struct module_pin_mux unused_netbird_pin_mux[] = { - {OFFSET(lcd_data6), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* SYSBOOT6 is not used bulldown active, receiver disabled */ - {OFFSET(lcd_data7), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* SYSBOOT7 is not used bulldown active, receiver disabled */ - {OFFSET(lcd_data10), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* SYSBOOT10 is not used bulldown active, receiver disabled */ - {OFFSET(lcd_data11), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* SYSBOOT11 is not used bulldown active, receiver disabled */ - {-1}, -}; - -void enable_uart0_pin_mux(void) -{ - configure_module_pin_mux(uart0_netbird_pin_mux); -} - -void enable_uart0_disabled_pin_mux(void) -{ - configure_module_pin_mux(uart0_disabled_netbird_pin_mux); -} - -void enable_uart1_pin_mux(void) -{ - configure_module_pin_mux(uart1_netbird_pin_mux); -} - -/* -void enable_uart2_pin_mux(void) -{ - configure_module_pin_mux(uart2_pin_mux); -} - -void enable_uart3_pin_mux(void) -{ - configure_module_pin_mux(uart3_pin_mux); -} - -void enable_uart4_pin_mux(void) -{ - configure_module_pin_mux(uart4_pin_mux); -} - -void enable_uart5_pin_mux(void) -{ - configure_module_pin_mux(uart5_pin_mux); -} - -void enable_i2c0_pin_mux(void) -{ - configure_module_pin_mux(i2c0_pin_mux); -} -*/ - -/* - * The AM335x GP EVM, if daughter card(s) are connected, can have 8 - * different profiles. These profiles determine what peripherals are - * valid and need pinmux to be configured. - */ -/* -#define PROFILE_NONE 0x0 -#define PROFILE_0 (1 << 0) -#define PROFILE_1 (1 << 1) -#define PROFILE_2 (1 << 2) -#define PROFILE_3 (1 << 3) -#define PROFILE_4 (1 << 4) -#define PROFILE_5 (1 << 5) -#define PROFILE_6 (1 << 6) -#define PROFILE_7 (1 << 7) -#define PROFILE_MASK 0x7 -#define PROFILE_ALL 0xFF -*/ -/* CPLD registers */ -/*#define I2C_CPLD_ADDR 0x35*/ -/*#define CFG_REG 0x10*/ - -void enable_board_pin_mux(void) -{ - /* Netbird board */ - configure_module_pin_mux(gpio_netbird_pin_mux); - configure_module_pin_mux(rmii1_netbird_pin_mux); - configure_module_pin_mux(mmc0_sdio_netbird_pin_mux); - configure_module_pin_mux(mmc1_emmc_netbird_pin_mux); - configure_module_pin_mux(usb_netbird_pin_mux); - configure_module_pin_mux(i2c0_pin_mux); - configure_module_pin_mux(unused_netbird_pin_mux); -} - - -#else /* NRHW 20 Board */ - static struct module_pin_mux gpio_pin_mux[] = { /* * GPIO0_2: RST_GNSS~ @@ -473,4 +255,3 @@ void enable_uart1_pin_mux(void) configure_module_pin_mux(uart1_pin_mux); } -#endif