Merge branch '2021-01-19-networking-improvements'
- e1000, ftgmac100: Add support for getting the MAC - General networking improvements - dwc_eth_qos, ks8851 fixes
This commit is contained in:
		
						commit
						9d13cd95f1
					
				| 
						 | 
					@ -209,6 +209,7 @@ struct eqos_dma_regs {
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#define EQOS_DMA_SYSBUS_MODE_BLEN8			BIT(2)
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					#define EQOS_DMA_SYSBUS_MODE_BLEN8			BIT(2)
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#define EQOS_DMA_SYSBUS_MODE_BLEN4			BIT(1)
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					#define EQOS_DMA_SYSBUS_MODE_BLEN4			BIT(1)
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					#define EQOS_DMA_CH0_CONTROL_DSL_SHIFT			18
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#define EQOS_DMA_CH0_CONTROL_PBLX8			BIT(16)
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					#define EQOS_DMA_CH0_CONTROL_PBLX8			BIT(16)
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#define EQOS_DMA_CH0_TX_CONTROL_TXPBL_SHIFT		16
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					#define EQOS_DMA_CH0_TX_CONTROL_TXPBL_SHIFT		16
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					@ -239,37 +240,15 @@ struct eqos_tegra186_regs {
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#define EQOS_AUTO_CAL_STATUS_ACTIVE			BIT(31)
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					#define EQOS_AUTO_CAL_STATUS_ACTIVE			BIT(31)
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/* Descriptors */
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					/* Descriptors */
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#define EQOS_DESCRIPTOR_WORDS	4
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#define EQOS_DESCRIPTOR_SIZE	(EQOS_DESCRIPTOR_WORDS * 4)
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/* We assume ARCH_DMA_MINALIGN >= 16; 16 is the EQOS HW minimum */
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					/* We assume ARCH_DMA_MINALIGN >= 16; 16 is the EQOS HW minimum */
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#define EQOS_DESCRIPTOR_ALIGN	ARCH_DMA_MINALIGN
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					#define EQOS_DESCRIPTOR_ALIGN	ARCH_DMA_MINALIGN
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#define EQOS_DESCRIPTORS_TX	4
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					#define EQOS_DESCRIPTORS_TX	4
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#define EQOS_DESCRIPTORS_RX	4
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					#define EQOS_DESCRIPTORS_RX	4
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#define EQOS_DESCRIPTORS_NUM	(EQOS_DESCRIPTORS_TX + EQOS_DESCRIPTORS_RX)
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					#define EQOS_DESCRIPTORS_NUM	(EQOS_DESCRIPTORS_TX + EQOS_DESCRIPTORS_RX)
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#define EQOS_DESCRIPTORS_SIZE	ALIGN(EQOS_DESCRIPTORS_NUM * \
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				      EQOS_DESCRIPTOR_SIZE, ARCH_DMA_MINALIGN)
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#define EQOS_BUFFER_ALIGN	ARCH_DMA_MINALIGN
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					#define EQOS_BUFFER_ALIGN	ARCH_DMA_MINALIGN
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#define EQOS_MAX_PACKET_SIZE	ALIGN(1568, ARCH_DMA_MINALIGN)
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					#define EQOS_MAX_PACKET_SIZE	ALIGN(1568, ARCH_DMA_MINALIGN)
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#define EQOS_RX_BUFFER_SIZE	(EQOS_DESCRIPTORS_RX * EQOS_MAX_PACKET_SIZE)
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					#define EQOS_RX_BUFFER_SIZE	(EQOS_DESCRIPTORS_RX * EQOS_MAX_PACKET_SIZE)
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/*
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 * Warn if the cache-line size is larger than the descriptor size. In such
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 * cases the driver will likely fail because the CPU needs to flush the cache
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 * when requeuing RX buffers, therefore descriptors written by the hardware
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 * may be discarded. Architectures with full IO coherence, such as x86, do not
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 * experience this issue, and hence are excluded from this condition.
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 *
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 * This can be fixed by defining CONFIG_SYS_NONCACHED_MEMORY which will cause
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 * the driver to allocate descriptors from a pool of non-cached memory.
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 */
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#if EQOS_DESCRIPTOR_SIZE < ARCH_DMA_MINALIGN
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#if !defined(CONFIG_SYS_NONCACHED_MEMORY) && \
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	!CONFIG_IS_ENABLED(SYS_DCACHE_OFF) && !defined(CONFIG_X86)
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#warning Cache line size is larger than descriptor size
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#endif
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#endif
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struct eqos_desc {
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					struct eqos_desc {
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	u32 des0;
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						u32 des0;
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	u32 des1;
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						u32 des1;
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						 | 
					@ -282,12 +261,17 @@ struct eqos_desc {
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#define EQOS_DESC3_LD		BIT(28)
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					#define EQOS_DESC3_LD		BIT(28)
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#define EQOS_DESC3_BUF1V	BIT(24)
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					#define EQOS_DESC3_BUF1V	BIT(24)
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					#define EQOS_AXI_WIDTH_32	4
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					#define EQOS_AXI_WIDTH_64	8
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					#define EQOS_AXI_WIDTH_128	16
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struct eqos_config {
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					struct eqos_config {
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	bool reg_access_always_ok;
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						bool reg_access_always_ok;
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	int mdio_wait;
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						int mdio_wait;
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	int swr_wait;
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						int swr_wait;
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	int config_mac;
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						int config_mac;
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	int config_mac_mdio;
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						int config_mac_mdio;
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						unsigned int axi_bus_width;
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	phy_interface_t (*interface)(struct udevice *dev);
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						phy_interface_t (*interface)(struct udevice *dev);
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	struct eqos_ops *ops;
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						struct eqos_ops *ops;
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};
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					};
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					@ -330,9 +314,8 @@ struct eqos_priv {
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	int phyaddr;
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						int phyaddr;
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	u32 max_speed;
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						u32 max_speed;
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	void *descs;
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						void *descs;
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	struct eqos_desc *tx_descs;
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	struct eqos_desc *rx_descs;
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	int tx_desc_idx, rx_desc_idx;
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						int tx_desc_idx, rx_desc_idx;
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						unsigned int desc_size;
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	void *tx_dma_buf;
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						void *tx_dma_buf;
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	void *rx_dma_buf;
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						void *rx_dma_buf;
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	void *rx_pkt;
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						void *rx_pkt;
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					@ -358,63 +341,42 @@ struct eqos_priv {
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 * not have the same constraints since they are 1536 bytes large, so they
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					 * not have the same constraints since they are 1536 bytes large, so they
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 * are unlikely to share cache-lines.
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					 * are unlikely to share cache-lines.
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 */
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					 */
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static void *eqos_alloc_descs(unsigned int num)
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					static void *eqos_alloc_descs(struct eqos_priv *eqos, unsigned int num)
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{
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					{
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#ifdef CONFIG_SYS_NONCACHED_MEMORY
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						eqos->desc_size = ALIGN(sizeof(struct eqos_desc),
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	return (void *)noncached_alloc(EQOS_DESCRIPTORS_SIZE,
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									(unsigned int)ARCH_DMA_MINALIGN);
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				      EQOS_DESCRIPTOR_ALIGN);
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#else
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						return memalign(eqos->desc_size, num * eqos->desc_size);
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	return memalign(EQOS_DESCRIPTOR_ALIGN, EQOS_DESCRIPTORS_SIZE);
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#endif
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}
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					}
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static void eqos_free_descs(void *descs)
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					static void eqos_free_descs(void *descs)
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{
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					{
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#ifdef CONFIG_SYS_NONCACHED_MEMORY
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	/* FIXME: noncached_alloc() has no opposite */
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#else
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	free(descs);
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						free(descs);
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#endif
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}
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					}
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static void eqos_inval_desc_tegra186(void *desc)
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					static struct eqos_desc *eqos_get_desc(struct eqos_priv *eqos,
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									       unsigned int num, bool rx)
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{
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					{
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#ifndef CONFIG_SYS_NONCACHED_MEMORY
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						return eqos->descs +
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	unsigned long start = (unsigned long)desc & ~(ARCH_DMA_MINALIGN - 1);
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							((rx ? EQOS_DESCRIPTORS_TX : 0) + num) * eqos->desc_size;
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	unsigned long end = ALIGN(start + EQOS_DESCRIPTOR_SIZE,
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				  ARCH_DMA_MINALIGN);
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	invalidate_dcache_range(start, end);
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#endif
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}
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					}
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static void eqos_inval_desc_generic(void *desc)
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					static void eqos_inval_desc_generic(void *desc)
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{
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					{
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#ifndef CONFIG_SYS_NONCACHED_MEMORY
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						unsigned long start = (unsigned long)desc;
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	unsigned long start = rounddown((unsigned long)desc, ARCH_DMA_MINALIGN);
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						unsigned long end = ALIGN(start + sizeof(struct eqos_desc),
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	unsigned long end = roundup((unsigned long)desc + EQOS_DESCRIPTOR_SIZE,
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									  ARCH_DMA_MINALIGN);
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				    ARCH_DMA_MINALIGN);
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	invalidate_dcache_range(start, end);
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						invalidate_dcache_range(start, end);
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#endif
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}
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static void eqos_flush_desc_tegra186(void *desc)
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{
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#ifndef CONFIG_SYS_NONCACHED_MEMORY
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	flush_cache((unsigned long)desc, EQOS_DESCRIPTOR_SIZE);
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#endif
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}
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					}
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static void eqos_flush_desc_generic(void *desc)
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					static void eqos_flush_desc_generic(void *desc)
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{
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					{
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#ifndef CONFIG_SYS_NONCACHED_MEMORY
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						unsigned long start = (unsigned long)desc;
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	unsigned long start = rounddown((unsigned long)desc, ARCH_DMA_MINALIGN);
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						unsigned long end = ALIGN(start + sizeof(struct eqos_desc),
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	unsigned long end = roundup((unsigned long)desc + EQOS_DESCRIPTOR_SIZE,
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									  ARCH_DMA_MINALIGN);
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				    ARCH_DMA_MINALIGN);
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	flush_dcache_range(start, end);
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						flush_dcache_range(start, end);
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#endif
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}
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					}
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static void eqos_inval_buffer_tegra186(void *buf, size_t size)
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					static void eqos_inval_buffer_tegra186(void *buf, size_t size)
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					@ -1167,6 +1129,7 @@ static int eqos_start(struct udevice *dev)
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	ulong rate;
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						ulong rate;
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	u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
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						u32 val, tx_fifo_sz, rx_fifo_sz, tqs, rqs, pbl;
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	ulong last_rx_desc;
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						ulong last_rx_desc;
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						ulong desc_pad;
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	debug("%s(dev=%p):\n", __func__, dev);
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						debug("%s(dev=%p):\n", __func__, dev);
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					@ -1405,8 +1368,12 @@ static int eqos_start(struct udevice *dev)
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			EQOS_MAX_PACKET_SIZE <<
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								EQOS_MAX_PACKET_SIZE <<
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			EQOS_DMA_CH0_RX_CONTROL_RBSZ_SHIFT);
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								EQOS_DMA_CH0_RX_CONTROL_RBSZ_SHIFT);
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						desc_pad = (eqos->desc_size - sizeof(struct eqos_desc)) /
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							   eqos->config->axi_bus_width;
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	setbits_le32(&eqos->dma_regs->ch0_control,
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						setbits_le32(&eqos->dma_regs->ch0_control,
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		     EQOS_DMA_CH0_CONTROL_PBLX8);
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							     EQOS_DMA_CH0_CONTROL_PBLX8 |
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							     (desc_pad << EQOS_DMA_CH0_CONTROL_DSL_SHIFT));
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	/*
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						/*
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	 * Burst length must be < 1/2 FIFO size.
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						 * Burst length must be < 1/2 FIFO size.
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					@ -1435,9 +1402,15 @@ static int eqos_start(struct udevice *dev)
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	/* Set up descriptors */
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						/* Set up descriptors */
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	memset(eqos->descs, 0, EQOS_DESCRIPTORS_SIZE);
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						memset(eqos->descs, 0, eqos->desc_size * EQOS_DESCRIPTORS_NUM);
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						for (i = 0; i < EQOS_DESCRIPTORS_TX; i++) {
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							struct eqos_desc *tx_desc = eqos_get_desc(eqos, i, false);
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							eqos->config->ops->eqos_flush_desc(tx_desc);
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						}
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	for (i = 0; i < EQOS_DESCRIPTORS_RX; i++) {
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						for (i = 0; i < EQOS_DESCRIPTORS_RX; i++) {
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		struct eqos_desc *rx_desc = &(eqos->rx_descs[i]);
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							struct eqos_desc *rx_desc = eqos_get_desc(eqos, i, true);
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		rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf +
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							rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf +
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					     (i * EQOS_MAX_PACKET_SIZE));
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										     (i * EQOS_MAX_PACKET_SIZE));
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		rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
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							rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
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					@ -1449,12 +1422,14 @@ static int eqos_start(struct udevice *dev)
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	}
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						}
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	writel(0, &eqos->dma_regs->ch0_txdesc_list_haddress);
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						writel(0, &eqos->dma_regs->ch0_txdesc_list_haddress);
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	writel((ulong)eqos->tx_descs, &eqos->dma_regs->ch0_txdesc_list_address);
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						writel((ulong)eqos_get_desc(eqos, 0, false),
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							&eqos->dma_regs->ch0_txdesc_list_address);
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	writel(EQOS_DESCRIPTORS_TX - 1,
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						writel(EQOS_DESCRIPTORS_TX - 1,
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	       &eqos->dma_regs->ch0_txdesc_ring_length);
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						       &eqos->dma_regs->ch0_txdesc_ring_length);
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	writel(0, &eqos->dma_regs->ch0_rxdesc_list_haddress);
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						writel(0, &eqos->dma_regs->ch0_rxdesc_list_haddress);
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	writel((ulong)eqos->rx_descs, &eqos->dma_regs->ch0_rxdesc_list_address);
 | 
						writel((ulong)eqos_get_desc(eqos, 0, true),
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							&eqos->dma_regs->ch0_rxdesc_list_address);
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	writel(EQOS_DESCRIPTORS_RX - 1,
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						writel(EQOS_DESCRIPTORS_RX - 1,
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	       &eqos->dma_regs->ch0_rxdesc_ring_length);
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						       &eqos->dma_regs->ch0_rxdesc_ring_length);
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						 | 
					@ -1473,7 +1448,7 @@ static int eqos_start(struct udevice *dev)
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	 * that's not distinguishable from none of the descriptors being
 | 
						 * that's not distinguishable from none of the descriptors being
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	 * available.
 | 
						 * available.
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	 */
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						 */
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	last_rx_desc = (ulong)&(eqos->rx_descs[(EQOS_DESCRIPTORS_RX - 1)]);
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						last_rx_desc = (ulong)eqos_get_desc(eqos, EQOS_DESCRIPTORS_RX - 1, true);
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	writel(last_rx_desc, &eqos->dma_regs->ch0_rxdesc_tail_pointer);
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						writel(last_rx_desc, &eqos->dma_regs->ch0_rxdesc_tail_pointer);
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 | 
					
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	eqos->started = true;
 | 
						eqos->started = true;
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						 | 
					@ -1558,7 +1533,7 @@ static int eqos_send(struct udevice *dev, void *packet, int length)
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	memcpy(eqos->tx_dma_buf, packet, length);
 | 
						memcpy(eqos->tx_dma_buf, packet, length);
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	eqos->config->ops->eqos_flush_buffer(eqos->tx_dma_buf, length);
 | 
						eqos->config->ops->eqos_flush_buffer(eqos->tx_dma_buf, length);
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 | 
					
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	tx_desc = &(eqos->tx_descs[eqos->tx_desc_idx]);
 | 
						tx_desc = eqos_get_desc(eqos, eqos->tx_desc_idx, false);
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	eqos->tx_desc_idx++;
 | 
						eqos->tx_desc_idx++;
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	eqos->tx_desc_idx %= EQOS_DESCRIPTORS_TX;
 | 
						eqos->tx_desc_idx %= EQOS_DESCRIPTORS_TX;
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						 | 
					@ -1573,7 +1548,7 @@ static int eqos_send(struct udevice *dev, void *packet, int length)
 | 
				
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	tx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_FD | EQOS_DESC3_LD | length;
 | 
						tx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_FD | EQOS_DESC3_LD | length;
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			||||||
	eqos->config->ops->eqos_flush_desc(tx_desc);
 | 
						eqos->config->ops->eqos_flush_desc(tx_desc);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	writel((ulong)(&(eqos->tx_descs[eqos->tx_desc_idx])),
 | 
						writel((ulong)eqos_get_desc(eqos, eqos->tx_desc_idx, false),
 | 
				
			||||||
		&eqos->dma_regs->ch0_txdesc_tail_pointer);
 | 
							&eqos->dma_regs->ch0_txdesc_tail_pointer);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	for (i = 0; i < 1000000; i++) {
 | 
						for (i = 0; i < 1000000; i++) {
 | 
				
			||||||
| 
						 | 
					@ -1596,7 +1571,7 @@ static int eqos_recv(struct udevice *dev, int flags, uchar **packetp)
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	debug("%s(dev=%p, flags=%x):\n", __func__, dev, flags);
 | 
						debug("%s(dev=%p, flags=%x):\n", __func__, dev, flags);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	rx_desc = &(eqos->rx_descs[eqos->rx_desc_idx]);
 | 
						rx_desc = eqos_get_desc(eqos, eqos->rx_desc_idx, true);
 | 
				
			||||||
	eqos->config->ops->eqos_inval_desc(rx_desc);
 | 
						eqos->config->ops->eqos_inval_desc(rx_desc);
 | 
				
			||||||
	if (rx_desc->des3 & EQOS_DESC3_OWN) {
 | 
						if (rx_desc->des3 & EQOS_DESC3_OWN) {
 | 
				
			||||||
		debug("%s: RX packet not available\n", __func__);
 | 
							debug("%s: RX packet not available\n", __func__);
 | 
				
			||||||
| 
						 | 
					@ -1631,7 +1606,7 @@ static int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	eqos->config->ops->eqos_inval_buffer(packet, length);
 | 
						eqos->config->ops->eqos_inval_buffer(packet, length);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	rx_desc = &(eqos->rx_descs[eqos->rx_desc_idx]);
 | 
						rx_desc = eqos_get_desc(eqos, eqos->rx_desc_idx, true);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	rx_desc->des0 = 0;
 | 
						rx_desc->des0 = 0;
 | 
				
			||||||
	mb();
 | 
						mb();
 | 
				
			||||||
| 
						 | 
					@ -1663,17 +1638,12 @@ static int eqos_probe_resources_core(struct udevice *dev)
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	debug("%s(dev=%p):\n", __func__, dev);
 | 
						debug("%s(dev=%p):\n", __func__, dev);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	eqos->descs = eqos_alloc_descs(EQOS_DESCRIPTORS_TX +
 | 
						eqos->descs = eqos_alloc_descs(eqos, EQOS_DESCRIPTORS_NUM);
 | 
				
			||||||
				       EQOS_DESCRIPTORS_RX);
 | 
					 | 
				
			||||||
	if (!eqos->descs) {
 | 
						if (!eqos->descs) {
 | 
				
			||||||
		debug("%s: eqos_alloc_descs() failed\n", __func__);
 | 
							debug("%s: eqos_alloc_descs() failed\n", __func__);
 | 
				
			||||||
		ret = -ENOMEM;
 | 
							ret = -ENOMEM;
 | 
				
			||||||
		goto err;
 | 
							goto err;
 | 
				
			||||||
	}
 | 
						}
 | 
				
			||||||
	eqos->tx_descs = (struct eqos_desc *)eqos->descs;
 | 
					 | 
				
			||||||
	eqos->rx_descs = (eqos->tx_descs + EQOS_DESCRIPTORS_TX);
 | 
					 | 
				
			||||||
	debug("%s: tx_descs=%p, rx_descs=%p\n", __func__, eqos->tx_descs,
 | 
					 | 
				
			||||||
	      eqos->rx_descs);
 | 
					 | 
				
			||||||
 | 
					
 | 
				
			||||||
	eqos->tx_dma_buf = memalign(EQOS_BUFFER_ALIGN, EQOS_MAX_PACKET_SIZE);
 | 
						eqos->tx_dma_buf = memalign(EQOS_BUFFER_ALIGN, EQOS_MAX_PACKET_SIZE);
 | 
				
			||||||
	if (!eqos->tx_dma_buf) {
 | 
						if (!eqos->tx_dma_buf) {
 | 
				
			||||||
| 
						 | 
					@ -2083,8 +2053,8 @@ static const struct eth_ops eqos_ops = {
 | 
				
			||||||
};
 | 
					};
 | 
				
			||||||
 | 
					
 | 
				
			||||||
static struct eqos_ops eqos_tegra186_ops = {
 | 
					static struct eqos_ops eqos_tegra186_ops = {
 | 
				
			||||||
	.eqos_inval_desc = eqos_inval_desc_tegra186,
 | 
						.eqos_inval_desc = eqos_inval_desc_generic,
 | 
				
			||||||
	.eqos_flush_desc = eqos_flush_desc_tegra186,
 | 
						.eqos_flush_desc = eqos_flush_desc_generic,
 | 
				
			||||||
	.eqos_inval_buffer = eqos_inval_buffer_tegra186,
 | 
						.eqos_inval_buffer = eqos_inval_buffer_tegra186,
 | 
				
			||||||
	.eqos_flush_buffer = eqos_flush_buffer_tegra186,
 | 
						.eqos_flush_buffer = eqos_flush_buffer_tegra186,
 | 
				
			||||||
	.eqos_probe_resources = eqos_probe_resources_tegra186,
 | 
						.eqos_probe_resources = eqos_probe_resources_tegra186,
 | 
				
			||||||
| 
						 | 
					@ -2105,6 +2075,7 @@ static const struct eqos_config __maybe_unused eqos_tegra186_config = {
 | 
				
			||||||
	.swr_wait = 10,
 | 
						.swr_wait = 10,
 | 
				
			||||||
	.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
 | 
						.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
 | 
				
			||||||
	.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_20_35,
 | 
						.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_20_35,
 | 
				
			||||||
 | 
						.axi_bus_width = EQOS_AXI_WIDTH_128,
 | 
				
			||||||
	.interface = eqos_get_interface_tegra186,
 | 
						.interface = eqos_get_interface_tegra186,
 | 
				
			||||||
	.ops = &eqos_tegra186_ops
 | 
						.ops = &eqos_tegra186_ops
 | 
				
			||||||
};
 | 
					};
 | 
				
			||||||
| 
						 | 
					@ -2132,6 +2103,7 @@ static const struct eqos_config __maybe_unused eqos_stm32_config = {
 | 
				
			||||||
	.swr_wait = 50,
 | 
						.swr_wait = 50,
 | 
				
			||||||
	.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV,
 | 
						.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV,
 | 
				
			||||||
	.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
 | 
						.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
 | 
				
			||||||
 | 
						.axi_bus_width = EQOS_AXI_WIDTH_64,
 | 
				
			||||||
	.interface = eqos_get_interface_stm32,
 | 
						.interface = eqos_get_interface_stm32,
 | 
				
			||||||
	.ops = &eqos_stm32_ops
 | 
						.ops = &eqos_stm32_ops
 | 
				
			||||||
};
 | 
					};
 | 
				
			||||||
| 
						 | 
					@ -2159,6 +2131,7 @@ struct eqos_config __maybe_unused eqos_imx_config = {
 | 
				
			||||||
	.swr_wait = 50,
 | 
						.swr_wait = 50,
 | 
				
			||||||
	.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
 | 
						.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
 | 
				
			||||||
	.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
 | 
						.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
 | 
				
			||||||
 | 
						.axi_bus_width = EQOS_AXI_WIDTH_64,
 | 
				
			||||||
	.interface = eqos_get_interface_imx,
 | 
						.interface = eqos_get_interface_imx,
 | 
				
			||||||
	.ops = &eqos_imx_ops
 | 
						.ops = &eqos_imx_ops
 | 
				
			||||||
};
 | 
					};
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -869,7 +869,6 @@ e1000_read_eeprom(struct e1000_hw *hw, uint16_t offset,
 | 
				
			||||||
	return E1000_SUCCESS;
 | 
						return E1000_SUCCESS;
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
#ifndef CONFIG_DM_ETH
 | 
					 | 
				
			||||||
/******************************************************************************
 | 
					/******************************************************************************
 | 
				
			||||||
 *  e1000_write_eeprom_srwr - Write to Shadow Ram using EEWR
 | 
					 *  e1000_write_eeprom_srwr - Write to Shadow Ram using EEWR
 | 
				
			||||||
 *  @hw: pointer to the HW structure
 | 
					 *  @hw: pointer to the HW structure
 | 
				
			||||||
| 
						 | 
					@ -1035,7 +1034,6 @@ static int32_t e1000_update_eeprom_checksum_i210(struct e1000_hw *hw)
 | 
				
			||||||
out:
 | 
					out:
 | 
				
			||||||
	return ret_val;
 | 
						return ret_val;
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
#endif
 | 
					 | 
				
			||||||
 | 
					
 | 
				
			||||||
/******************************************************************************
 | 
					/******************************************************************************
 | 
				
			||||||
 * Verifies that the EEPROM has a valid checksum
 | 
					 * Verifies that the EEPROM has a valid checksum
 | 
				
			||||||
| 
						 | 
					@ -5660,13 +5658,24 @@ e1000_poll(struct eth_device *nic)
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	return len ? 1 : 0;
 | 
						return len ? 1 : 0;
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 | 
					#endif /* !CONFIG_DM_ETH */
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					#ifdef CONFIG_DM_ETH
 | 
				
			||||||
 | 
					static int e1000_write_hwaddr(struct udevice *dev)
 | 
				
			||||||
 | 
					#else
 | 
				
			||||||
static int e1000_write_hwaddr(struct eth_device *dev)
 | 
					static int e1000_write_hwaddr(struct eth_device *dev)
 | 
				
			||||||
 | 
					#endif
 | 
				
			||||||
{
 | 
					{
 | 
				
			||||||
#ifndef CONFIG_E1000_NO_NVM
 | 
					#ifndef CONFIG_E1000_NO_NVM
 | 
				
			||||||
	unsigned char *mac = dev->enetaddr;
 | 
					 | 
				
			||||||
	unsigned char current_mac[6];
 | 
						unsigned char current_mac[6];
 | 
				
			||||||
 | 
					#ifdef CONFIG_DM_ETH
 | 
				
			||||||
 | 
						struct eth_pdata *plat = dev_get_plat(dev);
 | 
				
			||||||
 | 
						struct e1000_hw *hw = dev_get_priv(dev);
 | 
				
			||||||
 | 
						u8 *mac = plat->enetaddr;
 | 
				
			||||||
 | 
					#else
 | 
				
			||||||
	struct e1000_hw *hw = dev->priv;
 | 
						struct e1000_hw *hw = dev->priv;
 | 
				
			||||||
 | 
						u8 *mac = dev->enetaddr;
 | 
				
			||||||
 | 
					#endif
 | 
				
			||||||
	uint16_t data[3];
 | 
						uint16_t data[3];
 | 
				
			||||||
	int ret_val, i;
 | 
						int ret_val, i;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
| 
						 | 
					@ -5700,6 +5709,7 @@ static int e1000_write_hwaddr(struct eth_device *dev)
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					#ifndef CONFIG_DM_ETH
 | 
				
			||||||
/**************************************************************************
 | 
					/**************************************************************************
 | 
				
			||||||
PROBE - Look for an adapter, this routine's visible to the outside
 | 
					PROBE - Look for an adapter, this routine's visible to the outside
 | 
				
			||||||
You should omit the last argument struct pci_device * for a non-PCI NIC
 | 
					You should omit the last argument struct pci_device * for a non-PCI NIC
 | 
				
			||||||
| 
						 | 
					@ -5926,6 +5936,7 @@ static const struct eth_ops e1000_eth_ops = {
 | 
				
			||||||
	.recv	= e1000_eth_recv,
 | 
						.recv	= e1000_eth_recv,
 | 
				
			||||||
	.stop	= e1000_eth_stop,
 | 
						.stop	= e1000_eth_stop,
 | 
				
			||||||
	.free_pkt = e1000_free_pkt,
 | 
						.free_pkt = e1000_free_pkt,
 | 
				
			||||||
 | 
						.write_hwaddr = e1000_write_hwaddr,
 | 
				
			||||||
};
 | 
					};
 | 
				
			||||||
 | 
					
 | 
				
			||||||
static const struct udevice_id e1000_eth_ids[] = {
 | 
					static const struct udevice_id e1000_eth_ids[] = {
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -270,6 +270,28 @@ static int ftgmac100_set_mac(struct ftgmac100_data *priv,
 | 
				
			||||||
	return 0;
 | 
						return 0;
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					/*
 | 
				
			||||||
 | 
					 * Get MAC address
 | 
				
			||||||
 | 
					 */
 | 
				
			||||||
 | 
					static int ftgmac100_get_mac(struct ftgmac100_data *priv,
 | 
				
			||||||
 | 
									unsigned char *mac)
 | 
				
			||||||
 | 
					{
 | 
				
			||||||
 | 
						struct ftgmac100 *ftgmac100 = priv->iobase;
 | 
				
			||||||
 | 
						unsigned int maddr = readl(&ftgmac100->mac_madr);
 | 
				
			||||||
 | 
						unsigned int laddr = readl(&ftgmac100->mac_ladr);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						debug("%s(%x %x)\n", __func__, maddr, laddr);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						mac[0] = (maddr >> 8) & 0xff;
 | 
				
			||||||
 | 
						mac[1] =  maddr & 0xff;
 | 
				
			||||||
 | 
						mac[2] = (laddr >> 24) & 0xff;
 | 
				
			||||||
 | 
						mac[3] = (laddr >> 16) & 0xff;
 | 
				
			||||||
 | 
						mac[4] = (laddr >> 8) & 0xff;
 | 
				
			||||||
 | 
						mac[5] =  laddr & 0xff;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						return 0;
 | 
				
			||||||
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/*
 | 
					/*
 | 
				
			||||||
 * disable transmitter, receiver
 | 
					 * disable transmitter, receiver
 | 
				
			||||||
 */
 | 
					 */
 | 
				
			||||||
| 
						 | 
					@ -511,6 +533,14 @@ static int ftgmac100_write_hwaddr(struct udevice *dev)
 | 
				
			||||||
	return ftgmac100_set_mac(priv, pdata->enetaddr);
 | 
						return ftgmac100_set_mac(priv, pdata->enetaddr);
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					static int ftgmac_read_hwaddr(struct udevice *dev)
 | 
				
			||||||
 | 
					{
 | 
				
			||||||
 | 
						struct eth_pdata *pdata = dev_get_plat(dev);
 | 
				
			||||||
 | 
						struct ftgmac100_data *priv = dev_get_priv(dev);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						return ftgmac100_get_mac(priv, pdata->enetaddr);
 | 
				
			||||||
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
static int ftgmac100_of_to_plat(struct udevice *dev)
 | 
					static int ftgmac100_of_to_plat(struct udevice *dev)
 | 
				
			||||||
{
 | 
					{
 | 
				
			||||||
	struct eth_pdata *pdata = dev_get_plat(dev);
 | 
						struct eth_pdata *pdata = dev_get_plat(dev);
 | 
				
			||||||
| 
						 | 
					@ -571,6 +601,8 @@ static int ftgmac100_probe(struct udevice *dev)
 | 
				
			||||||
		goto out;
 | 
							goto out;
 | 
				
			||||||
	}
 | 
						}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						ftgmac_read_hwaddr(dev);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
out:
 | 
					out:
 | 
				
			||||||
	if (ret)
 | 
						if (ret)
 | 
				
			||||||
		clk_release_bulk(&priv->clks);
 | 
							clk_release_bulk(&priv->clks);
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -251,7 +251,8 @@ static int ks_rcv(struct ks_net *ks, uchar *data)
 | 
				
			||||||
	}
 | 
						}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL | RXQCR_RRXEF);
 | 
						ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL | RXQCR_RRXEF);
 | 
				
			||||||
	printf(DRIVERNAME ": bad packet\n");
 | 
						printf(DRIVERNAME ": bad packet (sts=0x%04x len=0x%04x)\n", sts, len);
 | 
				
			||||||
 | 
						ks->rxfc = 0;
 | 
				
			||||||
	return 0;
 | 
						return 0;
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -69,7 +69,6 @@
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/* Ethernet need */
 | 
					/* Ethernet need */
 | 
				
			||||||
#ifdef CONFIG_DWC_ETH_QOS
 | 
					#ifdef CONFIG_DWC_ETH_QOS
 | 
				
			||||||
#define CONFIG_SYS_NONCACHED_MEMORY	(1 * SZ_1M)	/* 1M */
 | 
					 | 
				
			||||||
#define CONFIG_SERVERIP                 192.168.1.1
 | 
					#define CONFIG_SERVERIP                 192.168.1.1
 | 
				
			||||||
#define CONFIG_BOOTP_SERVERIP
 | 
					#define CONFIG_BOOTP_SERVERIP
 | 
				
			||||||
#define CONFIG_SYS_AUTOLOAD		"no"
 | 
					#define CONFIG_SYS_AUTOLOAD		"no"
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
							
								
								
									
										19
									
								
								lib/uuid.c
								
								
								
								
							
							
						
						
									
										19
									
								
								lib/uuid.c
								
								
								
								
							| 
						 | 
					@ -15,6 +15,8 @@
 | 
				
			||||||
#include <asm/io.h>
 | 
					#include <asm/io.h>
 | 
				
			||||||
#include <part_efi.h>
 | 
					#include <part_efi.h>
 | 
				
			||||||
#include <malloc.h>
 | 
					#include <malloc.h>
 | 
				
			||||||
 | 
					#include <dm/uclass.h>
 | 
				
			||||||
 | 
					#include <rng.h>
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/*
 | 
					/*
 | 
				
			||||||
 * UUID - Universally Unique IDentifier - 128 bits unique number.
 | 
					 * UUID - Universally Unique IDentifier - 128 bits unique number.
 | 
				
			||||||
| 
						 | 
					@ -249,9 +251,22 @@ void gen_rand_uuid(unsigned char *uuid_bin)
 | 
				
			||||||
{
 | 
					{
 | 
				
			||||||
	u32 ptr[4];
 | 
						u32 ptr[4];
 | 
				
			||||||
	struct uuid *uuid = (struct uuid *)ptr;
 | 
						struct uuid *uuid = (struct uuid *)ptr;
 | 
				
			||||||
	int i;
 | 
						int i, ret;
 | 
				
			||||||
 | 
						struct udevice *devp;
 | 
				
			||||||
 | 
						u32 randv = 0;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	srand(get_ticks() + rand());
 | 
						if (IS_ENABLED(CONFIG_DM_RNG)) {
 | 
				
			||||||
 | 
							ret = uclass_get_device(UCLASS_RNG, 0, &devp);
 | 
				
			||||||
 | 
							if (ret) {
 | 
				
			||||||
 | 
								ret = dm_rng_read(devp, &randv, sizeof(randv));
 | 
				
			||||||
 | 
								if (ret < 0)
 | 
				
			||||||
 | 
									randv = 0;
 | 
				
			||||||
 | 
							}
 | 
				
			||||||
 | 
						}
 | 
				
			||||||
 | 
						if (randv)
 | 
				
			||||||
 | 
							srand(randv);
 | 
				
			||||||
 | 
						else
 | 
				
			||||||
 | 
							srand(get_ticks() + rand());
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	/* Set all fields randomly */
 | 
						/* Set all fields randomly */
 | 
				
			||||||
	for (i = 0; i < 4; i++)
 | 
						for (i = 0; i < 4; i++)
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -26,6 +26,7 @@ DECLARE_GLOBAL_DATA_PTR;
 | 
				
			||||||
 */
 | 
					 */
 | 
				
			||||||
struct eth_device_priv {
 | 
					struct eth_device_priv {
 | 
				
			||||||
	enum eth_state_t state;
 | 
						enum eth_state_t state;
 | 
				
			||||||
 | 
						bool running;
 | 
				
			||||||
};
 | 
					};
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/**
 | 
					/**
 | 
				
			||||||
| 
						 | 
					@ -290,6 +291,7 @@ int eth_init(void)
 | 
				
			||||||
						dev_get_uclass_priv(current);
 | 
											dev_get_uclass_priv(current);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
					priv->state = ETH_STATE_ACTIVE;
 | 
										priv->state = ETH_STATE_ACTIVE;
 | 
				
			||||||
 | 
										priv->running = true;
 | 
				
			||||||
					return 0;
 | 
										return 0;
 | 
				
			||||||
				}
 | 
									}
 | 
				
			||||||
			} else {
 | 
								} else {
 | 
				
			||||||
| 
						 | 
					@ -319,13 +321,16 @@ void eth_halt(void)
 | 
				
			||||||
	struct eth_device_priv *priv;
 | 
						struct eth_device_priv *priv;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	current = eth_get_dev();
 | 
						current = eth_get_dev();
 | 
				
			||||||
	if (!current || !eth_is_active(current))
 | 
						if (!current)
 | 
				
			||||||
 | 
							return;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						priv = dev_get_uclass_priv(current);
 | 
				
			||||||
 | 
						if (!priv || !priv->running)
 | 
				
			||||||
		return;
 | 
							return;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	eth_get_ops(current)->stop(current);
 | 
						eth_get_ops(current)->stop(current);
 | 
				
			||||||
	priv = dev_get_uclass_priv(current);
 | 
						priv->state = ETH_STATE_PASSIVE;
 | 
				
			||||||
	if (priv)
 | 
						priv->running = false;
 | 
				
			||||||
		priv->state = ETH_STATE_PASSIVE;
 | 
					 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
int eth_is_active(struct udevice *dev)
 | 
					int eth_is_active(struct udevice *dev)
 | 
				
			||||||
| 
						 | 
					@ -534,6 +539,7 @@ static int eth_post_probe(struct udevice *dev)
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	priv->state = ETH_STATE_INIT;
 | 
						priv->state = ETH_STATE_INIT;
 | 
				
			||||||
 | 
						priv->running = false;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
	/* Check if the device has a valid MAC address in device tree */
 | 
						/* Check if the device has a valid MAC address in device tree */
 | 
				
			||||||
	if (!eth_dev_get_mac_address(dev, pdata->enetaddr) ||
 | 
						if (!eth_dev_get_mac_address(dev, pdata->enetaddr) ||
 | 
				
			||||||
| 
						 | 
					@ -591,8 +597,8 @@ static int eth_pre_remove(struct udevice *dev)
 | 
				
			||||||
	return 0;
 | 
						return 0;
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
UCLASS_DRIVER(eth) = {
 | 
					UCLASS_DRIVER(ethernet) = {
 | 
				
			||||||
	.name		= "eth",
 | 
						.name		= "ethernet",
 | 
				
			||||||
	.id		= UCLASS_ETH,
 | 
						.id		= UCLASS_ETH,
 | 
				
			||||||
	.post_bind	= eth_post_bind,
 | 
						.post_bind	= eth_post_bind,
 | 
				
			||||||
	.pre_unbind	= eth_pre_unbind,
 | 
						.pre_unbind	= eth_pre_unbind,
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -365,7 +365,7 @@ int eth_send(void *packet, int length)
 | 
				
			||||||
	ret = eth_current->send(eth_current, packet, length);
 | 
						ret = eth_current->send(eth_current, packet, length);
 | 
				
			||||||
#if defined(CONFIG_CMD_PCAP)
 | 
					#if defined(CONFIG_CMD_PCAP)
 | 
				
			||||||
	if (ret >= 0)
 | 
						if (ret >= 0)
 | 
				
			||||||
		pcap_post(packet, lengeth, true);
 | 
							pcap_post(packet, length, true);
 | 
				
			||||||
#endif
 | 
					#endif
 | 
				
			||||||
	return ret;
 | 
						return ret;
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -10,6 +10,8 @@
 | 
				
			||||||
#define __NET_RAND_H__
 | 
					#define __NET_RAND_H__
 | 
				
			||||||
 | 
					
 | 
				
			||||||
#include <common.h>
 | 
					#include <common.h>
 | 
				
			||||||
 | 
					#include <dm/uclass.h>
 | 
				
			||||||
 | 
					#include <rng.h>
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/*
 | 
					/*
 | 
				
			||||||
 * Return a seed for the PRNG derived from the eth0 MAC address.
 | 
					 * Return a seed for the PRNG derived from the eth0 MAC address.
 | 
				
			||||||
| 
						 | 
					@ -37,7 +39,22 @@ static inline unsigned int seed_mac(void)
 | 
				
			||||||
 */
 | 
					 */
 | 
				
			||||||
static inline void srand_mac(void)
 | 
					static inline void srand_mac(void)
 | 
				
			||||||
{
 | 
					{
 | 
				
			||||||
	srand(seed_mac());
 | 
						int ret;
 | 
				
			||||||
 | 
						struct udevice *devp;
 | 
				
			||||||
 | 
						u32 randv = 0;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
						if (IS_ENABLED(CONFIG_DM_RNG)) {
 | 
				
			||||||
 | 
							ret = uclass_get_device(UCLASS_RNG, 0, &devp);
 | 
				
			||||||
 | 
							if (ret) {
 | 
				
			||||||
 | 
								ret = dm_rng_read(devp, &randv, sizeof(randv));
 | 
				
			||||||
 | 
								if (ret < 0)
 | 
				
			||||||
 | 
									randv = 0;
 | 
				
			||||||
 | 
							}
 | 
				
			||||||
 | 
						}
 | 
				
			||||||
 | 
						if (randv)
 | 
				
			||||||
 | 
							srand(randv);
 | 
				
			||||||
 | 
						else
 | 
				
			||||||
 | 
							srand(seed_mac());
 | 
				
			||||||
}
 | 
					}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
#endif /* __NET_RAND_H__ */
 | 
					#endif /* __NET_RAND_H__ */
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -90,6 +90,9 @@ void ping_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len)
 | 
				
			||||||
			net_set_state(NETLOOP_SUCCESS);
 | 
								net_set_state(NETLOOP_SUCCESS);
 | 
				
			||||||
		return;
 | 
							return;
 | 
				
			||||||
	case ICMP_ECHO_REQUEST:
 | 
						case ICMP_ECHO_REQUEST:
 | 
				
			||||||
 | 
							if (net_ip.s_addr == 0)
 | 
				
			||||||
 | 
								return;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
		eth_hdr_size = net_update_ether(et, et->et_src, PROT_IP);
 | 
							eth_hdr_size = net_update_ether(et, et->et_src, PROT_IP);
 | 
				
			||||||
 | 
					
 | 
				
			||||||
		debug_cond(DEBUG_DEV_PKT,
 | 
							debug_cond(DEBUG_DEV_PKT,
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
| 
						 | 
					@ -630,8 +630,10 @@ static void tftp_handler(uchar *pkt, unsigned dest, struct in_addr sip,
 | 
				
			||||||
		tftp_cur_block++;
 | 
							tftp_cur_block++;
 | 
				
			||||||
		tftp_cur_block %= TFTP_SEQUENCE_SIZE;
 | 
							tftp_cur_block %= TFTP_SEQUENCE_SIZE;
 | 
				
			||||||
 | 
					
 | 
				
			||||||
		if (tftp_state == STATE_SEND_RRQ)
 | 
							if (tftp_state == STATE_SEND_RRQ) {
 | 
				
			||||||
			debug("Server did not acknowledge any options!\n");
 | 
								debug("Server did not acknowledge any options!\n");
 | 
				
			||||||
 | 
								tftp_next_ack = tftp_windowsize;
 | 
				
			||||||
 | 
							}
 | 
				
			||||||
 | 
					
 | 
				
			||||||
		if (tftp_state == STATE_SEND_RRQ || tftp_state == STATE_OACK ||
 | 
							if (tftp_state == STATE_SEND_RRQ || tftp_state == STATE_OACK ||
 | 
				
			||||||
		    tftp_state == STATE_RECV_WRQ) {
 | 
							    tftp_state == STATE_RECV_WRQ) {
 | 
				
			||||||
| 
						 | 
					
 | 
				
			||||||
		Loading…
	
		Reference in New Issue