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ARM: dts: i.MX6UL: U-Boot specific dts for u-boot, dm-spl 

u-boot,dm-spl property is specific to U-Boot, so move it into
*u-boot.dtsi files for relevant i.MX6UL files.

This make syncing Linux dts files straight forward.

Also update the MAINTAINERS file for dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Jagan Teki 2018-04-11 18:02:22 +05:30 committed by Stefano Babic
parent 067a9daeb5
commit 9faa43c4b5
10 changed files with 93 additions and 13 deletions
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25
arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi Normal file
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@ -0,0 +1,25 @@
/*
* Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "imx6ul-u-boot.dtsi"
&usdhc1 {
u-boot,dm-spl;
};
&iomuxc {
pinctrl_usdhc1: usdhc1grp {
u-boot,dm-spl;
};
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
u-boot,dm-spl;
};
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
u-boot,dm-spl;
};
};

4
arch/arm/dts/imx6ul-geam-kit.dts
View File

@ -87,7 +87,6 @@
}; };
&usdhc1 { &usdhc1 {
u-boot,dm-spl;
pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
@ -135,7 +134,6 @@
}; };
pinctrl_usdhc1: usdhc1grp { pinctrl_usdhc1: usdhc1grp {
u-boot,dm-spl;
fsl,pins = < fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
@ -147,7 +145,6 @@
}; };
pinctrl_usdhc1_100mhz: usdhc1grp100mhz { pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
u-boot,dm-spl;
fsl,pins = < fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
@ -159,7 +156,6 @@
}; };
pinctrl_usdhc1_200mhz: usdhc1grp200mhz { pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
u-boot,dm-spl;
fsl,pins = < fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9

11
arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi Normal file
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@ -0,0 +1,11 @@
/*
* Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "imx6ul-isiot-u-boot.dtsi"
&usdhc2 {
u-boot,dm-spl;
};

1
arch/arm/dts/imx6ul-isiot-emmc.dts
View File

@ -42,6 +42,7 @@
/dts-v1/; /dts-v1/;
#include "imx6ul.dtsi"
#include "imx6ul-isiot.dtsi" #include "imx6ul-isiot.dtsi"
/ { / {

1
arch/arm/dts/imx6ul-isiot-nand.dts
View File

@ -42,6 +42,7 @@
/dts-v1/; /dts-v1/;
#include "imx6ul.dtsi"
#include "imx6ul-isiot.dtsi" #include "imx6ul-isiot.dtsi"
/ { / {

19
arch/arm/dts/imx6ul-isiot-u-boot.dtsi Normal file
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@ -0,0 +1,19 @@
/*
* Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "imx6ul-u-boot.dtsi"
&usdhc1 {
u-boot,dm-spl;
};
&pinctrl_usdhc1 {
u-boot,dm-spl;
};
&pinctrl_usdhc2 {
u-boot,dm-spl;
};

3
arch/arm/dts/imx6ul-isiot.dtsi
View File

@ -42,7 +42,6 @@
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h> #include <dt-bindings/input/input.h>
#include "imx6ul.dtsi"
/ { / {
memory { memory {
@ -82,7 +81,6 @@
}; };
&usdhc1 { &usdhc1 {
u-boot,dm-spl;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-0 = <&pinctrl_usdhc1>;
cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
@ -138,7 +136,6 @@
}; };
pinctrl_usdhc1: usdhc1grp { pinctrl_usdhc1: usdhc1grp {
u-boot,dm-spl;
fsl,pins = < fsl,pins = <
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059

31
arch/arm/dts/imx6ul-u-boot.dtsi Normal file
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@ -0,0 +1,31 @@
/*
* Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/ {
soc {
u-boot,dm-spl;
};
};
&aips1 {
u-boot,dm-spl;
};
&gpio1 {
u-boot,dm-spl;
};
&gpio4 {
u-boot,dm-spl;
};
&iomuxc {
u-boot,dm-spl;
};
&aips2 {
u-boot,dm-spl;
};

6
arch/arm/dts/imx6ul.dtsi
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@ -134,7 +134,6 @@
compatible = "simple-bus"; compatible = "simple-bus";
interrupt-parent = <&gpc>; interrupt-parent = <&gpc>;
ranges; ranges;
u-boot,dm-spl;
pmu { pmu {
compatible = "arm,cortex-a7-pmu"; compatible = "arm,cortex-a7-pmu";
@ -186,7 +185,6 @@
#size-cells = <1>; #size-cells = <1>;
reg = <0x02000000 0x100000>; reg = <0x02000000 0x100000>;
ranges; ranges;
u-boot,dm-spl;
spba-bus@02000000 { spba-bus@02000000 {
compatible = "fsl,spba-bus", "simple-bus"; compatible = "fsl,spba-bus", "simple-bus";
@ -418,7 +416,6 @@
#interrupt-cells = <2>; #interrupt-cells = <2>;
gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>, gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>,
<&iomuxc 16 33 16>; <&iomuxc 16 33 16>;
u-boot,dm-spl;
}; };
gpio2: gpio@020a0000 { gpio2: gpio@020a0000 {
@ -455,7 +452,6 @@
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>; gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
u-boot,dm-spl;
}; };
gpio5: gpio@020ac000 { gpio5: gpio@020ac000 {
@ -654,7 +650,6 @@
iomuxc: iomuxc@020e0000 { iomuxc: iomuxc@020e0000 {
compatible = "fsl,imx6ul-iomuxc"; compatible = "fsl,imx6ul-iomuxc";
reg = <0x020e0000 0x4000>; reg = <0x020e0000 0x4000>;
u-boot,dm-spl;
}; };
gpr: iomuxc-gpr@020e4000 { gpr: iomuxc-gpr@020e4000 {
@ -735,7 +730,6 @@
#size-cells = <1>; #size-cells = <1>;
reg = <0x02100000 0x100000>; reg = <0x02100000 0x100000>;
ranges; ranges;
u-boot,dm-spl;
usbotg1: usb@02184000 { usbotg1: usb@02184000 {
compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";

5
board/engicam/imx6ul/MAINTAINERS
View File

@ -8,7 +8,12 @@ F: configs/imx6ul_geam_nand_defconfig
F: configs/imx6ul_isiot_emmc_defconfig F: configs/imx6ul_isiot_emmc_defconfig
F: configs/imx6ul_isiot_mmc_defconfig F: configs/imx6ul_isiot_mmc_defconfig
F: configs/imx6ul_isiot_nand_defconfig F: configs/imx6ul_isiot_nand_defconfig
F: arch/arm/dts/imx6ul.dtsi
F: arch/arm/dts/imx6ul-u-boot.dtsi
F: arch/arm/dts/imx6ul-geam-kit.dts F: arch/arm/dts/imx6ul-geam-kit.dts
F: arch/arm/dts/imx6ul-geam-kit-u-boot.dtsi
F: arch/arm/dts/imx6ul-isiot.dtsi F: arch/arm/dts/imx6ul-isiot.dtsi
F: arch/arm/dts/imx6ul-isiot-u-boot.dtsi
F: arch/arm/dts/imx6ul-isiot-emmc.dts F: arch/arm/dts/imx6ul-isiot-emmc.dts
F: arch/arm/dts/imx6ul-isiot-emmc-u-boot.dtsi
F: arch/arm/dts/imx6ul-isiot-nand.dts F: arch/arm/dts/imx6ul-isiot-nand.dts