diff --git a/board/nm/nmhw21/board.c b/board/nm/nmhw21/board.c
index 45f511148e..0ae6b1929d 100644
--- a/board/nm/nmhw21/board.c
+++ b/board/nm/nmhw21/board.c
@@ -134,6 +134,14 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define DDR3_CLOCK_FREQUENCY		(400)
 
+
+#if !defined(CONFIG_SPL_BUILD)
+/* Hardware version information of mainboard, loaded by get_hw_version() */
+static int hw_ver = -1;
+static int hw_rev = -1;
+static int hw_patch = -1;
+#endif
+
 #if !defined(CONFIG_SPL_BUILD)
 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
 #endif
@@ -459,13 +467,31 @@ void sdram_init(void)
 static void init_ethernet(void)
 {
 	REQUEST_AND_CLEAR_GPIO(GPIO_RST_ETH_N);
-	REQUEST_AND_CLEAR_GPIO(GPIO_RST_ETH_SW_N);
 	/* Minimum Reset Pulse = 5us (switch), 20us (TJA1100), 100us (SMSC8720) */
 	mdelay(1);
 	gpio_set_value(GPIO_RST_ETH_N, 1);
 }
 
-static void init_ethernet_switch(void)
+static void init_ethernet_v2(void)
+{
+	/* Put switch and PHYs in reset */
+	REQUEST_AND_CLEAR_GPIO(GPIO_RST_ETH_N);
+	REQUEST_AND_CLEAR_GPIO(GPIO_RST_ETH_SW_N);
+
+	/* Take switch out of reset. Minimum Reset Pulse = 5us */
+	mdelay(1);
+	gpio_set_value(GPIO_RST_ETH_SW_N, 1);
+}
+
+static void init_ethernet_phys_v2(void)
+{
+	/* Take Ethernet PHYs out of reset */
+	/* Minimum Reset Pulse = 20us (TJA1102), 100us (SMSC8720) */
+	mdelay(1);
+	gpio_set_value(GPIO_RST_ETH_N, 1);
+}
+
+static void configure_ethernet_switch(void)
 {
 	static struct spi_slave *spi = 0;
 
@@ -678,14 +704,15 @@ static void set_root_partition(void)
 
 static void get_hw_version(void)
 {
-	int hw_ver, hw_rev;
 	char hw_versions[16];
 	char new_env[256];	/* current bootargs = 84 bytes */
 
 	bd_get_hw_version(&hw_ver, &hw_rev);
+	bd_get_hw_patch(&hw_patch);
 	printf("MB:    V%d.%d\n", hw_ver, hw_rev);
 
 	/* add hardware versions to environment */
+	/* TODO: Remove ! */
 	snprintf(hw_versions, sizeof(hw_versions), "CP=%d.%d", hw_ver, hw_rev);
 	snprintf(new_env, sizeof(new_env), "setenv bootargs $bootargs %s", hw_versions);
 	setenv("add_version_bootargs", new_env);
@@ -870,15 +897,26 @@ int board_late_init(void)
 	 * PHY also properly bootstrapped.
 	 * Should be reworked by giving switch a dedicated reset line
 	 */
+	if (hw_ver == 1) {
+		init_ethernet();
+		configure_ethernet_switch();
+		/* FIXME: Reset ETH system again to pin strap PHY */
+		mdelay(10);
+		gpio_set_value(GPIO_RST_ETH_N, 0);
+		mdelay(10);
+		gpio_set_value(GPIO_RST_ETH_N, 1);
+		configure_ethernet_switch();
+	}
+	else {
+		/* TODO: Verify operation */
+		init_ethernet_v2();
+		configure_ethernet_switch();
 
-	init_ethernet();
-	init_ethernet_switch();
-	/* FIXME: Reset ETH system again to pin strap PHY */
-	mdelay(10);
-	gpio_set_value(GPIO_RST_ETH_N, 0);
-	mdelay(10);
-	gpio_set_value(GPIO_RST_ETH_N, 1);
-	init_ethernet_switch();
+		/* Now that Ethernet switch is working, PHY clocks are present.
+		 * Take PHYs out of reset.
+		 */
+		init_ethernet_phys_v2();
+	}
 
 	init_usb_hub();
 	init_user_module();
@@ -1019,17 +1057,13 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
-#if defined(CONFIG_OF_BOARD_SETUP)
+#if defined(CONFIG_OF_BOARD_SETUP) && !defined(CONFIG_SPL_BUILD)
 
 static void ft_hw_version(void *blob)
 {
 	int node_offset;
-	int hw_ver, hw_rev, hw_patch;
 	char hw_version[16];
 
-	bd_get_hw_version(&hw_ver, &hw_rev);
-	bd_get_hw_patch(&hw_patch);
-
 	snprintf(hw_version, sizeof(hw_version), "%d.%d.%d", hw_ver, hw_rev, hw_patch);
 
 	node_offset = fdt_path_offset(blob, "/");