Convert CONFIG_SPL_NAND_LOAD et al to Kconfig
This converts the following to Kconfig: CONFIG_SPL_NAND_LOAD CONFIG_SYS_NAND_BLOCK_SIZE CONFIG_SYS_NAND_PAGE_SIZE CONFIG_SYS_NAND_OOBSIZE Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
		
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			@ -34,18 +34,12 @@
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#define NAND_LARGE_BLOCK_PAGE_SIZE	0x800
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#define NAND_SMALL_BLOCK_PAGE_SIZE	0x200
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#if !defined(CONFIG_SYS_NAND_PAGE_SIZE)
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#define CONFIG_SYS_NAND_PAGE_SIZE	NAND_LARGE_BLOCK_PAGE_SIZE
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#endif
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#if (CONFIG_SYS_NAND_PAGE_SIZE == NAND_LARGE_BLOCK_PAGE_SIZE)
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#define CONFIG_SYS_NAND_OOBSIZE		64
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#define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
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					  48, 49, 50, 51, 52, 53, 54, 55, \
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					  56, 57, 58, 59, 60, 61, 62, 63, }
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
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#elif (CONFIG_SYS_NAND_PAGE_SIZE == NAND_SMALL_BLOCK_PAGE_SIZE)
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#define CONFIG_SYS_NAND_OOBSIZE		16
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#define CONFIG_SYS_NAND_ECCPOS		{ 10, 11, 12, 13, 14, 15, }
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#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
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#else
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			@ -68,6 +68,7 @@ CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x4000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -67,6 +67,7 @@ CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x4000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -70,6 +70,7 @@ CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -69,6 +69,7 @@ CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -68,6 +68,7 @@ CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x4000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -67,6 +67,7 @@ CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x4000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -71,6 +71,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_FLASH_CFI_MTD=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -73,6 +73,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_FLASH_CFI_MTD=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x4000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -72,6 +72,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_FLASH_CFI_MTD=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x4000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -80,6 +80,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_FLASH_CFI_MTD=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -74,6 +74,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_FLASH_CFI_MTD=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -72,6 +72,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_FLASH_CFI_MTD=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -78,6 +78,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_FLASH_CFI_MTD=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -79,6 +79,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_FLASH_CFI_MTD=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_MODE=0
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CONFIG_SF_DEFAULT_SPEED=10000000
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			@ -59,6 +59,9 @@ CONFIG_MMC_OMAP_HS=y
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CONFIG_MMC_OMAP_HS_ADMA=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
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CONFIG_SYS_NAND_PAGE_SIZE=0x800
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CONFIG_SYS_NAND_OOBSIZE=0x40
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CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
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CONFIG_SYS_NAND_U_BOOT_OFFS=0x00080000
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CONFIG_PHY_ADDR_ENABLE=y
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			@ -63,6 +63,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_MMC_OMAP_HS=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
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CONFIG_SYS_NAND_PAGE_SIZE=0x800
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CONFIG_SYS_NAND_OOBSIZE=0x40
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=24000000
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CONFIG_SPI_FLASH_WINBOND=y
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			@ -62,6 +62,8 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_MMC_OMAP_HS=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_PAGE_SIZE=0x800
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CONFIG_SYS_NAND_OOBSIZE=0x40
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# CONFIG_SPL_NAND_AM33XX_BCH is not set
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=24000000
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			@ -88,6 +88,9 @@ CONFIG_MISC=y
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CONFIG_MTD=y
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CONFIG_DM_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
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CONFIG_SYS_NAND_PAGE_SIZE=0x1000
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CONFIG_SYS_NAND_OOBSIZE=0x100
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CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
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CONFIG_SYS_NAND_U_BOOT_OFFS=0x100000
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CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x200000
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			@ -56,6 +56,8 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_MMC_OMAP_HS=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_PAGE_SIZE=0x800
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CONFIG_SYS_NAND_OOBSIZE=0x40
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=24000000
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CONFIG_SPI_FLASH_WINBOND=y
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			@ -58,6 +58,8 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_MMC_OMAP_HS=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_PAGE_SIZE=0x800
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CONFIG_SYS_NAND_OOBSIZE=0x40
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=24000000
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CONFIG_SPI_FLASH_WINBOND=y
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			@ -72,6 +72,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_MMC_OMAP_HS=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
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CONFIG_SYS_NAND_PAGE_SIZE=0x800
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CONFIG_SYS_NAND_OOBSIZE=0x40
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CONFIG_MTD_UBI_FASTMAP=y
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CONFIG_PHY_SMSC=y
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CONFIG_MII=y
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			@ -57,6 +57,9 @@ CONFIG_DM_PCA953X=y
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CONFIG_MMC_OMAP_HS=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
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CONFIG_SYS_NAND_PAGE_SIZE=0x800
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CONFIG_SYS_NAND_OOBSIZE=0x40
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CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
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CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
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CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
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			@ -60,6 +60,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_MMC_OMAP_HS=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
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CONFIG_SYS_NAND_PAGE_SIZE=0x1000
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CONFIG_SYS_NAND_OOBSIZE=0xe0
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CONFIG_SF_DEFAULT_SPEED=48000000
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_PHY_GIGE=y
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			@ -47,6 +47,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_MMC_OMAP_HS=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
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CONFIG_SYS_NAND_PAGE_SIZE=0x1000
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CONFIG_SYS_NAND_OOBSIZE=0xe0
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CONFIG_SF_DEFAULT_SPEED=48000000
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_PHY_GIGE=y
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			@ -63,6 +63,9 @@ CONFIG_MISC=y
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CONFIG_MMC_OMAP_HS=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
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CONFIG_SYS_NAND_PAGE_SIZE=0x1000
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CONFIG_SYS_NAND_OOBSIZE=0xe0
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CONFIG_SF_DEFAULT_SPEED=48000000
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_PHY_GIGE=y
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			@ -65,6 +65,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
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CONFIG_MMC_OMAP_HS=y
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CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
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CONFIG_SYS_NAND_PAGE_SIZE=0x1000
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CONFIG_SYS_NAND_OOBSIZE=0xe0
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CONFIG_SF_DEFAULT_SPEED=48000000
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_PHY_GIGE=y
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			@ -43,6 +43,8 @@ CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_MTD=y
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CONFIG_NAND_ATMEL=y
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CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
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CONFIG_SYS_NAND_PAGE_SIZE=0x800
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CONFIG_SYS_NAND_OOBSIZE=0x40
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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CONFIG_SPI_FLASH_ATMEL=y
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			@ -50,6 +50,8 @@ CONFIG_MTD=y
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CONFIG_MTD_RAW_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
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CONFIG_SYS_NAND_PAGE_SIZE=0x800
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CONFIG_SYS_NAND_OOBSIZE=0x40
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=30000000
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CONFIG_SPI_FLASH_ATMEL=y
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			@ -48,6 +48,8 @@ CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_MTD=y
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CONFIG_NAND_ATMEL=y
 | 
			
		||||
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SF_DEFAULT_SPEED=30000000
 | 
			
		||||
CONFIG_SPI_FLASH_ATMEL=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -73,6 +73,9 @@ CONFIG_MTD=y
 | 
			
		|||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
 | 
			
		||||
CONFIG_NAND_ATMEL=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SPI_FLASH_STMICRO=y
 | 
			
		||||
CONFIG_PHYLIB=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -89,6 +89,9 @@ CONFIG_MISC=y
 | 
			
		|||
# CONFIG_MMC is not set
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 | 
			
		||||
CONFIG_PHY_NATSEMI=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -53,6 +53,9 @@ CONFIG_MISC=y
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_PHY_SMSC=y
 | 
			
		||||
CONFIG_DM_ETH=y
 | 
			
		||||
CONFIG_MII=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -61,6 +61,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_PHY_ATHEROS=y
 | 
			
		||||
CONFIG_MII=y
 | 
			
		||||
CONFIG_DRIVER_TI_CPSW=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -69,6 +69,8 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SF_DEFAULT_SPEED=48000000
 | 
			
		||||
CONFIG_SPI_FLASH_ATMEL=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -61,6 +61,9 @@ CONFIG_MTD=y
 | 
			
		|||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
 | 
			
		||||
CONFIG_NAND_ATMEL=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_PHYLIB=y
 | 
			
		||||
CONFIG_ATMEL_USART=y
 | 
			
		||||
CONFIG_USB=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -68,6 +68,9 @@ CONFIG_DM_MTD=y
 | 
			
		|||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_USE_FLASH_BBT=y
 | 
			
		||||
CONFIG_NAND_DAVINCI=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -53,6 +53,9 @@ CONFIG_SYS_FLASH_CFI=y
 | 
			
		|||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_USE_FLASH_BBT=y
 | 
			
		||||
CONFIG_NAND_LPC32XX_SLC=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_PHYLIB=y
 | 
			
		||||
CONFIG_PHY_ADDR_ENABLE=y
 | 
			
		||||
CONFIG_PHY_ADDR=31
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -41,6 +41,9 @@ CONFIG_TWL4030_LED=y
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 | 
			
		||||
CONFIG_CONS_INDEX=3
 | 
			
		||||
CONFIG_OF_LIBFDT=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -92,6 +92,9 @@ CONFIG_SPL_MMC_HS200_SUPPORT=y
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SF_DEFAULT_MODE=0
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -95,6 +95,8 @@ CONFIG_SPL_MMC_HS200_SUPPORT=y
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SF_DEFAULT_MODE=0
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -84,6 +84,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SPI_FLASH_WINBOND=y
 | 
			
		||||
CONFIG_MTD_UBI_FASTMAP=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -85,6 +85,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0xe0
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SPI_FLASH_WINBOND=y
 | 
			
		||||
CONFIG_MTD_UBI_FASTMAP=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -87,6 +87,9 @@ CONFIG_MTD=y
 | 
			
		|||
CONFIG_NAND_ATMEL=y
 | 
			
		||||
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 | 
			
		||||
CONFIG_MTD_UBI_FASTMAP=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_DM_ETH=y
 | 
			
		||||
CONFIG_MACB=y
 | 
			
		||||
CONFIG_PINCTRL=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -60,6 +60,9 @@ CONFIG_MMC_OMAP_HS=y
 | 
			
		|||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_SYS_MTDPARTS_RUNTIME=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 | 
			
		||||
CONFIG_MTD_UBI_FASTMAP=y
 | 
			
		||||
CONFIG_SMC911X=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -86,6 +86,7 @@ CONFIG_MTD_NOR_FLASH=y
 | 
			
		|||
CONFIG_FLASH_CFI_DRIVER=y
 | 
			
		||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 | 
			
		||||
CONFIG_SYS_FLASH_CFI=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_PHY_REALTEK=y
 | 
			
		||||
CONFIG_PHY_GIGE=y
 | 
			
		||||
CONFIG_E1000=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -79,6 +79,7 @@ CONFIG_MTD_NOR_FLASH=y
 | 
			
		|||
CONFIG_FLASH_CFI_DRIVER=y
 | 
			
		||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 | 
			
		||||
CONFIG_SYS_FLASH_CFI=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SF_DEFAULT_BUS=1
 | 
			
		||||
CONFIG_PHYLIB=y
 | 
			
		||||
CONFIG_PHYLIB_10G=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -61,6 +61,7 @@ CONFIG_MTD_NOR_FLASH=y
 | 
			
		|||
CONFIG_FLASH_CFI_DRIVER=y
 | 
			
		||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 | 
			
		||||
CONFIG_SYS_FLASH_CFI=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SF_DEFAULT_BUS=1
 | 
			
		||||
CONFIG_PHYLIB=y
 | 
			
		||||
CONFIG_PHY_AQUANTIA=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -69,6 +69,7 @@ CONFIG_MTD_NOR_FLASH=y
 | 
			
		|||
CONFIG_FLASH_CFI_DRIVER=y
 | 
			
		||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 | 
			
		||||
CONFIG_SYS_FLASH_CFI=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SF_DEFAULT_BUS=1
 | 
			
		||||
CONFIG_PHYLIB=y
 | 
			
		||||
CONFIG_PHY_AQUANTIA=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -61,6 +61,7 @@ CONFIG_SYS_I2C_EARLY_INIT=y
 | 
			
		|||
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 | 
			
		||||
CONFIG_FSL_ESDHC=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
# CONFIG_SPI_FLASH_BAR is not set
 | 
			
		||||
CONFIG_PHYLIB=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -63,6 +63,7 @@ CONFIG_MTD_NOR_FLASH=y
 | 
			
		|||
CONFIG_FLASH_CFI_DRIVER=y
 | 
			
		||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 | 
			
		||||
CONFIG_SYS_FLASH_CFI=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x80000
 | 
			
		||||
CONFIG_PHYLIB=y
 | 
			
		||||
CONFIG_PHY_AQUANTIA=y
 | 
			
		||||
CONFIG_PHY_CORTINA=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -78,6 +78,9 @@ CONFIG_MTD=y
 | 
			
		|||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_USE_FLASH_BBT=y
 | 
			
		||||
CONFIG_NAND_MXC=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_PHYLIB=y
 | 
			
		||||
CONFIG_PHY_MICREL=y
 | 
			
		||||
CONFIG_PHY_MICREL_KSZ8XXX=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -57,6 +57,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -62,6 +62,9 @@ CONFIG_FLASH_CFI_MTD=y
 | 
			
		|||
CONFIG_SYS_FLASH_PROTECTION=y
 | 
			
		||||
CONFIG_SYS_FLASH_CFI=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -74,6 +74,9 @@ CONFIG_TWL4030_LED=y
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -62,6 +62,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -57,6 +57,9 @@ CONFIG_MMC_OMAP_HS=y
 | 
			
		|||
CONFIG_MMC_OMAP36XX_PINS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -63,6 +63,9 @@ CONFIG_FLASH_CFI_MTD=y
 | 
			
		|||
CONFIG_SYS_FLASH_PROTECTION=y
 | 
			
		||||
CONFIG_SYS_FLASH_CFI=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -65,6 +65,9 @@ CONFIG_DM_MTD=y
 | 
			
		|||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_USE_FLASH_BBT=y
 | 
			
		||||
CONFIG_NAND_DAVINCI=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -66,6 +66,9 @@ CONFIG_MMC_OMAP_HS=y
 | 
			
		|||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_DM_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -66,6 +66,9 @@ CONFIG_MMC_OMAP_HS=y
 | 
			
		|||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_DM_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 | 
			
		||||
CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x100000
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -84,6 +84,9 @@ CONFIG_SYS_I2C_SPEED=400000
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SPI_FLASH_WINBOND=y
 | 
			
		||||
CONFIG_MTD_UBI_FASTMAP=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -84,6 +84,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SPI_FLASH_WINBOND=y
 | 
			
		||||
CONFIG_MTD_UBI_FASTMAP=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -84,6 +84,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SPI_FLASH_WINBOND=y
 | 
			
		||||
CONFIG_MTD_UBI_FASTMAP=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -49,6 +49,8 @@ CONFIG_MTD=y
 | 
			
		|||
CONFIG_NAND_ATMEL=y
 | 
			
		||||
CONFIG_PMECC_CAP=4
 | 
			
		||||
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SF_DEFAULT_SPEED=30000000
 | 
			
		||||
CONFIG_SPI_FLASH_ATMEL=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -69,6 +69,9 @@ CONFIG_MTD=y
 | 
			
		|||
CONFIG_NAND_ATMEL=y
 | 
			
		||||
CONFIG_PMECC_CAP=4
 | 
			
		||||
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_DM_ETH=y
 | 
			
		||||
CONFIG_MACB=y
 | 
			
		||||
CONFIG_PINCTRL=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -71,6 +71,9 @@ CONFIG_SYS_FLASH_CFI=y
 | 
			
		|||
CONFIG_NAND_ATMEL=y
 | 
			
		||||
CONFIG_PMECC_CAP=4
 | 
			
		||||
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SF_DEFAULT_SPEED=30000000
 | 
			
		||||
CONFIG_SPI_FLASH_ATMEL=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -66,6 +66,9 @@ CONFIG_MTD=y
 | 
			
		|||
CONFIG_NAND_ATMEL=y
 | 
			
		||||
CONFIG_PMECC_CAP=8
 | 
			
		||||
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0xe0
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SF_DEFAULT_SPEED=30000000
 | 
			
		||||
CONFIG_SPI_FLASH_ATMEL=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -64,6 +64,9 @@ CONFIG_MTD=y
 | 
			
		|||
CONFIG_NAND_ATMEL=y
 | 
			
		||||
CONFIG_PMECC_CAP=8
 | 
			
		||||
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x40000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x1000
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0xe0
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SF_DEFAULT_SPEED=30000000
 | 
			
		||||
CONFIG_SPI_FLASH_ATMEL=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -63,6 +63,9 @@ CONFIG_MTD=y
 | 
			
		|||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
 | 
			
		||||
CONFIG_NAND_ATMEL=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_PHYLIB=y
 | 
			
		||||
CONFIG_ATMEL_USART=y
 | 
			
		||||
CONFIG_USB=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -79,6 +79,9 @@ CONFIG_MTD=y
 | 
			
		|||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
 | 
			
		||||
CONFIG_NAND_ATMEL=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SPI_FLASH_STMICRO=y
 | 
			
		||||
CONFIG_PHYLIB=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -84,6 +84,9 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_DM_SPI_FLASH=y
 | 
			
		||||
CONFIG_SPI_FLASH_WINBOND=y
 | 
			
		||||
CONFIG_MTD_UBI_FASTMAP=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -59,6 +59,9 @@ CONFIG_SYS_I2C_OMAP24XX=y
 | 
			
		|||
CONFIG_MMC_OMAP_HS=y
 | 
			
		||||
CONFIG_MTD=y
 | 
			
		||||
CONFIG_MTD_RAW_NAND=y
 | 
			
		||||
CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
 | 
			
		||||
CONFIG_SYS_NAND_PAGE_SIZE=0x800
 | 
			
		||||
CONFIG_SYS_NAND_OOBSIZE=0x40
 | 
			
		||||
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 | 
			
		||||
CONFIG_DM_ETH=y
 | 
			
		||||
CONFIG_MII=y
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -109,6 +109,10 @@ config KEYSTONE_RBL_NAND
 | 
			
		|||
	depends on ARCH_KEYSTONE
 | 
			
		||||
	def_bool y
 | 
			
		||||
 | 
			
		||||
config SPL_NAND_LOAD
 | 
			
		||||
	def_bool y
 | 
			
		||||
	depends on NAND_DAVINCI && ARCH_DAVINCI && SPL_NAND_SUPPORT
 | 
			
		||||
 | 
			
		||||
config NAND_DENALI
 | 
			
		||||
	bool
 | 
			
		||||
	select SYS_NAND_SELF_INIT
 | 
			
		||||
| 
						 | 
				
			
			@ -359,7 +363,8 @@ comment "Generic NAND options"
 | 
			
		|||
 | 
			
		||||
config SYS_NAND_BLOCK_SIZE
 | 
			
		||||
	hex "NAND chip eraseblock size"
 | 
			
		||||
	depends on ARCH_SUNXI
 | 
			
		||||
	depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT
 | 
			
		||||
	depends on !NAND_MXS_DT && !NAND_DENALI_DT && !NAND_LPC32XX_MLC
 | 
			
		||||
	help
 | 
			
		||||
	  Number of data bytes in one eraseblock for the NAND chip on the
 | 
			
		||||
	  board. This is the multiple of NAND_PAGE_SIZE and the number of
 | 
			
		||||
| 
						 | 
				
			
			@ -367,14 +372,20 @@ config SYS_NAND_BLOCK_SIZE
 | 
			
		|||
 | 
			
		||||
config SYS_NAND_PAGE_SIZE
 | 
			
		||||
	hex "NAND chip page size"
 | 
			
		||||
	depends on ARCH_SUNXI
 | 
			
		||||
	depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \
 | 
			
		||||
		SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \
 | 
			
		||||
		(NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER
 | 
			
		||||
	depends on !NAND_MXS_DT && !NAND_DENALI_DT && !NAND_LPC32XX_MLC
 | 
			
		||||
	help
 | 
			
		||||
	  Number of data bytes in one page for the NAND chip on the
 | 
			
		||||
	  board, not including the OOB area.
 | 
			
		||||
 | 
			
		||||
config SYS_NAND_OOBSIZE
 | 
			
		||||
	hex "NAND chip OOB size"
 | 
			
		||||
	depends on ARCH_SUNXI
 | 
			
		||||
	depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \
 | 
			
		||||
		SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \
 | 
			
		||||
		(NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER
 | 
			
		||||
	depends on !NAND_MXS_DT && !NAND_DENALI_DT && !NAND_LPC32XX_MLC
 | 
			
		||||
	help
 | 
			
		||||
	  Number of bytes in the Out-Of-Band area for the NAND chip on
 | 
			
		||||
	  the board.
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -309,7 +309,6 @@ extern unsigned long get_sdram_size(void);
 | 
			
		|||
				| CSOR_NAND_PGS_512	/* Page Size = 512b */ \
 | 
			
		||||
				| CSOR_NAND_SPRZ_16	/* Spare size = 16 */ \
 | 
			
		||||
				| CSOR_NAND_PB(32))	/* 32 Pages Per Block */
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(16 * 1024)
 | 
			
		||||
 | 
			
		||||
#elif defined(CONFIG_TARGET_P1010RDB_PB)
 | 
			
		||||
#define CONFIG_SYS_NAND_ONFI_DETECTION
 | 
			
		||||
| 
						 | 
				
			
			@ -320,7 +319,6 @@ extern unsigned long get_sdram_size(void);
 | 
			
		|||
				| CSOR_NAND_PGS_4K      /* Page Size = 4K */ \
 | 
			
		||||
				| CSOR_NAND_SPRZ_224    /* Spare size = 224 */ \
 | 
			
		||||
				| CSOR_NAND_PB(128))  /*Pages Per Block = 128 */
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE     (512 * 1024)
 | 
			
		||||
#endif
 | 
			
		||||
 | 
			
		||||
#define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -171,7 +171,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 | 
			
		|||
 | 
			
		||||
#define CONFIG_SYS_NAND_BASE_LIST     {CONFIG_SYS_NAND_BASE}
 | 
			
		||||
#define CONFIG_SYS_MAX_NAND_DEVICE	1
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE    (128 * 1024)
 | 
			
		||||
 | 
			
		||||
/* NAND flash config */
 | 
			
		||||
#define CONFIG_SYS_NAND_BR_PRELIM  (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
 | 
			
		||||
| 
						 | 
				
			
			@ -379,7 +378,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 | 
			
		|||
 */
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 1680)
 | 
			
		||||
#elif defined(CONFIG_MTD_RAW_NAND)
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR	(8 * (128 * 1024))
 | 
			
		||||
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 | 
			
		||||
/*
 | 
			
		||||
 * Slave has no ucode locally, it can fetch this from remote. When implementing
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -264,7 +264,6 @@ unsigned long get_board_sys_clk(void);
 | 
			
		|||
				| CSOR_NAND_PGS_4K	/* Page Size = 4K */ \
 | 
			
		||||
				| CSOR_NAND_SPRZ_224	/* Spare size = 224 */ \
 | 
			
		||||
				| CSOR_NAND_PB(64))	/*Pages Per Block = 64*/
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(512 * 1024)
 | 
			
		||||
#elif defined(CONFIG_TARGET_T1023RDB)
 | 
			
		||||
#define CONFIG_SYS_NAND_CSOR	(CSOR_NAND_ECC_ENC_EN   /* ECC on encode */ \
 | 
			
		||||
				| CSOR_NAND_ECC_DEC_EN  /* ECC on decode */ \
 | 
			
		||||
| 
						 | 
				
			
			@ -273,7 +272,6 @@ unsigned long get_board_sys_clk(void);
 | 
			
		|||
				| CSOR_NAND_PGS_2K	/* Page Size = 2K */ \
 | 
			
		||||
				| CSOR_NAND_SPRZ_128	/* Spare size = 128 */ \
 | 
			
		||||
				| CSOR_NAND_PB(64))	/*Pages Per Block = 64*/
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
 | 
			
		||||
#endif
 | 
			
		||||
 | 
			
		||||
#define CONFIG_SYS_NAND_ONFI_DETECTION
 | 
			
		||||
| 
						 | 
				
			
			@ -520,14 +518,6 @@ unsigned long get_board_sys_clk(void);
 | 
			
		|||
 */
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR		(512 * 0x820)
 | 
			
		||||
#define CONFIG_SYS_QE_FW_ADDR		(512 * 0x920)
 | 
			
		||||
#elif defined(CONFIG_MTD_RAW_NAND)
 | 
			
		||||
#if defined(CONFIG_TARGET_T1024RDB)
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR		(3 * CONFIG_SYS_NAND_BLOCK_SIZE)
 | 
			
		||||
#define CONFIG_SYS_QE_FW_ADDR		(4 * CONFIG_SYS_NAND_BLOCK_SIZE)
 | 
			
		||||
#elif defined(CONFIG_TARGET_T1023RDB)
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR		(11 * CONFIG_SYS_NAND_BLOCK_SIZE)
 | 
			
		||||
#define CONFIG_SYS_QE_FW_ADDR		(12 * CONFIG_SYS_NAND_BLOCK_SIZE)
 | 
			
		||||
#endif
 | 
			
		||||
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 | 
			
		||||
/*
 | 
			
		||||
 * Slave has no ucode locally, it can fetch this from remote. When implementing
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -275,8 +275,6 @@
 | 
			
		|||
#define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
 | 
			
		||||
#define CONFIG_SYS_MAX_NAND_DEVICE	1
 | 
			
		||||
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(512 * 1024)
 | 
			
		||||
 | 
			
		||||
#if defined(CONFIG_MTD_RAW_NAND)
 | 
			
		||||
#define CONFIG_SYS_CSPR0_EXT		CONFIG_SYS_NAND_CSPR_EXT
 | 
			
		||||
#define CONFIG_SYS_CSPR0		CONFIG_SYS_NAND_CSPR
 | 
			
		||||
| 
						 | 
				
			
			@ -520,8 +518,6 @@
 | 
			
		|||
 * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
 | 
			
		||||
 */
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 0x820)
 | 
			
		||||
#elif defined(CONFIG_MTD_RAW_NAND)
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR	(5 * CONFIG_SYS_NAND_BLOCK_SIZE)
 | 
			
		||||
#else
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR		0xEFF00000
 | 
			
		||||
#endif
 | 
			
		||||
| 
						 | 
				
			
			@ -530,8 +526,6 @@
 | 
			
		|||
#define CONFIG_SYS_QE_FW_ADDR		0x130000
 | 
			
		||||
#elif defined(CONFIG_SDCARD)
 | 
			
		||||
#define CONFIG_SYS_QE_FW_ADDR		(512 * 0x920)
 | 
			
		||||
#elif defined(CONFIG_MTD_RAW_NAND)
 | 
			
		||||
#define CONFIG_SYS_QE_FW_ADDR		(7 * CONFIG_SYS_NAND_BLOCK_SIZE)
 | 
			
		||||
#else
 | 
			
		||||
#define CONFIG_SYS_QE_FW_ADDR		0xEFF10000
 | 
			
		||||
#endif
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -252,7 +252,6 @@ unsigned long get_board_sys_clk(void);
 | 
			
		|||
#define CONFIG_SYS_NAND_DDR_LAW		11
 | 
			
		||||
#define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
 | 
			
		||||
#define CONFIG_SYS_MAX_NAND_DEVICE	1
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
 | 
			
		||||
 | 
			
		||||
#if defined(CONFIG_MTD_RAW_NAND)
 | 
			
		||||
#define CONFIG_SYS_CSPR0_EXT		CONFIG_SYS_NAND_CSPR_EXT
 | 
			
		||||
| 
						 | 
				
			
			@ -500,8 +499,6 @@ unsigned long get_board_sys_clk(void);
 | 
			
		|||
 * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
 | 
			
		||||
 */
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 0x820)
 | 
			
		||||
#elif defined(CONFIG_MTD_RAW_NAND)
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR	(11 * CONFIG_SYS_NAND_BLOCK_SIZE)
 | 
			
		||||
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 | 
			
		||||
/*
 | 
			
		||||
 * Slave has no ucode locally, it can fetch this from remote. When implementing
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -226,7 +226,6 @@ unsigned long get_board_sys_clk(void);
 | 
			
		|||
#define CONFIG_SYS_NAND_DDR_LAW		11
 | 
			
		||||
#define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
 | 
			
		||||
#define CONFIG_SYS_MAX_NAND_DEVICE	1
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(512 * 1024)
 | 
			
		||||
 | 
			
		||||
#if defined(CONFIG_MTD_RAW_NAND)
 | 
			
		||||
#define CONFIG_SYS_CSPR0_EXT		CONFIG_SYS_NAND_CSPR_EXT
 | 
			
		||||
| 
						 | 
				
			
			@ -454,8 +453,6 @@ unsigned long get_board_sys_clk(void);
 | 
			
		|||
 */
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR		(512 * 0x820)
 | 
			
		||||
 | 
			
		||||
#elif defined(CONFIG_MTD_RAW_NAND)
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR		(3 * CONFIG_SYS_NAND_BLOCK_SIZE)
 | 
			
		||||
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 | 
			
		||||
/*
 | 
			
		||||
 * Slave has no ucode locally, it can fetch this from remote. When implementing
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -325,8 +325,6 @@ unsigned long get_board_sys_clk(void);
 | 
			
		|||
#define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
 | 
			
		||||
#define CONFIG_SYS_MAX_NAND_DEVICE	1
 | 
			
		||||
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(512 * 1024)
 | 
			
		||||
 | 
			
		||||
#if defined(CONFIG_MTD_RAW_NAND)
 | 
			
		||||
#define CONFIG_SYS_CSPR0_EXT		CONFIG_SYS_NAND_CSPR_EXT
 | 
			
		||||
#define CONFIG_SYS_CSPR0		CONFIG_SYS_NAND_CSPR
 | 
			
		||||
| 
						 | 
				
			
			@ -475,8 +473,6 @@ unsigned long get_board_sys_clk(void);
 | 
			
		|||
 * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
 | 
			
		||||
 */
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 0x820)
 | 
			
		||||
#elif defined(CONFIG_MTD_RAW_NAND)
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 | 
			
		||||
#else
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR	0xEFF00000
 | 
			
		||||
#endif
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -183,9 +183,6 @@
 | 
			
		|||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 | 
			
		||||
					 CONFIG_SYS_NAND_PAGE_SIZE)
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 | 
			
		||||
/* NAND: driver related configs */
 | 
			
		||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
 | 
			
		||||
| 
						 | 
				
			
			@ -261,8 +258,6 @@
 | 
			
		|||
/* SPL related */
 | 
			
		||||
#elif defined(CONFIG_EMMC_BOOT)
 | 
			
		||||
#define CONFIG_SYS_MMC_MAX_DEVICE	2
 | 
			
		||||
#elif defined(CONFIG_ENV_IS_IN_NAND)
 | 
			
		||||
#define CONFIG_SYS_ENV_SECT_SIZE	CONFIG_SYS_NAND_BLOCK_SIZE
 | 
			
		||||
#endif
 | 
			
		||||
 | 
			
		||||
/* Network. */
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -110,9 +110,6 @@
 | 
			
		|||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
 | 
			
		||||
					CONFIG_SYS_NAND_PAGE_SIZE)
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE       4096
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE         256
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE      (256 * 1024)
 | 
			
		||||
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCPOS  {   2,   3,   4,   5,   6,   7,   8,   9, \
 | 
			
		||||
			 10,  11,  12,  13,  14,  15,  16,  17,  18,  19, \
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -109,9 +109,6 @@
 | 
			
		|||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 | 
			
		||||
					 CONFIG_SYS_NAND_PAGE_SIZE)
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 | 
			
		||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
 | 
			
		||||
					 10, 11, 12, 13, 14, 15, 16, 17, \
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -21,9 +21,6 @@
 | 
			
		|||
#ifdef CONFIG_MTD_RAW_NAND
 | 
			
		||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	64
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
 | 
			
		||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCPOS		{ 2,  3,  4,  5,  6,  7,  8,  9, 10, \
 | 
			
		||||
					 11, 12, 13, 14, 16, 17, 18, 19, 20, \
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -157,9 +157,6 @@
 | 
			
		|||
/* NAND support */
 | 
			
		||||
#ifdef CONFIG_MTD_RAW_NAND
 | 
			
		||||
/* NAND: device related configs */
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	4096
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		224
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(256*1024)
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 | 
			
		||||
					 CONFIG_SYS_NAND_PAGE_SIZE)
 | 
			
		||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -97,13 +97,10 @@
 | 
			
		|||
#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x80000
 | 
			
		||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	64
 | 
			
		||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCSIZE		256
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCBYTES	3
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
 | 
			
		||||
					  48, 49, 50, 51, 52, 53, 54, 55, \
 | 
			
		||||
					  56, 57, 58, 59, 60, 61, 62, 63, }
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -116,10 +116,7 @@
 | 
			
		|||
#endif
 | 
			
		||||
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
 | 
			
		||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	64
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
 | 
			
		||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
 | 
			
		||||
 | 
			
		||||
#endif
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -99,10 +99,7 @@
 | 
			
		|||
#endif
 | 
			
		||||
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
 | 
			
		||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	64
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
 | 
			
		||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
 | 
			
		||||
 | 
			
		||||
#endif
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -212,9 +212,6 @@
 | 
			
		|||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 | 
			
		||||
					 CONFIG_SYS_NAND_PAGE_SIZE)
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 | 
			
		||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
 | 
			
		||||
					 10, 11, 12, 13, 14, 15, 16, 17, \
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -147,11 +147,8 @@ NANDTGTS \
 | 
			
		|||
/* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */
 | 
			
		||||
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW
 | 
			
		||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 | 
			
		||||
					CONFIG_SYS_NAND_PAGE_SIZE)
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9, \
 | 
			
		||||
					10, 11, 12, 13, 14, 15, 16, 17, \
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -126,9 +126,6 @@
 | 
			
		|||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 | 
			
		||||
					 CONFIG_SYS_NAND_PAGE_SIZE)
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 | 
			
		||||
/* NAND: driver related configs */
 | 
			
		||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -88,9 +88,6 @@
 | 
			
		|||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 | 
			
		||||
					 CONFIG_SYS_NAND_PAGE_SIZE)
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
 | 
			
		||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
 | 
			
		||||
					 10, 11, 12, 13, 14, 15, 16, 17, \
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -24,9 +24,6 @@
 | 
			
		|||
/* NAND support */
 | 
			
		||||
#define CONFIG_SYS_NAND_ONFI_DETECTION
 | 
			
		||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
 | 
			
		||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCSIZE		512
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCBYTES	14
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -172,7 +172,6 @@
 | 
			
		|||
 | 
			
		||||
#define CONFIG_SYS_NAND_BASE_LIST     {CONFIG_SYS_NAND_BASE}
 | 
			
		||||
#define CONFIG_SYS_MAX_NAND_DEVICE	1
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE    (128 * 1024)
 | 
			
		||||
 | 
			
		||||
/* NAND flash config */
 | 
			
		||||
#define CONFIG_SYS_NAND_BR_PRELIM  (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
 | 
			
		||||
| 
						 | 
				
			
			@ -382,7 +381,7 @@
 | 
			
		|||
 */
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR	(512 * 1680)
 | 
			
		||||
#elif defined(CONFIG_MTD_RAW_NAND)
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 | 
			
		||||
#define CONFIG_SYS_FMAN_FW_ADDR	(8 * (128 * 1024))
 | 
			
		||||
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 | 
			
		||||
/*
 | 
			
		||||
 * Slave has no ucode locally, it can fetch this from remote. When implementing
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -99,14 +99,11 @@
 | 
			
		|||
#define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
 | 
			
		||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	SZ_2K
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(SZ_128K)
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 | 
			
		||||
					 CONFIG_SYS_NAND_PAGE_SIZE)
 | 
			
		||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCSIZE		256
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCBYTES	3
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
 | 
			
		||||
					  48, 49, 50, 51, 52, 53, 54, 55, \
 | 
			
		||||
					  56, 57, 58, 59, 60, 61, 62, 63, }
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -122,8 +122,6 @@
 | 
			
		|||
#define CONFIG_SYS_MAX_NAND_DEVICE	1 /* Max number of NAND devices */
 | 
			
		||||
#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
 | 
			
		||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	(2 << 10)
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 << 10)
 | 
			
		||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x40000
 | 
			
		||||
#define CONFIG_SYS_NAND_U_BOOT_DST	0xc1080000
 | 
			
		||||
#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_NAND_U_BOOT_DST
 | 
			
		||||
| 
						 | 
				
			
			@ -141,8 +139,6 @@
 | 
			
		|||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCSIZE		512
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCBYTES	10
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SPL_NAND_LOAD
 | 
			
		||||
 | 
			
		||||
#ifndef CONFIG_SPL_BUILD
 | 
			
		||||
#define CONFIG_SYS_NAND_SELF_INIT
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -64,9 +64,6 @@
 | 
			
		|||
#define CONFIG_LPC32XX_NAND_SLC_RHOLD		200000000
 | 
			
		||||
#define CONFIG_LPC32XX_NAND_SLC_RSETUP		50000000
 | 
			
		||||
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE		0x20000
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE		NAND_LARGE_BLOCK_PAGE_SIZE
 | 
			
		||||
 | 
			
		||||
/*
 | 
			
		||||
 * USB
 | 
			
		||||
 */
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -135,9 +135,6 @@
 | 
			
		|||
/* NAND boot config */
 | 
			
		||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	64
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 | 
			
		||||
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
 | 
			
		||||
#define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
 | 
			
		||||
						10, 11, 12, 13}
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
| 
						 | 
				
			
			@ -80,9 +80,6 @@
 | 
			
		|||
/* NAND support */
 | 
			
		||||
#ifdef CONFIG_MTD_RAW_NAND
 | 
			
		||||
/* NAND: device related configs */
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
 | 
			
		||||
#define CONFIG_SYS_NAND_OOBSIZE		64
 | 
			
		||||
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
 | 
			
		||||
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
 | 
			
		||||
					 CONFIG_SYS_NAND_PAGE_SIZE)
 | 
			
		||||
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 | 
			
		||||
| 
						 | 
				
			
			
 | 
			
		|||
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