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mtd: spi-nor-core: Do not make invalid quad enable fatal 

The Micron MT35XU512ABA flash does not support the quad enable bit. But
instead of programming the Quad Enable Require field to 000b ("Device
does not have a QE bit"), it is programmed to 111b ("Reserved").

While this is technically incorrect, it is not reason enough to abort
BFPT parsing. Instead, continue BFPT parsing assuming there is no quad
enable bit present.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
This commit is contained in:
Pratyush Yadav 2021-04-14 23:53:16 +05:30 committed by Praneeth Bajjuri
parent 269272eb07
commit a640a9b7e1
1 changed files with 2 additions and 1 deletions
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3
drivers/mtd/spi/spi-nor-core.c
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@ -2094,7 +2094,8 @@ static int spi_nor_parse_bfpt(struct spi_nor *nor,
break;
#endif
default:
return -EINVAL;
dev_dbg(nor->dev, "BFPT QER reserved value used\n");
break;
}
/* Stop here if JESD216 rev B. */