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MLK-20154-2 imx8mm_ddr3l_val: Add SPI NOR support 

iMX8MM DDR3L validation board uses FPGA to link with SPI NOR flash
on ECSPI1 port. Update the codes and configurations to enable the
ECSPI1 to access SPI NOR in u-boot.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Ye Li 2018-10-31 20:15:58 -07:00 committed by Nitin Garg
parent 04b813d468
commit aa4fea4f39
3 changed files with 11 additions and 24 deletions
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14
board/freescale/imx8mm_val/imx8mm_val.c
View File

@ -73,27 +73,15 @@ static iomux_v3_cfg_t const ecspi1_pads[] = {
IMX8MM_PAD_ECSPI1_SS0_GPIO5_IO9 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
static iomux_v3_cfg_t const ecspi2_pads[] = {
IMX8MM_PAD_ECSPI2_SCLK_ECSPI2_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
IMX8MM_PAD_ECSPI2_MOSI_ECSPI2_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
IMX8MM_PAD_ECSPI2_MISO_ECSPI2_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
IMX8MM_PAD_ECSPI2_SS0_GPIO5_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL),
};
static void setup_spi(void)
{
imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
imx_iomux_v3_setup_multiple_pads(ecspi2_pads, ARRAY_SIZE(ecspi2_pads));
gpio_request(IMX_GPIO_NR(5, 9), "ECSPI1 CS");
gpio_request(IMX_GPIO_NR(5, 13), "ECSPI2 CS");
}
int board_spi_cs_gpio(unsigned bus, unsigned cs)
{
if (bus == 0)
return IMX_GPIO_NR(5, 9);
else
return IMX_GPIO_NR(5, 13);
return IMX_GPIO_NR(5, 9);
}
#endif

5
configs/imx8mm_ddr3l_val_defconfig
View File

@ -54,3 +54,8 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
CONFIG_CMD_NAND=y
CONFIG_CMD_UBI=y
CONFIG_CMD_SF=y
CONFIG_MXC_SPI=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y

16
include/configs/imx8mm_val.h
View File

@ -265,17 +265,11 @@
#endif
/* Enable SPI */
#ifndef CONFIG_NAND_MXS
#ifndef CONFIG_FSL_FSPI
#ifdef CONFIG_CMD_SF
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS 0
#define CONFIG_SF_DEFAULT_SPEED 20000000
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
#endif
#endif
#ifdef CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS 0
#define CONFIG_SF_DEFAULT_CS 0
#define CONFIG_SF_DEFAULT_SPEED 8000000
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
#endif
#ifdef CONFIG_CMD_NAND