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Convert CONFIG_SYS_I2C_EEPROM_CCID et al to Kconfig 

This converts the following to Kconfig:
   CONFIG_SYS_I2C_EEPROM_CCID
   CONFIG_SYS_I2C_EEPROM_NXID
   CONFIG_SYS_EEPROM_BUS_NUM

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-08-10 10:29:27 -04:00
parent f9316dbe5c
commit adf13bcc40
38 changed files with 31 additions and 103 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
common/Kconfig
View File

@ -671,6 +671,27 @@ config ID_EEPROM
A number of different systems and vendors enable a vendor-specified
EEPROM that contains various identifying features.
config SYS_EEPROM_BUS_NUM
int "I2C bus number of the system identifier EEPROM"
depends on ID_EEPROM
default 0
choice
prompt "EEPROM starts with 'CCID' or 'NXID'"
depends on ID_EEPROM && (PPC || ARCH_LS1021A || FSL_LAYERSCAPE)
default SYS_I2C_EEPROM_NXID
help
Specify if the Freescale / NXP ID EEPROM starts with 'CCID' or 'NXID'
ASCII literal string.
config SYS_I2C_EEPROM_CCID
bool "EEPROM starts with 'CCID'"
config SYS_I2C_EEPROM_NXID
bool "EEPROM starts with 'NXID'"
endchoice
config PCI_INIT_R
bool "Enumerate PCI buses during init"
depends on PCI

1
configs/MPC8548CDS_36BIT_defconfig
View File

@ -21,6 +21,7 @@ CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
# CONFIG_MISC_INIT_R is not set
CONFIG_ID_EEPROM=y
CONFIG_SYS_I2C_EEPROM_CCID=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y

1
configs/MPC8548CDS_defconfig
View File

@ -20,6 +20,7 @@ CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
# CONFIG_MISC_INIT_R is not set
CONFIG_ID_EEPROM=y
CONFIG_SYS_I2C_EEPROM_CCID=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y

1
configs/MPC8548CDS_legacy_defconfig
View File

@ -21,6 +21,7 @@ CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr"
# CONFIG_MISC_INIT_R is not set
CONFIG_ID_EEPROM=y
CONFIG_SYS_I2C_EEPROM_CCID=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PBSIZE=276
CONFIG_CMD_IMLS=y

1
configs/ls1021atwr_nor_SECURE_BOOT_defconfig
View File

@ -33,6 +33,7 @@ CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_EEPROM_BUS_NUM=1
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
CONFIG_SYS_BOOTM_LEN=0x4000000

1
configs/ls1021atwr_nor_defconfig
View File

@ -34,6 +34,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_EEPROM_BUS_NUM=1
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
CONFIG_SYS_BOOTM_LEN=0x4000000

1
configs/ls1021atwr_nor_lpuart_defconfig
View File

@ -34,6 +34,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_EEPROM_BUS_NUM=1
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
CONFIG_SYS_BOOTM_LEN=0x4000000

1
configs/ls1021atwr_qspi_defconfig
View File

@ -35,6 +35,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_EEPROM_BUS_NUM=1
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=276
CONFIG_SYS_BOOTM_LEN=0x4000000

1
configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
View File

@ -43,6 +43,7 @@ CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_EEPROM_BUS_NUM=1
CONFIG_SPL_MAX_SIZE=0x1a000
CONFIG_SPL_PAD_TO=0x1c000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y

1
configs/ls1021atwr_sdcard_ifc_defconfig
View File

@ -44,6 +44,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_EEPROM_BUS_NUM=1
CONFIG_SPL_MAX_SIZE=0x1a000
CONFIG_SPL_PAD_TO=0x1c000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y

1
configs/ls1021atwr_sdcard_qspi_defconfig
View File

@ -45,6 +45,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_MISC_INIT_R=y
CONFIG_ID_EEPROM=y
CONFIG_SYS_EEPROM_BUS_NUM=1
CONFIG_SPL_MAX_SIZE=0x1a000
CONFIG_SPL_PAD_TO=0x1c000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y

3
include/configs/MPC8548CDS.h
View File

@ -255,9 +255,6 @@
#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} }
#endif
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_CCID
/*
* General PCI
* Memory space is mapped 1-1, but I/O space must start from 0.

4
include/configs/P1010RDB.h
View File

@ -351,10 +351,6 @@ extern unsigned long get_sdram_size(void);
/* I2C EEPROM */
#if defined(CONFIG_TARGET_P1010RDB_PB)
#ifdef CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#endif
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define MAX_NUM_PORTS 9 /* for 128Bytes EEPROM */
#endif
/* enable read and write access to EEPROM */

4
include/configs/P2041RDB.h
View File

@ -67,10 +67,6 @@
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
#endif
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/*
* DDR Setup
*/

4
include/configs/T102xRDB.h
View File

@ -112,10 +112,6 @@
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
#endif
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/*
* DDR Setup
*/

4
include/configs/T208xQDS.h
View File

@ -82,10 +82,6 @@
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/*
* DDR Setup
*/

4
include/configs/T208xRDB.h
View File

@ -77,10 +77,6 @@
#define CONFIG_SYS_DCSRBAR 0xf0000000
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/*
* DDR Setup
*/

4
include/configs/corenet_ds.h
View File

@ -62,10 +62,6 @@
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
#endif
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/*
* DDR Setup
*/

4
include/configs/ls1012aqds.h
View File

@ -49,10 +49,6 @@
#define RTC
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/* Voltage monitor on channel 2*/
#define I2C_VOL_MONITOR_ADDR 0x40

4
include/configs/ls1021aiot.h
View File

@ -59,10 +59,6 @@
* I2C
*/
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/*
* MMC
*/

4
include/configs/ls1021aqds.h
View File

@ -246,10 +246,6 @@
/* GPIO */
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/*
* I2C bus multiplexer
*/

4
include/configs/ls1021atsn.h
View File

@ -71,10 +71,6 @@
/* I2C */
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/* PCIe */
#define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"

4
include/configs/ls1021atwr.h
View File

@ -161,10 +161,6 @@
/* GPIO */
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 1
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_SMP_PEN_ADDR 0x01ee0200

4
include/configs/ls1028a_common.h
View File

@ -63,10 +63,6 @@
#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
#define I2C_MUX_CH_DEFAULT 0x8
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/* DisplayPort */
#define DP_PWD_EN_DEFAULT_MASK 0x8

4
include/configs/ls1043aqds.h
View File

@ -37,10 +37,6 @@
/* SATA */
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_SATA AHCI_BASE_ADDR
/*

6
include/configs/ls1043ardb.h
View File

@ -184,12 +184,6 @@
#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_CPLD_FTIM2
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CPLD_FTIM3
/* EEPROM */
#ifndef SPL_NO_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#endif
/*
* Environment
*/

2
include/configs/ls1046afrwy.h
View File

@ -59,8 +59,6 @@
#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define I2C_RETIMER_ADDR 0x18
/* I2C bus multiplexer */

4
include/configs/ls1046aqds.h
View File

@ -54,10 +54,6 @@
#define CFG_LPUART_EN 0x2
#endif
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/*
* IFC Definitions
*/

2
include/configs/ls1046ardb.h
View File

@ -98,8 +98,6 @@
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CPLD_FTIM3
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define I2C_RETIMER_ADDR 0x18
/* PMIC */

4
include/configs/ls1088aqds.h
View File

@ -287,10 +287,6 @@
#define RTC
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#ifdef CONFIG_FSL_DSPI
#if !defined(CONFIG_TFABOOT) && \
!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)

4
include/configs/ls1088ardb.h
View File

@ -198,10 +198,6 @@
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
#endif
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#ifndef SPL_NO_ENV
/* Initial environment variables */
#ifdef CONFIG_TFABOOT

4
include/configs/ls2080aqds.h
View File

@ -235,10 +235,6 @@
#define CONFIG_RTC_DS3231 1
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/* Initial environment variables */
#undef CONFIG_EXTRA_ENV_SETTINGS
#ifdef CONFIG_NXP_ESBC

4
include/configs/ls2080ardb.h
View File

@ -222,10 +222,6 @@
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
#endif
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define BOOT_TARGET_DEVICES(func) \
func(USB, usb, 0) \
func(MMC, mmc, 0) \

4
include/configs/lx2160a_common.h
View File

@ -78,10 +78,6 @@
#define RTC
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/* Qixis */
#define CONFIG_SYS_I2C_FPGA_ADDR 0x66

4
include/configs/lx2160aqds.h
View File

@ -13,10 +13,6 @@
/* MAC/PHY configuration */
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
EXTRA_ENV_SETTINGS \

4
include/configs/lx2160ardb.h
View File

@ -17,10 +17,6 @@
#define I2C_EMC2305_CMD 0x40
#define I2C_EMC2305_PWM 0x80
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
EXTRA_ENV_SETTINGS \

4
include/configs/lx2162aqds.h
View File

@ -13,10 +13,6 @@
/* RTC */
#define CONFIG_SYS_RTC_BUS_NUM 0
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
EXTRA_ENV_SETTINGS \

2
include/configs/sifive-unmatched.h
View File

@ -51,6 +51,4 @@
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
BOOTENV
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#endif /* __SIFIVE_UNMATCHED_H */