Merge git://git.denx.de/u-boot-sunxi
This commit is contained in:
Tom Rini
commit
b07d044d5b
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@ -309,6 +309,7 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
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sun8i-h3-orangepi-pc-plus.dtb \
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sun8i-h3-orangepi-pc-plus.dtb \
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sun8i-h3-orangepi-plus.dtb \
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sun8i-h3-orangepi-plus.dtb \
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sun8i-h3-orangepi-plus2e.dtb \
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sun8i-h3-orangepi-plus2e.dtb \
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sun8i-h3-nanopi-m1.dtb \
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sun8i-h3-nanopi-neo.dtb \
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sun8i-h3-nanopi-neo.dtb \
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sun8i-h3-nanopi-neo-air.dtb
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sun8i-h3-nanopi-neo-air.dtb
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dtb-$(CONFIG_MACH_SUN8I_R40) += \
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dtb-$(CONFIG_MACH_SUN8I_R40) += \
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@ -316,8 +317,10 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \
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dtb-$(CONFIG_MACH_SUN8I_V3S) += \
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dtb-$(CONFIG_MACH_SUN8I_V3S) += \
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sun8i-v3s-licheepi-zero.dtb
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sun8i-v3s-licheepi-zero.dtb
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dtb-$(CONFIG_MACH_SUN50I_H5) += \
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dtb-$(CONFIG_MACH_SUN50I_H5) += \
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sun50i-h5-orangepi-pc2.dtb
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sun50i-h5-orangepi-pc2.dtb \
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sun50i-h5-orangepi-prime.dtb
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dtb-$(CONFIG_MACH_SUN50I) += \
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dtb-$(CONFIG_MACH_SUN50I) += \
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sun50i-a64-bananapi-m64.dtb \
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sun50i-a64-pine64-plus.dtb \
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sun50i-a64-pine64-plus.dtb \
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sun50i-a64-pine64.dtb
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sun50i-a64-pine64.dtb
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dtb-$(CONFIG_MACH_SUN9I) += \
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dtb-$(CONFIG_MACH_SUN9I) += \
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@ -0,0 +1,121 @@
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/*
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* Copyright (c) 2016 ARM Ltd.
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* Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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||||||
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*
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||||||
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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||||||
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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||||||
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* GNU General Public License for more details.
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||||||
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*
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||||||
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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||||||
|
* obtaining a copy of this software and associated documentation
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||||||
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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||||||
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* sell copies of the Software, and to permit persons to whom the
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||||||
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* Software is furnished to do so, subject to the following
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* conditions:
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||||||
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*
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||||||
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* The above copyright notice and this permission notice shall be
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||||||
|
* included in all copies or substantial portions of the Software.
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||||||
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*
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||||||
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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||||||
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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||||||
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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||||||
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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||||||
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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||||||
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* OTHER DEALINGS IN THE SOFTWARE.
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||||||
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*/
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/dts-v1/;
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#include "sun50i-a64.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "BananaPi-M64";
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compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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reg_vcc3v3: vcc3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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status = "okay";
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};
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&i2c1_pins {
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bias-pull-up;
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};
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>;
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vmmc-supply = <®_vcc3v3>;
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cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
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cd-inverted;
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disable-wp;
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bus-width = <4>;
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status = "okay";
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};
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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vmmc-supply = <®_vcc3v3>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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vmmc-supply = <®_vcc3v3>;
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bus-width = <8>;
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non-removable;
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cap-mmc-hw-reset;
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins_a>;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
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status = "okay";
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};
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@ -0,0 +1,50 @@
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/ {
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aliases {
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ethernet0 = &emac;
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};
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soc {
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emac: ethernet@01c30000 {
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compatible = "allwinner,sun50i-a64-emac";
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reg = <0x01c30000 0x2000>, <0x01c00030 0x4>;
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reg-names = "emac", "syscon";
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interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&ccu RST_BUS_EMAC>;
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reset-names = "ahb";
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clocks = <&ccu CLK_BUS_EMAC>;
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clock-names = "ahb";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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phy-mode = "rgmii";
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phy = <&phy1>;
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status = "okay";
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||||||
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phy1: ethernet-phy@1 {
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reg = <1>;
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||||||
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};
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};
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};
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||||||
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};
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||||||
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&pio {
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rmii_pins: rmii_pins {
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allwinner,pins = "PD10", "PD11", "PD13", "PD14",
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"PD17", "PD18", "PD19", "PD20",
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"PD22", "PD23";
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allwinner,function = "emac";
|
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allwinner,drive = <3>;
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allwinner,pull = <0>;
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};
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rgmii_pins: rgmii_pins {
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allwinner,pins = "PD8", "PD9", "PD10", "PD11",
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"PD12", "PD13", "PD15",
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"PD16", "PD17", "PD18", "PD19",
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"PD20", "PD21", "PD22", "PD23";
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allwinner,function = "emac";
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allwinner,drive = <3>;
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allwinner,pull = <0>;
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};
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};
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@ -40,33 +40,11 @@
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||||||
* OTHER DEALINGS IN THE SOFTWARE.
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||||||
*/
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*/
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||||||
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|
||||||
/dts-v1/;
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#include "sun50i-a64-pine64.dts"
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|
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#include "sun50i-a64-pine64-common.dtsi"
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|
||||||
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|
||||||
/ {
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/ {
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model = "Pine64+";
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model = "Pine64+";
|
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compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
|
compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
|
||||||
|
|
||||||
chosen {
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/* TODO: Camera, Ethernet PHY, touchscreen, etc. */
|
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stdout-path = "serial0:115200n8";
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|
||||||
};
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|
||||||
|
|
||||||
/* There is a model with 2GB of DRAM, but U-Boot fixes this for us. */
|
|
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memory {
|
|
||||||
reg = <0x40000000 0x40000000>;
|
|
||||||
};
|
|
||||||
};
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};
|
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|
|
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&emac {
|
|
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pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&rgmii_pins>;
|
|
||||||
phy-mode = "rgmii";
|
|
||||||
phy = <&phy1>;
|
|
||||||
status = "okay";
|
|
||||||
|
|
||||||
phy1: ethernet-phy@1 {
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|
||||||
reg = <1>;
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|
||||||
};
|
|
||||||
};
|
|
||||||
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|
||||||
|
|
|
||||||
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@ -42,17 +42,70 @@
|
||||||
|
|
||||||
/dts-v1/;
|
/dts-v1/;
|
||||||
|
|
||||||
#include "sun50i-a64-pine64-common.dtsi"
|
#include "sun50i-a64.dtsi"
|
||||||
|
|
||||||
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "Pine64";
|
model = "Pine64";
|
||||||
compatible = "pine64,pine64", "allwinner,sun50i-a64";
|
compatible = "pine64,pine64", "allwinner,sun50i-a64";
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
serial0 = &uart0;
|
||||||
|
};
|
||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
stdout-path = "serial0:115200n8";
|
stdout-path = "serial0:115200n8";
|
||||||
};
|
};
|
||||||
|
|
||||||
memory {
|
reg_vcc3v3: vcc3v3 {
|
||||||
reg = <0x40000000 0x20000000>;
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "vcc3v3";
|
||||||
|
regulator-min-microvolt = <3300000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&ehci1 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c1 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&i2c1_pins>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c1_pins {
|
||||||
|
bias-pull-up;
|
||||||
|
};
|
||||||
|
|
||||||
|
&mmc0 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&mmc0_pins>;
|
||||||
|
vmmc-supply = <®_vcc3v3>;
|
||||||
|
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
|
||||||
|
cd-inverted;
|
||||||
|
disable-wp;
|
||||||
|
bus-width = <4>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&ohci1 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&uart0 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&uart0_pins_a>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&usb_otg {
|
||||||
|
dr_mode = "host";
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&usbphy {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
|
||||||
|
|
@ -42,8 +42,9 @@
|
||||||
* OTHER DEALINGS IN THE SOFTWARE.
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
#include <dt-bindings/clock/sun50i-a64-ccu.h>
|
||||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||||
#include <dt-bindings/pinctrl/sun4i-a10.h>
|
#include <dt-bindings/reset/sun50i-a64-ccu.h>
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
interrupt-parent = <&gic>;
|
interrupt-parent = <&gic>;
|
||||||
|
|
@ -54,28 +55,28 @@
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
cpu@0 {
|
cpu0: cpu@0 {
|
||||||
compatible = "arm,cortex-a53", "arm,armv8";
|
compatible = "arm,cortex-a53", "arm,armv8";
|
||||||
device_type = "cpu";
|
device_type = "cpu";
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
};
|
};
|
||||||
|
|
||||||
cpu@1 {
|
cpu1: cpu@1 {
|
||||||
compatible = "arm,cortex-a53", "arm,armv8";
|
compatible = "arm,cortex-a53", "arm,armv8";
|
||||||
device_type = "cpu";
|
device_type = "cpu";
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
};
|
};
|
||||||
|
|
||||||
cpu@2 {
|
cpu2: cpu@2 {
|
||||||
compatible = "arm,cortex-a53", "arm,armv8";
|
compatible = "arm,cortex-a53", "arm,armv8";
|
||||||
device_type = "cpu";
|
device_type = "cpu";
|
||||||
reg = <2>;
|
reg = <2>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
};
|
};
|
||||||
|
|
||||||
cpu@3 {
|
cpu3: cpu@3 {
|
||||||
compatible = "arm,cortex-a53", "arm,armv8";
|
compatible = "arm,cortex-a53", "arm,armv8";
|
||||||
device_type = "cpu";
|
device_type = "cpu";
|
||||||
reg = <3>;
|
reg = <3>;
|
||||||
|
|
@ -83,47 +84,6 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
psci {
|
|
||||||
compatible = "arm,psci-0.2";
|
|
||||||
method = "smc";
|
|
||||||
};
|
|
||||||
|
|
||||||
memory {
|
|
||||||
device_type = "memory";
|
|
||||||
reg = <0x40000000 0>;
|
|
||||||
};
|
|
||||||
|
|
||||||
gic: interrupt-controller@1c81000 {
|
|
||||||
compatible = "arm,gic-400";
|
|
||||||
interrupt-controller;
|
|
||||||
#interrupt-cells = <3>;
|
|
||||||
#address-cells = <0>;
|
|
||||||
|
|
||||||
reg = <0x01c81000 0x1000>,
|
|
||||||
<0x01c82000 0x2000>,
|
|
||||||
<0x01c84000 0x2000>,
|
|
||||||
<0x01c86000 0x2000>;
|
|
||||||
interrupts = <GIC_PPI 9
|
|
||||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
|
|
||||||
};
|
|
||||||
|
|
||||||
timer {
|
|
||||||
compatible = "arm,armv8-timer";
|
|
||||||
interrupts = <GIC_PPI 13
|
|
||||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
|
|
||||||
<GIC_PPI 14
|
|
||||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
|
|
||||||
<GIC_PPI 11
|
|
||||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
|
|
||||||
<GIC_PPI 10
|
|
||||||
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
|
|
||||||
};
|
|
||||||
|
|
||||||
clocks {
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <1>;
|
|
||||||
ranges;
|
|
||||||
|
|
||||||
osc24M: osc24M_clk {
|
osc24M: osc24M_clk {
|
||||||
#clock-cells = <0>;
|
#clock-cells = <0>;
|
||||||
compatible = "fixed-clock";
|
compatible = "fixed-clock";
|
||||||
|
|
@ -138,178 +98,29 @@
|
||||||
clock-output-names = "osc32k";
|
clock-output-names = "osc32k";
|
||||||
};
|
};
|
||||||
|
|
||||||
pll1: pll1_clk@1c20000 {
|
iosc: internal-osc-clk {
|
||||||
#clock-cells = <0>;
|
#clock-cells = <0>;
|
||||||
compatible = "allwinner,sun8i-a23-pll1-clk";
|
compatible = "fixed-clock";
|
||||||
reg = <0x01c20000 0x4>;
|
clock-frequency = <16000000>;
|
||||||
clocks = <&osc24M>;
|
clock-accuracy = <300000000>;
|
||||||
clock-output-names = "pll1";
|
clock-output-names = "iosc";
|
||||||
};
|
};
|
||||||
|
|
||||||
pll6: pll6_clk@1c20028 {
|
psci {
|
||||||
#clock-cells = <1>;
|
compatible = "arm,psci-0.2";
|
||||||
compatible = "allwinner,sun6i-a31-pll6-clk";
|
method = "smc";
|
||||||
reg = <0x01c20028 0x4>;
|
|
||||||
clocks = <&osc24M>;
|
|
||||||
clock-output-names = "pll6", "pll6x2";
|
|
||||||
};
|
};
|
||||||
|
|
||||||
pll6d2: pll6d2_clk {
|
timer {
|
||||||
#clock-cells = <0>;
|
compatible = "arm,armv8-timer";
|
||||||
compatible = "fixed-factor-clock";
|
interrupts = <GIC_PPI 13
|
||||||
clock-div = <2>;
|
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
|
||||||
clock-mult = <1>;
|
<GIC_PPI 14
|
||||||
clocks = <&pll6 0>;
|
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
|
||||||
clock-output-names = "pll6d2";
|
<GIC_PPI 11
|
||||||
};
|
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
|
||||||
|
<GIC_PPI 10
|
||||||
pll7: pll7_clk@1c2002c {
|
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
|
||||||
#clock-cells = <1>;
|
|
||||||
compatible = "allwinner,sun6i-a31-pll6-clk";
|
|
||||||
reg = <0x01c2002c 0x4>;
|
|
||||||
clocks = <&osc24M>;
|
|
||||||
clock-output-names = "pll7", "pll7x2";
|
|
||||||
};
|
|
||||||
|
|
||||||
cpu: cpu_clk@1c20050 {
|
|
||||||
#clock-cells = <0>;
|
|
||||||
compatible = "allwinner,sun4i-a10-cpu-clk";
|
|
||||||
reg = <0x01c20050 0x4>;
|
|
||||||
clocks = <&osc32k>, <&osc24M>, <&pll1>, <&pll1>;
|
|
||||||
clock-output-names = "cpu";
|
|
||||||
critical-clocks = <0>;
|
|
||||||
};
|
|
||||||
|
|
||||||
axi: axi_clk@1c20050 {
|
|
||||||
#clock-cells = <0>;
|
|
||||||
compatible = "allwinner,sun4i-a10-axi-clk";
|
|
||||||
reg = <0x01c20050 0x4>;
|
|
||||||
clocks = <&cpu>;
|
|
||||||
clock-output-names = "axi";
|
|
||||||
};
|
|
||||||
|
|
||||||
ahb1: ahb1_clk@1c20054 {
|
|
||||||
#clock-cells = <0>;
|
|
||||||
compatible = "allwinner,sun6i-a31-ahb1-clk";
|
|
||||||
reg = <0x01c20054 0x4>;
|
|
||||||
clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
|
|
||||||
clock-output-names = "ahb1";
|
|
||||||
};
|
|
||||||
|
|
||||||
ahb2: ahb2_clk@1c2005c {
|
|
||||||
#clock-cells = <0>;
|
|
||||||
compatible = "allwinner,sun8i-h3-ahb2-clk";
|
|
||||||
reg = <0x01c2005c 0x4>;
|
|
||||||
clocks = <&ahb1>, <&pll6d2>;
|
|
||||||
clock-output-names = "ahb2";
|
|
||||||
};
|
|
||||||
|
|
||||||
apb1: apb1_clk@1c20054 {
|
|
||||||
#clock-cells = <0>;
|
|
||||||
compatible = "allwinner,sun4i-a10-apb0-clk";
|
|
||||||
reg = <0x01c20054 0x4>;
|
|
||||||
clocks = <&ahb1>;
|
|
||||||
clock-output-names = "apb1";
|
|
||||||
};
|
|
||||||
|
|
||||||
apb2: apb2_clk@1c20058 {
|
|
||||||
#clock-cells = <0>;
|
|
||||||
compatible = "allwinner,sun4i-a10-apb1-clk";
|
|
||||||
reg = <0x01c20058 0x4>;
|
|
||||||
clocks = <&osc32k>, <&osc24M>, <&pll6 1>, <&pll6 1>;
|
|
||||||
clock-output-names = "apb2";
|
|
||||||
};
|
|
||||||
|
|
||||||
bus_gates: bus_gates_clk@1c20060 {
|
|
||||||
#clock-cells = <1>;
|
|
||||||
compatible = "allwinner,sun50i-a64-bus-gates-clk",
|
|
||||||
"allwinner,sunxi-multi-bus-gates-clk";
|
|
||||||
reg = <0x01c20060 0x14>;
|
|
||||||
ahb1_parent {
|
|
||||||
clocks = <&ahb1>;
|
|
||||||
clock-indices = <1>, <5>,
|
|
||||||
<6>, <8>,
|
|
||||||
<9>, <10>,
|
|
||||||
<13>, <14>,
|
|
||||||
<18>, <19>,
|
|
||||||
<20>, <21>,
|
|
||||||
<23>, <24>,
|
|
||||||
<25>, <28>,
|
|
||||||
<32>, <35>,
|
|
||||||
<36>, <37>,
|
|
||||||
<40>, <43>,
|
|
||||||
<44>, <52>,
|
|
||||||
<53>, <54>,
|
|
||||||
<135>;
|
|
||||||
clock-output-names = "bus_mipidsi", "bus_ce",
|
|
||||||
"bus_dma", "bus_mmc0",
|
|
||||||
"bus_mmc1", "bus_mmc2",
|
|
||||||
"bus_nand", "bus_sdram",
|
|
||||||
"bus_ts", "bus_hstimer",
|
|
||||||
"bus_spi0", "bus_spi1",
|
|
||||||
"bus_otg", "bus_otg_ehci0",
|
|
||||||
"bus_ehci0", "bus_otg_ohci0",
|
|
||||||
"bus_ve", "bus_lcd0",
|
|
||||||
"bus_lcd1", "bus_deint",
|
|
||||||
"bus_csi", "bus_hdmi",
|
|
||||||
"bus_de", "bus_gpu",
|
|
||||||
"bus_msgbox", "bus_spinlock",
|
|
||||||
"bus_dbg";
|
|
||||||
};
|
|
||||||
ahb2_parent {
|
|
||||||
clocks = <&ahb2>;
|
|
||||||
clock-indices = <17>, <29>;
|
|
||||||
clock-output-names = "bus_gmac", "bus_ohci0";
|
|
||||||
};
|
|
||||||
apb1_parent {
|
|
||||||
clocks = <&apb1>;
|
|
||||||
clock-indices = <64>, <65>,
|
|
||||||
<69>, <72>,
|
|
||||||
<76>, <77>,
|
|
||||||
<78>;
|
|
||||||
clock-output-names = "bus_codec", "bus_spdif",
|
|
||||||
"bus_pio", "bus_ths",
|
|
||||||
"bus_i2s0", "bus_i2s1",
|
|
||||||
"bus_i2s2";
|
|
||||||
};
|
|
||||||
abp2_parent {
|
|
||||||
clocks = <&apb2>;
|
|
||||||
clock-indices = <96>, <97>,
|
|
||||||
<98>, <101>,
|
|
||||||
<112>, <113>,
|
|
||||||
<114>, <115>,
|
|
||||||
<116>;
|
|
||||||
clock-output-names = "bus_i2c0", "bus_i2c1",
|
|
||||||
"bus_i2c2", "bus_scr",
|
|
||||||
"bus_uart0", "bus_uart1",
|
|
||||||
"bus_uart2", "bus_uart3",
|
|
||||||
"bus_uart4";
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
mmc0_clk: mmc0_clk@1c20088 {
|
|
||||||
#clock-cells = <0>;
|
|
||||||
compatible = "allwinner,sun4i-a10-mod0-clk";
|
|
||||||
reg = <0x01c20088 0x4>;
|
|
||||||
clocks = <&osc24M>, <&pll6 1>, <&pll7 1>;
|
|
||||||
clock-output-names = "mmc0";
|
|
||||||
};
|
|
||||||
|
|
||||||
mmc1_clk: mmc1_clk@1c2008c {
|
|
||||||
#clock-cells = <0>;
|
|
||||||
compatible = "allwinner,sun4i-a10-mod0-clk";
|
|
||||||
reg = <0x01c2008c 0x4>;
|
|
||||||
clocks = <&osc24M>, <&pll6 1>, <&pll7 1>;
|
|
||||||
clock-output-names = "mmc1";
|
|
||||||
};
|
|
||||||
|
|
||||||
mmc2_clk: mmc2_clk@1c20090 {
|
|
||||||
#clock-cells = <0>;
|
|
||||||
compatible = "allwinner,sun4i-a10-mod0-clk";
|
|
||||||
reg = <0x01c20090 0x4>;
|
|
||||||
clocks = <&osc24M>, <&pll6 1>, <&pll7 1>;
|
|
||||||
clock-output-names = "mmc2";
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
|
|
||||||
soc {
|
soc {
|
||||||
|
|
@ -319,230 +130,171 @@
|
||||||
ranges;
|
ranges;
|
||||||
|
|
||||||
mmc0: mmc@1c0f000 {
|
mmc0: mmc@1c0f000 {
|
||||||
compatible = "allwinner,sun50i-a64-mmc",
|
compatible = "allwinner,sun50i-a64-mmc";
|
||||||
"allwinner,sun5i-a13-mmc";
|
|
||||||
reg = <0x01c0f000 0x1000>;
|
reg = <0x01c0f000 0x1000>;
|
||||||
clocks = <&bus_gates 8>, <&mmc0_clk>,
|
clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
|
||||||
<&mmc0_clk>, <&mmc0_clk>;
|
clock-names = "ahb", "mmc";
|
||||||
clock-names = "ahb", "mmc",
|
resets = <&ccu RST_BUS_MMC0>;
|
||||||
"output", "sample";
|
|
||||||
resets = <&ahb_rst 8>;
|
|
||||||
reset-names = "ahb";
|
reset-names = "ahb";
|
||||||
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
max-frequency = <150000000>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
mmc1: mmc@1c10000 {
|
mmc1: mmc@1c10000 {
|
||||||
compatible = "allwinner,sun50i-a64-mmc",
|
compatible = "allwinner,sun50i-a64-mmc";
|
||||||
"allwinner,sun5i-a13-mmc";
|
|
||||||
reg = <0x01c10000 0x1000>;
|
reg = <0x01c10000 0x1000>;
|
||||||
clocks = <&bus_gates 9>, <&mmc1_clk>,
|
clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
|
||||||
<&mmc1_clk>, <&mmc1_clk>;
|
clock-names = "ahb", "mmc";
|
||||||
clock-names = "ahb", "mmc",
|
resets = <&ccu RST_BUS_MMC1>;
|
||||||
"output", "sample";
|
|
||||||
resets = <&ahb_rst 9>;
|
|
||||||
reset-names = "ahb";
|
reset-names = "ahb";
|
||||||
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
max-frequency = <150000000>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
mmc2: mmc@1c11000 {
|
mmc2: mmc@1c11000 {
|
||||||
compatible = "allwinner,sun50i-a64-mmc",
|
compatible = "allwinner,sun50i-a64-emmc";
|
||||||
"allwinner,sun5i-a13-mmc";
|
|
||||||
reg = <0x01c11000 0x1000>;
|
reg = <0x01c11000 0x1000>;
|
||||||
clocks = <&bus_gates 10>, <&mmc2_clk>,
|
clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
|
||||||
<&mmc2_clk>, <&mmc2_clk>;
|
clock-names = "ahb", "mmc";
|
||||||
clock-names = "ahb", "mmc",
|
resets = <&ccu RST_BUS_MMC2>;
|
||||||
"output", "sample";
|
|
||||||
resets = <&ahb_rst 10>;
|
|
||||||
reset-names = "ahb";
|
reset-names = "ahb";
|
||||||
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
max-frequency = <200000000>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
usb_otg: usb@01c19000 {
|
||||||
|
compatible = "allwinner,sun8i-a33-musb";
|
||||||
|
reg = <0x01c19000 0x0400>;
|
||||||
|
clocks = <&ccu CLK_BUS_OTG>;
|
||||||
|
resets = <&ccu RST_BUS_OTG>;
|
||||||
|
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
interrupt-names = "mc";
|
||||||
|
phys = <&usbphy 0>;
|
||||||
|
phy-names = "usb";
|
||||||
|
extcon = <&usbphy 0>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
usbphy: phy@01c19400 {
|
||||||
|
compatible = "allwinner,sun50i-a64-usb-phy";
|
||||||
|
reg = <0x01c19400 0x14>,
|
||||||
|
<0x01c1a800 0x4>,
|
||||||
|
<0x01c1b800 0x4>;
|
||||||
|
reg-names = "phy_ctrl",
|
||||||
|
"pmu0",
|
||||||
|
"pmu1";
|
||||||
|
clocks = <&ccu CLK_USB_PHY0>,
|
||||||
|
<&ccu CLK_USB_PHY1>;
|
||||||
|
clock-names = "usb0_phy",
|
||||||
|
"usb1_phy";
|
||||||
|
resets = <&ccu RST_USB_PHY0>,
|
||||||
|
<&ccu RST_USB_PHY1>;
|
||||||
|
reset-names = "usb0_reset",
|
||||||
|
"usb1_reset";
|
||||||
|
status = "disabled";
|
||||||
|
#phy-cells = <1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
ehci1: usb@01c1b000 {
|
||||||
|
compatible = "allwinner,sun50i-a64-ehci", "generic-ehci";
|
||||||
|
reg = <0x01c1b000 0x100>;
|
||||||
|
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&ccu CLK_BUS_OHCI1>,
|
||||||
|
<&ccu CLK_BUS_EHCI1>,
|
||||||
|
<&ccu CLK_USB_OHCI1>;
|
||||||
|
resets = <&ccu RST_BUS_OHCI1>,
|
||||||
|
<&ccu RST_BUS_EHCI1>;
|
||||||
|
phys = <&usbphy 1>;
|
||||||
|
phy-names = "usb";
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
ohci1: usb@01c1b400 {
|
||||||
|
compatible = "allwinner,sun50i-a64-ohci", "generic-ohci";
|
||||||
|
reg = <0x01c1b400 0x100>;
|
||||||
|
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&ccu CLK_BUS_OHCI1>,
|
||||||
|
<&ccu CLK_USB_OHCI1>;
|
||||||
|
resets = <&ccu RST_BUS_OHCI1>;
|
||||||
|
phys = <&usbphy 1>;
|
||||||
|
phy-names = "usb";
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
ccu: clock@01c20000 {
|
||||||
|
compatible = "allwinner,sun50i-a64-ccu";
|
||||||
|
reg = <0x01c20000 0x400>;
|
||||||
|
clocks = <&osc24M>, <&osc32k>;
|
||||||
|
clock-names = "hosc", "losc";
|
||||||
|
#clock-cells = <1>;
|
||||||
|
#reset-cells = <1>;
|
||||||
|
};
|
||||||
|
|
||||||
pio: pinctrl@1c20800 {
|
pio: pinctrl@1c20800 {
|
||||||
compatible = "allwinner,sun50i-a64-pinctrl";
|
compatible = "allwinner,sun50i-a64-pinctrl";
|
||||||
reg = <0x01c20800 0x400>;
|
reg = <0x01c20800 0x400>;
|
||||||
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&bus_gates 69>;
|
clocks = <&ccu 58>;
|
||||||
gpio-controller;
|
gpio-controller;
|
||||||
#gpio-cells = <3>;
|
#gpio-cells = <3>;
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <3>;
|
||||||
|
|
||||||
uart0_pins_a: uart0@0 {
|
|
||||||
allwinner,pins = "PB8", "PB9";
|
|
||||||
allwinner,function = "uart0";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart0_pins_b: uart0@1 {
|
|
||||||
allwinner,pins = "PF2", "PF3";
|
|
||||||
allwinner,function = "uart0";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart1_2pins: uart1_2@0 {
|
|
||||||
allwinner,pins = "PG6", "PG7";
|
|
||||||
allwinner,function = "uart1";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart1_4pins: uart1_4@0 {
|
|
||||||
allwinner,pins = "PG6", "PG7", "PG8", "PG9";
|
|
||||||
allwinner,function = "uart1";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart2_2pins: uart2_2@0 {
|
|
||||||
allwinner,pins = "PB0", "PB1";
|
|
||||||
allwinner,function = "uart2";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart2_4pins: uart2_4@0 {
|
|
||||||
allwinner,pins = "PB0", "PB1", "PB2", "PB3";
|
|
||||||
allwinner,function = "uart2";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart3_pins_a: uart3@0 {
|
|
||||||
allwinner,pins = "PD0", "PD1";
|
|
||||||
allwinner,function = "uart3";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart3_2pins_b: uart3_2@1 {
|
|
||||||
allwinner,pins = "PH4", "PH5";
|
|
||||||
allwinner,function = "uart3";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart3_4pins_b: uart3_4@1 {
|
|
||||||
allwinner,pins = "PH4", "PH5", "PH6", "PH7";
|
|
||||||
allwinner,function = "uart3";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart4_2pins: uart4_2@0 {
|
|
||||||
allwinner,pins = "PD2", "PD3";
|
|
||||||
allwinner,function = "uart4";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
uart4_4pins: uart4_4@0 {
|
|
||||||
allwinner,pins = "PD2", "PD3", "PD4", "PD5";
|
|
||||||
allwinner,function = "uart4";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
mmc0_pins: mmc0@0 {
|
|
||||||
allwinner,pins = "PF0", "PF1", "PF2", "PF3",
|
|
||||||
"PF4", "PF5";
|
|
||||||
allwinner,function = "mmc0";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
mmc0_default_cd_pin: mmc0_cd_pin@0 {
|
|
||||||
allwinner,pins = "PF6";
|
|
||||||
allwinner,function = "gpio_in";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
|
|
||||||
};
|
|
||||||
|
|
||||||
mmc1_pins: mmc1@0 {
|
|
||||||
allwinner,pins = "PG0", "PG1", "PG2", "PG3",
|
|
||||||
"PG4", "PG5";
|
|
||||||
allwinner,function = "mmc1";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
mmc2_pins: mmc2@0 {
|
|
||||||
allwinner,pins = "PC1", "PC5", "PC6", "PC8",
|
|
||||||
"PC9", "PC10";
|
|
||||||
allwinner,function = "mmc2";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
i2c0_pins: i2c0_pins {
|
|
||||||
allwinner,pins = "PH0", "PH1";
|
|
||||||
allwinner,function = "i2c0";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
|
|
||||||
i2c1_pins: i2c1_pins {
|
i2c1_pins: i2c1_pins {
|
||||||
allwinner,pins = "PH2", "PH3";
|
pins = "PH2", "PH3";
|
||||||
allwinner,function = "i2c1";
|
function = "i2c1";
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
i2c2_pins: i2c2_pins {
|
mmc0_pins: mmc0-pins {
|
||||||
allwinner,pins = "PE14", "PE15";
|
pins = "PF0", "PF1", "PF2", "PF3",
|
||||||
allwinner,function = "i2c2";
|
"PF4", "PF5";
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
function = "mmc0";
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
drive-strength = <30>;
|
||||||
|
bias-pull-up;
|
||||||
};
|
};
|
||||||
|
|
||||||
rmii_pins: rmii_pins {
|
mmc1_pins: mmc1-pins {
|
||||||
allwinner,pins = "PD10", "PD11", "PD13", "PD14",
|
pins = "PG0", "PG1", "PG2", "PG3",
|
||||||
"PD17", "PD18", "PD19", "PD20",
|
"PG4", "PG5";
|
||||||
"PD22", "PD23";
|
function = "mmc1";
|
||||||
allwinner,function = "emac";
|
drive-strength = <30>;
|
||||||
allwinner,drive = <SUN4I_PINCTRL_40_MA>;
|
bias-pull-up;
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
rgmii_pins: rgmii_pins {
|
mmc2_pins: mmc2-pins {
|
||||||
allwinner,pins = "PD8", "PD9", "PD10", "PD11",
|
pins = "PC1", "PC5", "PC6", "PC8", "PC9",
|
||||||
"PD12", "PD13", "PD15",
|
"PC10","PC11", "PC12", "PC13",
|
||||||
"PD16", "PD17", "PD18", "PD19",
|
"PC14", "PC15", "PC16";
|
||||||
"PD20", "PD21", "PD22", "PD23";
|
function = "mmc2";
|
||||||
allwinner,function = "emac";
|
drive-strength = <30>;
|
||||||
allwinner,drive = <SUN4I_PINCTRL_40_MA>;
|
bias-pull-up;
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
|
|
||||||
ahb_rst: reset@1c202c0 {
|
uart0_pins_a: uart0@0 {
|
||||||
#reset-cells = <1>;
|
pins = "PB8", "PB9";
|
||||||
compatible = "allwinner,sun6i-a31-clock-reset";
|
function = "uart0";
|
||||||
reg = <0x01c202c0 0xc>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
apb1_rst: reset@1c202d0 {
|
uart1_pins: uart1_pins {
|
||||||
#reset-cells = <1>;
|
pins = "PG6", "PG7";
|
||||||
compatible = "allwinner,sun6i-a31-clock-reset";
|
function = "uart1";
|
||||||
reg = <0x01c202d0 0x4>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
apb2_rst: reset@1c202d8 {
|
uart1_rts_cts_pins: uart1_rts_cts_pins {
|
||||||
#reset-cells = <1>;
|
pins = "PG8", "PG9";
|
||||||
compatible = "allwinner,sun6i-a31-clock-reset";
|
function = "uart1";
|
||||||
reg = <0x01c202d8 0x4>;
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
uart0: serial@1c28000 {
|
uart0: serial@1c28000 {
|
||||||
|
|
@ -551,8 +303,8 @@
|
||||||
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
reg-shift = <2>;
|
reg-shift = <2>;
|
||||||
reg-io-width = <4>;
|
reg-io-width = <4>;
|
||||||
clocks = <&bus_gates 112>;
|
clocks = <&ccu 67>;
|
||||||
resets = <&apb2_rst 16>;
|
resets = <&ccu 46>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -562,8 +314,8 @@
|
||||||
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
reg-shift = <2>;
|
reg-shift = <2>;
|
||||||
reg-io-width = <4>;
|
reg-io-width = <4>;
|
||||||
clocks = <&bus_gates 113>;
|
clocks = <&ccu 68>;
|
||||||
resets = <&apb2_rst 17>;
|
resets = <&ccu 47>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -573,8 +325,8 @@
|
||||||
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
reg-shift = <2>;
|
reg-shift = <2>;
|
||||||
reg-io-width = <4>;
|
reg-io-width = <4>;
|
||||||
clocks = <&bus_gates 114>;
|
clocks = <&ccu 69>;
|
||||||
resets = <&apb2_rst 18>;
|
resets = <&ccu 48>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -584,8 +336,8 @@
|
||||||
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
reg-shift = <2>;
|
reg-shift = <2>;
|
||||||
reg-io-width = <4>;
|
reg-io-width = <4>;
|
||||||
clocks = <&bus_gates 115>;
|
clocks = <&ccu 70>;
|
||||||
resets = <&apb2_rst 19>;
|
resets = <&ccu 49>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
@ -595,24 +347,17 @@
|
||||||
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
reg-shift = <2>;
|
reg-shift = <2>;
|
||||||
reg-io-width = <4>;
|
reg-io-width = <4>;
|
||||||
clocks = <&bus_gates 116>;
|
clocks = <&ccu 71>;
|
||||||
resets = <&apb2_rst 20>;
|
resets = <&ccu 50>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
rtc: rtc@1f00000 {
|
|
||||||
compatible = "allwinner,sun6i-a31-rtc";
|
|
||||||
reg = <0x01f00000 0x54>;
|
|
||||||
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
|
|
||||||
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
};
|
|
||||||
|
|
||||||
i2c0: i2c@1c2ac00 {
|
i2c0: i2c@1c2ac00 {
|
||||||
compatible = "allwinner,sun6i-a31-i2c";
|
compatible = "allwinner,sun6i-a31-i2c";
|
||||||
reg = <0x01c2ac00 0x400>;
|
reg = <0x01c2ac00 0x400>;
|
||||||
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&bus_gates 96>;
|
clocks = <&ccu 63>;
|
||||||
resets = <&apb2_rst 0>;
|
resets = <&ccu 42>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
@ -622,8 +367,8 @@
|
||||||
compatible = "allwinner,sun6i-a31-i2c";
|
compatible = "allwinner,sun6i-a31-i2c";
|
||||||
reg = <0x01c2b000 0x400>;
|
reg = <0x01c2b000 0x400>;
|
||||||
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&bus_gates 97>;
|
clocks = <&ccu 64>;
|
||||||
resets = <&apb2_rst 1>;
|
resets = <&ccu 43>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
@ -633,54 +378,50 @@
|
||||||
compatible = "allwinner,sun6i-a31-i2c";
|
compatible = "allwinner,sun6i-a31-i2c";
|
||||||
reg = <0x01c2b400 0x400>;
|
reg = <0x01c2b400 0x400>;
|
||||||
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&bus_gates 98>;
|
clocks = <&ccu 65>;
|
||||||
resets = <&apb2_rst 2>;
|
resets = <&ccu 44>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
emac: ethernet@01c30000 {
|
gic: interrupt-controller@1c81000 {
|
||||||
compatible = "allwinner,sun50i-a64-emac";
|
compatible = "arm,gic-400";
|
||||||
reg = <0x01c30000 0x2000>, <0x01c00030 0x4>;
|
reg = <0x01c81000 0x1000>,
|
||||||
reg-names = "emac", "syscon";
|
<0x01c82000 0x2000>,
|
||||||
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
|
<0x01c84000 0x2000>,
|
||||||
resets = <&ahb_rst 17>;
|
<0x01c86000 0x2000>;
|
||||||
reset-names = "ahb";
|
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
|
||||||
clocks = <&bus_gates 17>;
|
interrupt-controller;
|
||||||
clock-names = "ahb";
|
#interrupt-cells = <3>;
|
||||||
status = "disabled";
|
|
||||||
#address-cells = <1>;
|
|
||||||
#size-cells = <0>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
usbphy: phy@1c1b810 {
|
rtc: rtc@1f00000 {
|
||||||
compatible = "allwinner,sun50i-a64-usb-phy",
|
compatible = "allwinner,sun6i-a31-rtc";
|
||||||
"allwinner,sun8i-a33-usb-phy";
|
reg = <0x01f00000 0x54>;
|
||||||
reg = <0x01c1b810 0x14>, <0x01c1b800 0x4>;
|
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
reg-names = "phy_ctrl", "pmu1";
|
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
status = "disabled";
|
|
||||||
#phy-cells = <1>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
ehci1: usb@01c1b000 {
|
r_ccu: clock@1f01400 {
|
||||||
compatible = "allwinner,sun50i-a64-ehci",
|
compatible = "allwinner,sun50i-a64-r-ccu";
|
||||||
"generic-ehci";
|
reg = <0x01f01400 0x100>;
|
||||||
reg = <0x01c1b000 0x100>;
|
clocks = <&osc24M>, <&osc32k>, <&iosc>;
|
||||||
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
|
clock-names = "hosc", "losc", "iosc";
|
||||||
phys = <&usbphy 1>;
|
#clock-cells = <1>;
|
||||||
phy-names = "usb";
|
#reset-cells = <1>;
|
||||||
status = "disabled";
|
|
||||||
};
|
};
|
||||||
|
|
||||||
ohci1: usb@01c1b400 {
|
r_pio: pinctrl@01f02c00 {
|
||||||
compatible = "allwinner,sun50i-a64-ohci",
|
compatible = "allwinner,sun50i-a64-r-pinctrl";
|
||||||
"generic-ohci";
|
reg = <0x01f02c00 0x400>;
|
||||||
reg = <0x01c1b400 0x100>;
|
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
clocks = <&r_ccu 3>, <&osc24M>, <&osc32k>;
|
||||||
phys = <&usbphy 1>;
|
clock-names = "apb", "hosc", "losc";
|
||||||
phy-names = "usb";
|
gpio-controller;
|
||||||
status = "enabled";
|
#gpio-cells = <3>;
|
||||||
|
interrupt-controller;
|
||||||
|
#interrupt-cells = <3>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -42,40 +42,14 @@
|
||||||
|
|
||||||
/dts-v1/;
|
/dts-v1/;
|
||||||
|
|
||||||
#include "sun8i-h3.dtsi"
|
#include "sun50i-h5.dtsi"
|
||||||
|
|
||||||
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "OrangePi PC 2";
|
model = "OrangePi PC 2";
|
||||||
compatible = "xunlong,orangepi-pc-2", "allwinner,sun50i-h5";
|
compatible = "xunlong,orangepi-pc-2", "allwinner,sun50i-h5";
|
||||||
|
|
||||||
cpus {
|
|
||||||
cpu@0 {
|
|
||||||
compatible = "arm,cortex-a53", "arm,armv8";
|
|
||||||
enable-method = "psci";
|
|
||||||
};
|
|
||||||
cpu@1 {
|
|
||||||
compatible = "arm,cortex-a53", "arm,armv8";
|
|
||||||
enable-method = "psci";
|
|
||||||
};
|
|
||||||
cpu@2 {
|
|
||||||
compatible = "arm,cortex-a53", "arm,armv8";
|
|
||||||
enable-method = "psci";
|
|
||||||
};
|
|
||||||
cpu@3 {
|
|
||||||
compatible = "arm,cortex-a53", "arm,armv8";
|
|
||||||
enable-method = "psci";
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
psci {
|
|
||||||
compatible = "arm,psci-0.2";
|
|
||||||
method = "smc";
|
|
||||||
};
|
|
||||||
|
|
||||||
timer {
|
|
||||||
compatible = "arm,armv8-timer";
|
|
||||||
};
|
|
||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
stdout-path = "serial0:115200n8";
|
stdout-path = "serial0:115200n8";
|
||||||
};
|
};
|
||||||
|
|
@ -99,10 +73,6 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&gic {
|
|
||||||
compatible = "arm,gic-400";
|
|
||||||
};
|
|
||||||
|
|
||||||
&mmc0 {
|
&mmc0 {
|
||||||
compatible = "allwinner,sun50i-h5-mmc",
|
compatible = "allwinner,sun50i-h5-mmc",
|
||||||
"allwinner,sun50i-a64-mmc",
|
"allwinner,sun50i-a64-mmc",
|
||||||
|
|
@ -111,7 +81,7 @@
|
||||||
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
|
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
|
||||||
vmmc-supply = <®_vcc3v3>;
|
vmmc-supply = <®_vcc3v3>;
|
||||||
bus-width = <4>;
|
bus-width = <4>;
|
||||||
cd-gpios = <&pio 5 6 0>;
|
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
|
||||||
cd-inverted;
|
cd-inverted;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2016 ARM Ltd.
|
* Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
|
||||||
*
|
*
|
||||||
* This file is dual-licensed: you can use it either under the terms
|
* This file is dual-licensed: you can use it either under the terms
|
||||||
* of the GPL or the X11 license, at your option. Note that this dual
|
* of the GPL or the X11 license, at your option. Note that this dual
|
||||||
|
|
@ -40,13 +40,26 @@
|
||||||
* OTHER DEALINGS IN THE SOFTWARE.
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "sun50i-a64.dtsi"
|
/dts-v1/;
|
||||||
|
|
||||||
|
#include "sun50i-h5.dtsi"
|
||||||
|
|
||||||
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
|
model = "OrangePi Prime";
|
||||||
|
compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
|
||||||
|
|
||||||
aliases {
|
aliases {
|
||||||
serial0 = &uart0;
|
serial0 = &uart0;
|
||||||
ethernet0 = &emac;
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
stdout-path = "serial0:115200n8";
|
||||||
|
};
|
||||||
|
|
||||||
|
memory {
|
||||||
|
reg = <0x40000000 0x80000000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
soc {
|
soc {
|
||||||
|
|
@ -60,10 +73,14 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
&mmc0 {
|
&mmc0 {
|
||||||
|
compatible = "allwinner,sun50i-h5-mmc",
|
||||||
|
"allwinner,sun50i-a64-mmc",
|
||||||
|
"allwinner,sun5i-a13-mmc";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
pinctrl-0 = <&mmc0_pins>, <&mmc0_default_cd_pin>;
|
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
|
||||||
vmmc-supply = <®_vcc3v3>;
|
vmmc-supply = <®_vcc3v3>;
|
||||||
cd-gpios = <&pio 5 6 0>;
|
bus-width = <4>;
|
||||||
|
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
|
||||||
cd-inverted;
|
cd-inverted;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
@ -74,12 +91,6 @@
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
&i2c1 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&i2c1_pins>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&usbphy {
|
&usbphy {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
@ -0,0 +1,77 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2016 ARM Ltd.
|
||||||
|
*
|
||||||
|
* This file is dual-licensed: you can use it either under the terms
|
||||||
|
* of the GPL or the X11 license, at your option. Note that this dual
|
||||||
|
* licensing only applies to this file, and not this project as a
|
||||||
|
* whole.
|
||||||
|
*
|
||||||
|
* a) This library is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of the
|
||||||
|
* License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This library is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* Or, alternatively,
|
||||||
|
*
|
||||||
|
* b) Permission is hereby granted, free of charge, to any person
|
||||||
|
* obtaining a copy of this software and associated documentation
|
||||||
|
* files (the "Software"), to deal in the Software without
|
||||||
|
* restriction, including without limitation the rights to use,
|
||||||
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||||
|
* sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following
|
||||||
|
* conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be
|
||||||
|
* included in all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||||
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||||
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||||
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||||
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||||
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "sun8i-h3.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
cpus {
|
||||||
|
cpu@0 {
|
||||||
|
compatible = "arm,cortex-a53", "arm,armv8";
|
||||||
|
enable-method = "psci";
|
||||||
|
};
|
||||||
|
cpu@1 {
|
||||||
|
compatible = "arm,cortex-a53", "arm,armv8";
|
||||||
|
enable-method = "psci";
|
||||||
|
};
|
||||||
|
cpu@2 {
|
||||||
|
compatible = "arm,cortex-a53", "arm,armv8";
|
||||||
|
enable-method = "psci";
|
||||||
|
};
|
||||||
|
cpu@3 {
|
||||||
|
compatible = "arm,cortex-a53", "arm,armv8";
|
||||||
|
enable-method = "psci";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
psci {
|
||||||
|
compatible = "arm,psci-0.2";
|
||||||
|
method = "smc";
|
||||||
|
};
|
||||||
|
|
||||||
|
timer {
|
||||||
|
compatible = "arm,armv8-timer";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&gic {
|
||||||
|
compatible = "arm,gic-400";
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,64 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2016 Milo Kim <woogyom.kim@gmail.com>
|
||||||
|
*
|
||||||
|
* This file is dual-licensed: you can use it either under the terms
|
||||||
|
* of the GPL or the X11 license, at your option. Note that this dual
|
||||||
|
* licensing only applies to this file, and not this project as a
|
||||||
|
* whole.
|
||||||
|
*
|
||||||
|
* a) This file is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of the
|
||||||
|
* License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This file is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* Or, alternatively,
|
||||||
|
*
|
||||||
|
* b) Permission is hereby granted, free of charge, to any person
|
||||||
|
* obtaining a copy of this software and associated documentation
|
||||||
|
* files (the "Software"), to deal in the Software without
|
||||||
|
* restriction, including without limitation the rights to use,
|
||||||
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||||
|
* sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following
|
||||||
|
* conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be
|
||||||
|
* included in all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||||
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||||
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||||
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||||
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||||
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "sun8i-h3-nanopi.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "FriendlyArm NanoPi M1";
|
||||||
|
compatible = "friendlyarm,nanopi-m1", "allwinner,sun8i-h3";
|
||||||
|
};
|
||||||
|
|
||||||
|
&ehci1 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&ehci2 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&ohci1 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&ohci2 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
@ -40,88 +40,11 @@
|
||||||
* OTHER DEALINGS IN THE SOFTWARE.
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/dts-v1/;
|
#include "sun8i-h3-nanopi.dtsi"
|
||||||
#include "sun8i-h3.dtsi"
|
|
||||||
#include "sunxi-common-regulators.dtsi"
|
|
||||||
|
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
|
||||||
#include <dt-bindings/pinctrl/sun4i-a10.h>
|
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "FriendlyARM NanoPi NEO";
|
model = "FriendlyARM NanoPi NEO";
|
||||||
compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
|
compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
|
||||||
|
|
||||||
aliases {
|
|
||||||
serial0 = &uart0;
|
|
||||||
};
|
|
||||||
|
|
||||||
chosen {
|
|
||||||
stdout-path = "serial0:115200n8";
|
|
||||||
};
|
|
||||||
|
|
||||||
leds {
|
|
||||||
compatible = "gpio-leds";
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
|
|
||||||
|
|
||||||
pwr {
|
|
||||||
label = "nanopi:green:pwr";
|
|
||||||
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
|
|
||||||
default-state = "on";
|
|
||||||
};
|
|
||||||
|
|
||||||
status {
|
|
||||||
label = "nanopi:blue:status";
|
|
||||||
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&ehci3 {
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&mmc0 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
|
|
||||||
vmmc-supply = <®_vcc3v3>;
|
|
||||||
bus-width = <4>;
|
|
||||||
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
|
|
||||||
cd-inverted;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&ohci3 {
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&pio {
|
|
||||||
leds_opc: led-pins {
|
|
||||||
allwinner,pins = "PA10";
|
|
||||||
allwinner,function = "gpio_out";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&r_pio {
|
|
||||||
leds_r_opc: led-pins {
|
|
||||||
allwinner,pins = "PL10";
|
|
||||||
allwinner,function = "gpio_out";
|
|
||||||
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
&uart0 {
|
|
||||||
pinctrl-names = "default";
|
|
||||||
pinctrl-0 = <&uart0_pins_a>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&usbphy {
|
|
||||||
/* USB VBUS is always on */
|
|
||||||
status = "okay";
|
|
||||||
};
|
};
|
||||||
|
|
||||||
&emac {
|
&emac {
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,137 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2016 James Pettigrew <james@innovum.com.au>
|
||||||
|
* Copyright (C) 2016 Milo Kim <woogyom.kim@gmail.com>
|
||||||
|
*
|
||||||
|
* This file is dual-licensed: you can use it either under the terms
|
||||||
|
* of the GPL or the X11 license, at your option. Note that this dual
|
||||||
|
* licensing only applies to this file, and not this project as a
|
||||||
|
* whole.
|
||||||
|
*
|
||||||
|
* a) This file is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of the
|
||||||
|
* License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This file is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* Or, alternatively,
|
||||||
|
*
|
||||||
|
* b) Permission is hereby granted, free of charge, to any person
|
||||||
|
* obtaining a copy of this software and associated documentation
|
||||||
|
* files (the "Software"), to deal in the Software without
|
||||||
|
* restriction, including without limitation the rights to use,
|
||||||
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||||
|
* sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following
|
||||||
|
* conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be
|
||||||
|
* included in all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||||
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||||
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||||
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||||
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||||
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
#include "sun8i-h3.dtsi"
|
||||||
|
#include "sunxi-common-regulators.dtsi"
|
||||||
|
|
||||||
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
|
#include <dt-bindings/input/input.h>
|
||||||
|
|
||||||
|
/ {
|
||||||
|
aliases {
|
||||||
|
serial0 = &uart0;
|
||||||
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
stdout-path = "serial0:115200n8";
|
||||||
|
};
|
||||||
|
|
||||||
|
leds {
|
||||||
|
compatible = "gpio-leds";
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&leds_npi>, <&leds_r_npi>;
|
||||||
|
|
||||||
|
status {
|
||||||
|
label = "nanopi:blue:status";
|
||||||
|
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
|
||||||
|
linux,default-trigger = "heartbeat";
|
||||||
|
};
|
||||||
|
|
||||||
|
pwr {
|
||||||
|
label = "nanopi:green:pwr";
|
||||||
|
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
|
||||||
|
default-state = "on";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
r_gpio_keys {
|
||||||
|
compatible = "gpio-keys";
|
||||||
|
input-name = "k1";
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&sw_r_npi>;
|
||||||
|
|
||||||
|
k1@0 {
|
||||||
|
label = "k1";
|
||||||
|
linux,code = <KEY_POWER>;
|
||||||
|
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&ehci3 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&mmc0 {
|
||||||
|
bus-width = <4>;
|
||||||
|
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
|
||||||
|
cd-inverted;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
|
||||||
|
status = "okay";
|
||||||
|
vmmc-supply = <®_vcc3v3>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&ohci3 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&pio {
|
||||||
|
leds_npi: led_pins@0 {
|
||||||
|
pins = "PA10";
|
||||||
|
function = "gpio_out";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&r_pio {
|
||||||
|
leds_r_npi: led_pins@0 {
|
||||||
|
pins = "PL10";
|
||||||
|
function = "gpio_out";
|
||||||
|
};
|
||||||
|
|
||||||
|
sw_r_npi: key_pins@0 {
|
||||||
|
pins = "PL3";
|
||||||
|
function = "gpio_in";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&uart0 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&uart0_pins_a>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&usbphy {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
@ -114,6 +114,11 @@ S: Maintained
|
||||||
F: configs/Bananapi_M2_Ultra_defconfig
|
F: configs/Bananapi_M2_Ultra_defconfig
|
||||||
F: arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
|
F: arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
|
||||||
|
|
||||||
|
BANANAPI M64
|
||||||
|
M: Jagan Teki <jagan@amarulasolutions.com>
|
||||||
|
S: Maintained
|
||||||
|
F: configs/bananapi_m64_defconfig
|
||||||
|
|
||||||
COLOMBUS BOARD
|
COLOMBUS BOARD
|
||||||
M: Maxime Ripard <maxime.ripard@free-electrons.com>
|
M: Maxime Ripard <maxime.ripard@free-electrons.com>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
|
|
@ -237,6 +242,11 @@ M: Siarhei Siamashka <siarhei.siamashka@gmail.com>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: configs/MSI_Primo81_defconfig
|
F: configs/MSI_Primo81_defconfig
|
||||||
|
|
||||||
|
NANOPI-M1 BOARD
|
||||||
|
M: Mylène Josserand <mylene.josserand@free-electrons.com>
|
||||||
|
S: Maintained
|
||||||
|
F: configs/nanopi_m1_defconfig
|
||||||
|
|
||||||
NANOPI-NEO BOARD
|
NANOPI-NEO BOARD
|
||||||
M: Jelle van der Waa <jelle@vdwaa.nl>
|
M: Jelle van der Waa <jelle@vdwaa.nl>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
|
|
@ -262,6 +272,11 @@ M: Andre Przywara <andre.przywara@arm.com>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: configs/orangepi_pc2_defconfig
|
F: configs/orangepi_pc2_defconfig
|
||||||
|
|
||||||
|
ORANGEPI PRIME BOARD
|
||||||
|
M: Jagan Teki <jagan@amarulasolutions.com>
|
||||||
|
S: Maintained
|
||||||
|
F: configs/orangepi_prime_defconfig
|
||||||
|
|
||||||
PINE64 BOARDS
|
PINE64 BOARDS
|
||||||
M: Andre Przywara <andre.przywara@arm.com>
|
M: Andre Przywara <andre.przywara@arm.com>
|
||||||
S: Maintained
|
S: Maintained
|
||||||
|
|
|
||||||
|
|
@ -1,5 +1,6 @@
|
||||||
CONFIG_ARM=y
|
CONFIG_ARM=y
|
||||||
CONFIG_ARCH_SUNXI=y
|
CONFIG_ARCH_SUNXI=y
|
||||||
|
CONFIG_CONS_INDEX=1
|
||||||
CONFIG_MACH_SUN8I_A33=y
|
CONFIG_MACH_SUN8I_A33=y
|
||||||
CONFIG_DRAM_CLK=552
|
CONFIG_DRAM_CLK=552
|
||||||
CONFIG_DRAM_ZQ=15291
|
CONFIG_DRAM_ZQ=15291
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,17 @@
|
||||||
|
CONFIG_ARM=y
|
||||||
|
CONFIG_ARCH_SUNXI=y
|
||||||
|
CONFIG_MACH_SUN50I=y
|
||||||
|
CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
|
||||||
|
CONFIG_MMC0_CD_PIN="PH13"
|
||||||
|
CONFIG_MMC_SUNXI_SLOT_EXTRA=2
|
||||||
|
CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-bananapi-m64"
|
||||||
|
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||||
|
CONFIG_SPL=y
|
||||||
|
# CONFIG_CMD_IMLS is not set
|
||||||
|
# CONFIG_CMD_FLASH is not set
|
||||||
|
# CONFIG_CMD_FPGA is not set
|
||||||
|
# CONFIG_SPL_DOS_PARTITION is not set
|
||||||
|
# CONFIG_SPL_ISO_PARTITION is not set
|
||||||
|
# CONFIG_SPL_EFI_PARTITION is not set
|
||||||
|
CONFIG_SUN8I_EMAC=y
|
||||||
|
CONFIG_USB_EHCI_HCD=y
|
||||||
|
|
@ -0,0 +1,16 @@
|
||||||
|
CONFIG_ARM=y
|
||||||
|
CONFIG_ARCH_SUNXI=y
|
||||||
|
CONFIG_MACH_SUN8I_H3=y
|
||||||
|
CONFIG_DRAM_CLK=408
|
||||||
|
CONFIG_DRAM_ZQ=3881979
|
||||||
|
CONFIG_DRAM_ODT_EN=y
|
||||||
|
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-m1"
|
||||||
|
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||||
|
CONFIG_SPL=y
|
||||||
|
# CONFIG_CMD_IMLS is not set
|
||||||
|
# CONFIG_CMD_FLASH is not set
|
||||||
|
# CONFIG_CMD_FPGA is not set
|
||||||
|
# CONFIG_SPL_DOS_PARTITION is not set
|
||||||
|
# CONFIG_SPL_ISO_PARTITION is not set
|
||||||
|
# CONFIG_SPL_EFI_PARTITION is not set
|
||||||
|
CONFIG_USB_EHCI_HCD=y
|
||||||
|
|
@ -0,0 +1,16 @@
|
||||||
|
CONFIG_ARM=y
|
||||||
|
CONFIG_ARCH_SUNXI=y
|
||||||
|
CONFIG_MACH_SUN50I_H5=y
|
||||||
|
CONFIG_DRAM_CLK=672
|
||||||
|
CONFIG_DRAM_ZQ=3881977
|
||||||
|
CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime"
|
||||||
|
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||||
|
CONFIG_SPL=y
|
||||||
|
# CONFIG_CMD_IMLS is not set
|
||||||
|
# CONFIG_CMD_FLASH is not set
|
||||||
|
# CONFIG_CMD_FPGA is not set
|
||||||
|
# CONFIG_SPL_DOS_PARTITION is not set
|
||||||
|
# CONFIG_SPL_ISO_PARTITION is not set
|
||||||
|
# CONFIG_SPL_EFI_PARTITION is not set
|
||||||
|
CONFIG_SUN8I_EMAC=y
|
||||||
|
CONFIG_USB_EHCI_HCD=y
|
||||||
|
|
@ -0,0 +1,134 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
|
||||||
|
*
|
||||||
|
* This file is dual-licensed: you can use it either under the terms
|
||||||
|
* of the GPL or the X11 license, at your option. Note that this dual
|
||||||
|
* licensing only applies to this file, and not this project as a
|
||||||
|
* whole.
|
||||||
|
*
|
||||||
|
* a) This file is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of the
|
||||||
|
* License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This file is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* Or, alternatively,
|
||||||
|
*
|
||||||
|
* b) Permission is hereby granted, free of charge, to any person
|
||||||
|
* obtaining a copy of this software and associated documentation
|
||||||
|
* files (the "Software"), to deal in the Software without
|
||||||
|
* restriction, including without limitation the rights to use,
|
||||||
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||||
|
* sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following
|
||||||
|
* conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be
|
||||||
|
* included in all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||||
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||||
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||||
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||||
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||||
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
|
||||||
|
#define _DT_BINDINGS_CLK_SUN50I_A64_H_
|
||||||
|
|
||||||
|
#define CLK_BUS_MIPI_DSI 28
|
||||||
|
#define CLK_BUS_CE 29
|
||||||
|
#define CLK_BUS_DMA 30
|
||||||
|
#define CLK_BUS_MMC0 31
|
||||||
|
#define CLK_BUS_MMC1 32
|
||||||
|
#define CLK_BUS_MMC2 33
|
||||||
|
#define CLK_BUS_NAND 34
|
||||||
|
#define CLK_BUS_DRAM 35
|
||||||
|
#define CLK_BUS_EMAC 36
|
||||||
|
#define CLK_BUS_TS 37
|
||||||
|
#define CLK_BUS_HSTIMER 38
|
||||||
|
#define CLK_BUS_SPI0 39
|
||||||
|
#define CLK_BUS_SPI1 40
|
||||||
|
#define CLK_BUS_OTG 41
|
||||||
|
#define CLK_BUS_EHCI0 42
|
||||||
|
#define CLK_BUS_EHCI1 43
|
||||||
|
#define CLK_BUS_OHCI0 44
|
||||||
|
#define CLK_BUS_OHCI1 45
|
||||||
|
#define CLK_BUS_VE 46
|
||||||
|
#define CLK_BUS_TCON0 47
|
||||||
|
#define CLK_BUS_TCON1 48
|
||||||
|
#define CLK_BUS_DEINTERLACE 49
|
||||||
|
#define CLK_BUS_CSI 50
|
||||||
|
#define CLK_BUS_HDMI 51
|
||||||
|
#define CLK_BUS_DE 52
|
||||||
|
#define CLK_BUS_GPU 53
|
||||||
|
#define CLK_BUS_MSGBOX 54
|
||||||
|
#define CLK_BUS_SPINLOCK 55
|
||||||
|
#define CLK_BUS_CODEC 56
|
||||||
|
#define CLK_BUS_SPDIF 57
|
||||||
|
#define CLK_BUS_PIO 58
|
||||||
|
#define CLK_BUS_THS 59
|
||||||
|
#define CLK_BUS_I2S0 60
|
||||||
|
#define CLK_BUS_I2S1 61
|
||||||
|
#define CLK_BUS_I2S2 62
|
||||||
|
#define CLK_BUS_I2C0 63
|
||||||
|
#define CLK_BUS_I2C1 64
|
||||||
|
#define CLK_BUS_I2C2 65
|
||||||
|
#define CLK_BUS_SCR 66
|
||||||
|
#define CLK_BUS_UART0 67
|
||||||
|
#define CLK_BUS_UART1 68
|
||||||
|
#define CLK_BUS_UART2 69
|
||||||
|
#define CLK_BUS_UART3 70
|
||||||
|
#define CLK_BUS_UART4 71
|
||||||
|
#define CLK_BUS_DBG 72
|
||||||
|
#define CLK_THS 73
|
||||||
|
#define CLK_NAND 74
|
||||||
|
#define CLK_MMC0 75
|
||||||
|
#define CLK_MMC1 76
|
||||||
|
#define CLK_MMC2 77
|
||||||
|
#define CLK_TS 78
|
||||||
|
#define CLK_CE 79
|
||||||
|
#define CLK_SPI0 80
|
||||||
|
#define CLK_SPI1 81
|
||||||
|
#define CLK_I2S0 82
|
||||||
|
#define CLK_I2S1 83
|
||||||
|
#define CLK_I2S2 84
|
||||||
|
#define CLK_SPDIF 85
|
||||||
|
#define CLK_USB_PHY0 86
|
||||||
|
#define CLK_USB_PHY1 87
|
||||||
|
#define CLK_USB_HSIC 88
|
||||||
|
#define CLK_USB_HSIC_12M 89
|
||||||
|
|
||||||
|
#define CLK_USB_OHCI0 91
|
||||||
|
|
||||||
|
#define CLK_USB_OHCI1 93
|
||||||
|
|
||||||
|
#define CLK_DRAM_VE 95
|
||||||
|
#define CLK_DRAM_CSI 96
|
||||||
|
#define CLK_DRAM_DEINTERLACE 97
|
||||||
|
#define CLK_DRAM_TS 98
|
||||||
|
#define CLK_DE 99
|
||||||
|
#define CLK_TCON0 100
|
||||||
|
#define CLK_TCON1 101
|
||||||
|
#define CLK_DEINTERLACE 102
|
||||||
|
#define CLK_CSI_MISC 103
|
||||||
|
#define CLK_CSI_SCLK 104
|
||||||
|
#define CLK_CSI_MCLK 105
|
||||||
|
#define CLK_VE 106
|
||||||
|
#define CLK_AC_DIG 107
|
||||||
|
#define CLK_AC_DIG_4X 108
|
||||||
|
#define CLK_AVS 109
|
||||||
|
#define CLK_HDMI 110
|
||||||
|
#define CLK_HDMI_DDC 111
|
||||||
|
|
||||||
|
#define CLK_DSI_DPHY 113
|
||||||
|
#define CLK_GPU 114
|
||||||
|
|
||||||
|
#endif /* _DT_BINDINGS_CLK_SUN50I_H_ */
|
||||||
|
|
@ -0,0 +1,98 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
|
||||||
|
*
|
||||||
|
* This file is dual-licensed: you can use it either under the terms
|
||||||
|
* of the GPL or the X11 license, at your option. Note that this dual
|
||||||
|
* licensing only applies to this file, and not this project as a
|
||||||
|
* whole.
|
||||||
|
*
|
||||||
|
* a) This file is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of the
|
||||||
|
* License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This file is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* Or, alternatively,
|
||||||
|
*
|
||||||
|
* b) Permission is hereby granted, free of charge, to any person
|
||||||
|
* obtaining a copy of this software and associated documentation
|
||||||
|
* files (the "Software"), to deal in the Software without
|
||||||
|
* restriction, including without limitation the rights to use,
|
||||||
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
||||||
|
* sell copies of the Software, and to permit persons to whom the
|
||||||
|
* Software is furnished to do so, subject to the following
|
||||||
|
* conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be
|
||||||
|
* included in all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||||
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||||
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
||||||
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
||||||
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||||
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||||
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||||
|
* OTHER DEALINGS IN THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _DT_BINDINGS_RST_SUN50I_A64_H_
|
||||||
|
#define _DT_BINDINGS_RST_SUN50I_A64_H_
|
||||||
|
|
||||||
|
#define RST_USB_PHY0 0
|
||||||
|
#define RST_USB_PHY1 1
|
||||||
|
#define RST_USB_HSIC 2
|
||||||
|
#define RST_DRAM 3
|
||||||
|
#define RST_MBUS 4
|
||||||
|
#define RST_BUS_MIPI_DSI 5
|
||||||
|
#define RST_BUS_CE 6
|
||||||
|
#define RST_BUS_DMA 7
|
||||||
|
#define RST_BUS_MMC0 8
|
||||||
|
#define RST_BUS_MMC1 9
|
||||||
|
#define RST_BUS_MMC2 10
|
||||||
|
#define RST_BUS_NAND 11
|
||||||
|
#define RST_BUS_DRAM 12
|
||||||
|
#define RST_BUS_EMAC 13
|
||||||
|
#define RST_BUS_TS 14
|
||||||
|
#define RST_BUS_HSTIMER 15
|
||||||
|
#define RST_BUS_SPI0 16
|
||||||
|
#define RST_BUS_SPI1 17
|
||||||
|
#define RST_BUS_OTG 18
|
||||||
|
#define RST_BUS_EHCI0 19
|
||||||
|
#define RST_BUS_EHCI1 20
|
||||||
|
#define RST_BUS_OHCI0 21
|
||||||
|
#define RST_BUS_OHCI1 22
|
||||||
|
#define RST_BUS_VE 23
|
||||||
|
#define RST_BUS_TCON0 24
|
||||||
|
#define RST_BUS_TCON1 25
|
||||||
|
#define RST_BUS_DEINTERLACE 26
|
||||||
|
#define RST_BUS_CSI 27
|
||||||
|
#define RST_BUS_HDMI0 28
|
||||||
|
#define RST_BUS_HDMI1 29
|
||||||
|
#define RST_BUS_DE 30
|
||||||
|
#define RST_BUS_GPU 31
|
||||||
|
#define RST_BUS_MSGBOX 32
|
||||||
|
#define RST_BUS_SPINLOCK 33
|
||||||
|
#define RST_BUS_DBG 34
|
||||||
|
#define RST_BUS_LVDS 35
|
||||||
|
#define RST_BUS_CODEC 36
|
||||||
|
#define RST_BUS_SPDIF 37
|
||||||
|
#define RST_BUS_THS 38
|
||||||
|
#define RST_BUS_I2S0 39
|
||||||
|
#define RST_BUS_I2S1 40
|
||||||
|
#define RST_BUS_I2S2 41
|
||||||
|
#define RST_BUS_I2C0 42
|
||||||
|
#define RST_BUS_I2C1 43
|
||||||
|
#define RST_BUS_I2C2 44
|
||||||
|
#define RST_BUS_SCR 45
|
||||||
|
#define RST_BUS_UART0 46
|
||||||
|
#define RST_BUS_UART1 47
|
||||||
|
#define RST_BUS_UART2 48
|
||||||
|
#define RST_BUS_UART3 49
|
||||||
|
#define RST_BUS_UART4 50
|
||||||
|
|
||||||
|
#endif /* _DT_BINDINGS_RST_SUN50I_A64_H_ */
|
||||||
Loading…
Reference in New Issue