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rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC 

The generic ehci-driver (ehci-generic.c) will try to enable the clocks
listed in the DTSI. If this fails (e.g. due to clk_enable not being
implemented in a driver and -ENOSYS being returned by the clk-uclass),
the driver will bail our and print an error message.

This implements a minimal clk_enable for the RK3288 and supports the
clocks mandatory for the EHCI controllers; as these are enabled by
default we simply return success.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This commit is contained in:
Wadim Egorov 2018-03-19 16:39:29 +01:00 committed by Philipp Tomsich
parent 5512f5ccf1
commit b0ba1e7e9d
1 changed files with 13 additions and 0 deletions
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13
drivers/clk/rockchip/clk_rk3288.c
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@ -893,12 +893,25 @@ static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *par
return -ENOENT; return -ENOENT;
} }
static int rk3288_clk_enable(struct clk *clk)
{
switch (clk->id) {
case HCLK_USBHOST0:
case HCLK_HSIC:
return 0;
}
debug("%s: unsupported clk %ld\n", __func__, clk->id);
return -ENOENT;
}
static struct clk_ops rk3288_clk_ops = { static struct clk_ops rk3288_clk_ops = {
.get_rate = rk3288_clk_get_rate, .get_rate = rk3288_clk_get_rate,
.set_rate = rk3288_clk_set_rate, .set_rate = rk3288_clk_set_rate,
#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
.set_parent = rk3288_clk_set_parent, .set_parent = rk3288_clk_set_parent,
#endif #endif
.enable = rk3288_clk_enable,
}; };
static int rk3288_clk_ofdata_to_platdata(struct udevice *dev) static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)