diff --git a/arch/arm/dts/armada-385-hw14-common.dtsi b/arch/arm/dts/armada-385-hw14-common.dtsi
index b42b666944..d3863322df 100644
--- a/arch/arm/dts/armada-385-hw14-common.dtsi
+++ b/arch/arm/dts/armada-385-hw14-common.dtsi
@@ -74,6 +74,7 @@
 			rst_pse_eth = <&gpioi2c 7 GPIO_ACTIVE_LOW 1>;
 			reset_button = <&gpio1 24 GPIO_ACTIVE_LOW 1>;
 			ext_oe = <&gpio0 21 GPIO_ACTIVE_LOW 0>;
+			pcie1_en_clk = <&gpiofpga 406 GPIO_ACTIVE_LOW 0>;
 			serdes4_mux_en = <&gpiofpga 535 GPIO_ACTIVE_LOW 0>;
 			serdes4_mux_sel = <&gpiofpga 534 GPIO_ACTIVE_HIGH 1>; // 0=usb3, 1=pci
 			pex2_clk_1_4_mux_en = <&gpiofpga 533 GPIO_ACTIVE_LOW 0>;
diff --git a/board/nm/hw14/board.c b/board/nm/hw14/board.c
index 9202d671a7..52c9191250 100644
--- a/board/nm/hw14/board.c
+++ b/board/nm/hw14/board.c
@@ -762,6 +762,31 @@ int board_fit_config_name_match(const char *name)
 
 #if !defined(CONFIG_SPL_BUILD)
 
+int is_pcie1_on_mc_board_v3x_required(void)
+{
+	int mc_hw_ver = 0, mc_hw_rev = 0;
+
+	/* On MC boards with revisions greater or equal 3.3 and below 4.0 we need to enable
+	   the pcie clock on the first slot when a wifi card is plugged in. */
+
+	get_hw14_hw_version(&bdctx[3], &mc_hw_ver, &mc_hw_rev);
+	if ((mc_hw_ver == 3) && (mc_hw_rev >= 3)) {
+		int i;
+		for (i = BD_Pd_Module0; i < BD_Pd_Module5; i++) /* pd_module0...pd_module5 */
+		{
+			char pdval[200];
+			strcpy(pdval, "" );  /*init with an empty string*/
+			if (BD_GetString(&bdctx[3], i, 0, pdval, sizeof(pdval) )) {
+				if ((strstr(pdval, "slot=0")) && (strstr(pdval, "wlan-"))) {
+					return 1;
+				}
+			}
+		}
+	}
+
+	return 0;
+}
+
 #ifdef CONFIG_OF_BOARD_FIXUP
 
 int fdt_enable_by_ofname(void *rw_fdt_blob, char *ofname)
diff --git a/board/nm/hw14/nbhw_fpga_config.c b/board/nm/hw14/nbhw_fpga_config.c
index 2a631fb56b..d61b1ad7ba 100644
--- a/board/nm/hw14/nbhw_fpga_config.c
+++ b/board/nm/hw14/nbhw_fpga_config.c
@@ -39,6 +39,7 @@ static struct pcie_slot_gpios pcie_slots[PCIE_SLOT_COUNT];
 static int pcie_slot_count = 0;
 
 int pcie_lane_by_slot(int slot);
+int is_pcie1_on_mc_board_v3x_required(void);
 
 static int request_and_set_gpio_by_name(ofnode fdt,
 		const char *name, struct gpio_desc *desc)
@@ -101,6 +102,10 @@ static void configure_pcie_muxes(void)
 	set_gpio(GPIO_SERDES4_MUX_EN, 0);
 	set_gpio(GPIO_PEX2_CLK_1_4_MUX_EN, 0);
 
+	if (is_pcie1_on_mc_board_v3x_required()) {
+		set_gpio(GPIO_PCIE1_EN_CLK, 1);
+	}
+
 	/* Check for PCIe on slot 1 */
 	if (pcie_lane_by_slot(1) >= 0) {
 		// PEX2 is on slot 1
diff --git a/board/nm/hw14/nbhw_gpio.h b/board/nm/hw14/nbhw_gpio.h
index a2c5deb2e6..c2afcf3e96 100644
--- a/board/nm/hw14/nbhw_gpio.h
+++ b/board/nm/hw14/nbhw_gpio.h
@@ -15,6 +15,7 @@
 #define GPIO_RST_PSE_ETH           "rst_pse_eth"
 #define GPIO_RESET_BUTTON          "reset_button"
 #define GPIO_EXT_OE                "ext_oe"
+#define GPIO_PCIE1_EN_CLK          "pcie1_en_clk"
 #define GPIO_SERDES4_MUX_EN        "serdes4_mux_en"
 #define GPIO_SERDES4_MUX_SEL       "serdes4_mux_sel"
 #define GPIO_PEX2_CLK_1_4_MUX_EN   "pex2_clk_1_4_mux_en"