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nvme: Cache controller's capabilities 

Capabilities register is RO and accessed at various places in the
driver. Let's cache it in the controller driver's priv struct.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Bin Meng 2017-08-22 08:15:10 -07:00 committed by Tom Rini
parent 3e18562961
commit b65c692143
2 changed files with 6 additions and 6 deletions
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11
drivers/nvme/nvme.c
View File

@ -318,7 +318,7 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev)
{
int result;
u32 aqa;
u64 cap = nvme_readq(&dev->bar->cap);
u64 cap = dev->cap;
struct nvme_queue *nvmeq;
/* most architectures use 4KB as the page size */
unsigned page_shift = 12;
@ -549,7 +549,7 @@ static int nvme_get_info_from_identify(struct nvme_dev *dev)
{
struct nvme_id_ctrl buf, *ctrl = &buf;
int ret;
int shift = NVME_CAP_MPSMIN(nvme_readq(&dev->bar->cap)) + 12;
int shift = NVME_CAP_MPSMIN(dev->cap) + 12;
ret = nvme_identify(dev, 0, 1, (dma_addr_t)ctrl);
if (ret)
@ -772,7 +772,6 @@ static int nvme_probe(struct udevice *udev)
{
int ret;
struct nvme_dev *ndev = dev_get_priv(udev);
u64 cap;
ndev->instance = trailing_strtol(udev->name);
@ -801,9 +800,9 @@ static int nvme_probe(struct udevice *udev)
}
ndev->prp_entry_num = MAX_PRP_POOL >> 3;
cap = nvme_readq(&ndev->bar->cap);
ndev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
ndev->db_stride = 1 << NVME_CAP_STRIDE(cap);
ndev->cap = nvme_readq(&ndev->bar->cap);
ndev->q_depth = min_t(int, NVME_CAP_MQES(ndev->cap) + 1, NVME_Q_DEPTH);
ndev->db_stride = 1 << NVME_CAP_STRIDE(ndev->cap);
ndev->dbs = ((void __iomem *)ndev->bar) + 4096;
ret = nvme_configure_admin_queue(ndev);

1
drivers/nvme/nvme.h
View File

@ -621,6 +621,7 @@ struct nvme_dev {
char model[40];
char firmware_rev[8];
u32 max_transfer_shift;
u64 cap;
u32 stripe_size;
u32 page_size;
u8 vwc;