ENGR00315894-76 mx6 clock: Add vadc clock enable function

Add vadc clock enable function.

Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 721c7a1448c5b7265b597b83d18f8338a27ea213)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 903a59ef941f39b6d7f693dd7c60528e166de079)
(cherry picked from commit dc767fb7d5c155f2a6ef01c4dee808b9c1944fc2)
(cherry picked from commit 0a48932f375a969e6f7e72d171522146981b2135)
This commit is contained in:
Ye.Li 2014-06-12 19:33:05 +08:00 committed by Ye Li
parent d855bc0b78
commit b6f962db57
2 changed files with 13 additions and 0 deletions

View File

@ -82,5 +82,6 @@ void enable_epdc_clock(void);
void mxs_set_lcdclk(u32 base_addr, u32 freq);
void select_ldb_di_clock_source(enum ldb_di_clock clk);
void enable_eim_clk(unsigned char enable);
void mxs_set_vadcclk(void);
int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
#endif /* __ASM_ARCH_CLOCK_H */

View File

@ -975,6 +975,18 @@ void enable_qspi_clk(int qspi_num)
}
#endif
#if defined(CONFIG_VIDEO_GIS)
void mxs_set_vadcclk()
{
u32 reg = 0;
reg = readl(&imx_ccm->cscmr2);
reg &= ~MXC_CCM_CSCMR2_VID_CLK_SEL_MASK;
reg |= 0x19 << MXC_CCM_CSCMR2_VID_CLK_SEL_OFFSET;
writel(reg, &imx_ccm->cscmr2);
}
#endif
#ifdef CONFIG_FEC_MXC
int enable_fec_anatop_clock(int fec_id, enum enet_freq freq)
{