CHG: [watchdog] enable watchdog already in SPL for PPC platform

BugzID: 43749

SVN commit 22289@trunk

board/netmodule/nbhw08/nbhw08.c

@@ -973,6 +973,8 @@ int misc_init_r(void)
 {
   int freset = 0;
 
+  WATCHDOG_RESET();
+
   /* Configure local bus */
   configureLocalBus();
 
@@ -1004,6 +1006,8 @@ int misc_init_r(void)
     printf("Factory reset complete.\n");
   }
 
+  WATCHDOG_RESET();
+
   return 0;
 }
 

board/netmodule/nbhw09/nbhw09.c

@@ -874,6 +874,8 @@ int misc_init_r(void)
 {
 	int freset = 0;
 
+	WATCHDOG_RESET();
+
 	/* Configure local bus */
 	configureLocalBus();
 
@@ -903,6 +905,8 @@ int misc_init_r(void)
 		printf("Factory reset complete.\n");
 	}
 
+	WATCHDOG_RESET();
+
 	return 0;
 }
 

board/netmodule/nbhw12/nbhw12.c

@@ -1115,6 +1115,8 @@ int misc_init_r(void)
 {
 	int freset = 0;
 
+	WATCHDOG_RESET();
+
 	/* Configure local bus */
 	configureLocalBus();
 
@@ -1146,6 +1148,8 @@ int misc_init_r(void)
 		printf("Factory reset complete.\n");
 	}
 
+	WATCHDOG_RESET();
+
 	return 0;
 }
 

include/configs/NBHW08.h

@@ -50,6 +50,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <version.h>
+
 /*
  * High Level Configuration Options
  */
@@ -84,6 +86,12 @@
   HRCWL_CSB_TO_CLKIN_4X1 |\
   HRCWL_CORE_TO_CSB_3X1)
 
+#if U_BOOT_USER_BUILD == 1
+#define WATCHDOG_CONFIG HRCWH_SW_WATCHDOG_DISABLE
+#else
+#define WATCHDOG_CONFIG HRCWH_SW_WATCHDOG_ENABLE
+#endif
+
 #ifdef CONFIG_NAND_SPL
 
 #define CONFIG_SYS_HRCW_HIGH (\
@@ -92,7 +100,7 @@
   HRCWH_CORE_ENABLE |\
   HRCWH_FROM_0XFFF00100 |\
   HRCWH_BOOTSEQ_DISABLE |\
-  HRCWH_SW_WATCHDOG_DISABLE |\
+  WATCHDOG_CONFIG |\
   HRCWH_ROM_LOC_NAND_LP_8BIT |\
   HRCWH_RL_EXT_NAND |\
   HRCWH_TSEC1M_IN_RGMII |\
@@ -108,7 +116,7 @@
   HRCWH_CORE_ENABLE |\
   HRCWH_FROM_0XFFF00100 |\
   HRCWH_BOOTSEQ_DISABLE |\
-  HRCWH_SW_WATCHDOG_DISABLE |\
+  WATCHDOG_CONFIG |\
   HRCWH_ROM_LOC_LOCAL_16BIT |\
   HRCWH_RL_EXT_LEGACY |\
   HRCWH_TSEC1M_IN_RGMII |\
@@ -649,7 +657,12 @@
 
 #define CONFIG_CMDLINE_EDITING	1	/* add command line history */
 
+#if U_BOOT_USER_BUILD == 1
 #undef CONFIG_WATCHDOG        /* watchdog disabled */
+#else
+#define CONFIG_WATCHDOG        /* watchdog enabled */
+#define CONFIG_SYS_WATCHDOG_VALUE 0xffff
+#endif
 
 /*
  * Miscellaneous configurable options

include/configs/NBHW09.h

@@ -49,6 +49,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <version.h>
+
 /*
  * High Level Configuration Options
  */
@@ -83,6 +85,12 @@
   HRCWL_CSB_TO_CLKIN_4X1 |\
   HRCWL_CORE_TO_CSB_2X1)
 
+#if U_BOOT_USER_BUILD == 1
+#define WATCHDOG_CONFIG HRCWH_SW_WATCHDOG_DISABLE
+#else
+#define WATCHDOG_CONFIG HRCWH_SW_WATCHDOG_ENABLE
+#endif
+
 #ifdef CONFIG_NAND_SPL
 
 #define CONFIG_SYS_HRCW_HIGH (\
@@ -91,7 +99,7 @@
   HRCWH_CORE_ENABLE |\
   HRCWH_FROM_0XFFF00100 |\
   HRCWH_BOOTSEQ_DISABLE |\
-  HRCWH_SW_WATCHDOG_DISABLE |\
+  WATCHDOG_CONFIG |\
   HRCWH_ROM_LOC_NAND_LP_8BIT |\
   HRCWH_RL_EXT_NAND |\
   HRCWH_TSEC1M_IN_MII |\
@@ -107,7 +115,7 @@
   HRCWH_CORE_ENABLE |\
   HRCWH_FROM_0XFFF00100 |\
   HRCWH_BOOTSEQ_DISABLE |\
-  HRCWH_SW_WATCHDOG_DISABLE |\
+  WATCHDOG_CONFIG |\
   HRCWH_ROM_LOC_LOCAL_16BIT |\
   HRCWH_RL_EXT_LEGACY |\
   HRCWH_TSEC1M_IN_MII |\
@@ -660,7 +668,12 @@
 
 #define CONFIG_CMDLINE_EDITING	1	/* add command line history */
 
+#if U_BOOT_USER_BUILD == 1
 #undef CONFIG_WATCHDOG        /* watchdog disabled */
+#else
+#define CONFIG_WATCHDOG        /* watchdog enabled */
+#define CONFIG_SYS_WATCHDOG_VALUE 0xffff
+#endif
 
 /*
  * Miscellaneous configurable options

include/configs/NBHW12.h

@@ -49,6 +49,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <version.h>
+
 /*
  * High Level Configuration Options
  */
@@ -83,6 +85,12 @@
   HRCWL_CSB_TO_CLKIN_4X1 |\
   HRCWL_CORE_TO_CSB_2X1)
 
+#if U_BOOT_USER_BUILD == 1
+#define WATCHDOG_CONFIG HRCWH_SW_WATCHDOG_DISABLE
+#else
+#define WATCHDOG_CONFIG HRCWH_SW_WATCHDOG_ENABLE
+#endif
+
 #ifdef CONFIG_NAND_SPL
 
 #define CONFIG_SYS_HRCW_HIGH (\
@@ -91,7 +99,7 @@
   HRCWH_CORE_ENABLE |\
   HRCWH_FROM_0XFFF00100 |\
   HRCWH_BOOTSEQ_DISABLE |\
-  HRCWH_SW_WATCHDOG_DISABLE |\
+  WATCHDOG_CONFIG |\
   HRCWH_ROM_LOC_NAND_LP_8BIT |\
   HRCWH_RL_EXT_NAND |\
   HRCWH_TSEC1M_IN_MII |\
@@ -107,7 +115,7 @@
   HRCWH_CORE_ENABLE |\
   HRCWH_FROM_0XFFF00100 |\
   HRCWH_BOOTSEQ_DISABLE |\
-  HRCWH_SW_WATCHDOG_DISABLE |\
+  WATCHDOG_CONFIG |\
   HRCWH_ROM_LOC_LOCAL_16BIT |\
   HRCWH_RL_EXT_LEGACY |\
   HRCWH_TSEC1M_IN_MII |\
@@ -681,7 +689,12 @@
 
 #define CONFIG_CMDLINE_EDITING	1	/* add command line history */
 
+#if U_BOOT_USER_BUILD == 1
 #undef CONFIG_WATCHDOG        /* watchdog disabled */
+#else
+#define CONFIG_WATCHDOG        /* watchdog enabled */
+#define CONFIG_SYS_WATCHDOG_VALUE 0xffff
+#endif
 
 /*
  * Miscellaneous configurable options

lib_ppc/cache.c

@@ -36,7 +36,6 @@ void flush_cache(ulong start_addr, ulong size)
 	for (addr = start; (addr <= end) && (addr >= start);
 			addr += CONFIG_SYS_CACHELINE_SIZE) {
 		asm volatile("dcbst 0,%0" : : "r" (addr) : "memory");
-		WATCHDOG_RESET();
 	}
 	/* wait for all dcbst to complete on bus */
 	asm volatile("sync" : : : "memory");
@@ -44,7 +43,6 @@ void flush_cache(ulong start_addr, ulong size)
 	for (addr = start; (addr <= end) && (addr >= start);
 			addr += CONFIG_SYS_CACHELINE_SIZE) {
 		asm volatile("icbi 0,%0" : : "r" (addr) : "memory");
-		WATCHDOG_RESET();
 	}
 	asm volatile("sync" : : : "memory");
 	/* flush prefetch queue */

lib_ppc/ticks.S

@@ -55,7 +55,6 @@ wait_ticks:
 	addc    r7, r4, r7	/* Compute end time lower */
 	addze	r6, r3		/*     and end time upper */
 
-	WATCHDOG_RESET		/* Trigger watchdog, if needed */
 1:	bl	get_ticks	/* Get current time */
 	subfc	r4, r4, r7	/* Subtract current time from end time */
 	subfe.	r3, r3, r6