net: phy: mv88e61xx: Finish migration of MV88E61XX_FIXED_PORTS

Set the default for MV88E61XX_FIXED_PORTS to 0x0 in Kconfig, and move
the comment from code to the help to explain what this does.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
This commit is contained in:
Tom Rini 2023-01-10 11:19:40 -05:00
parent 80c75ce00d
commit bd22bde92e
2 changed files with 4 additions and 8 deletions

View File

@ -62,6 +62,10 @@ config MV88E61XX_PHY_PORTS
config MV88E61XX_FIXED_PORTS config MV88E61XX_FIXED_PORTS
hex "Bitmask of PHYless serdes Ports" hex "Bitmask of PHYless serdes Ports"
default 0x0
help
These are ports without PHYs that may be wired directly to other
serdes interfaces
endif # MV88E61XX_SWITCH endif # MV88E61XX_SWITCH

View File

@ -167,14 +167,6 @@
#error Define CONFIG_MV88E61XX_CPU_PORT to the port the CPU is attached to #error Define CONFIG_MV88E61XX_CPU_PORT to the port the CPU is attached to
#endif #endif
/*
* These are ports without PHYs that may be wired directly
* to other serdes interfaces
*/
#ifndef CONFIG_MV88E61XX_FIXED_PORTS
#define CONFIG_MV88E61XX_FIXED_PORTS 0
#endif
/* ID register values for different switch models */ /* ID register values for different switch models */
#define PORT_SWITCH_ID_6020 0x0200 #define PORT_SWITCH_ID_6020 0x0200
#define PORT_SWITCH_ID_6070 0x0700 #define PORT_SWITCH_ID_6070 0x0700