OMAP3: Remove legacy mmc driver
Now that all platforms have been migrated to the new MMC driver, remove the old one. Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This commit is contained in:
Tom Rini
Albert ARIBAUD
parent
f408501d2d
commit
c318dbf079
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@ -35,7 +35,6 @@ COBJS-$(CONFIG_MMC_SPI) += mmc_spi.o
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COBJS-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
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COBJS-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
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COBJS-$(CONFIG_MV_SDHCI) += mv_sdhci.o
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COBJS-$(CONFIG_MV_SDHCI) += mv_sdhci.o
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COBJS-$(CONFIG_MXC_MMC) += mxcmmc.o
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COBJS-$(CONFIG_MXC_MMC) += mxcmmc.o
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COBJS-$(CONFIG_OMAP3_MMC) += omap3_mmc.o
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COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
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COBJS-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
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COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o
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COBJS-$(CONFIG_PXA_MMC) += pxa_mmc.o
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COBJS-$(CONFIG_S5P_MMC) += s5p_mmc.o
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COBJS-$(CONFIG_S5P_MMC) += s5p_mmc.o
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@ -1,570 +0,0 @@
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/*
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* (C) Copyright 2008
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* Texas Instruments, <www.ti.com>
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* Syed Mohammed Khasim <khasim@ti.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation's version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <common.h>
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#include <fat.h>
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#include <mmc.h>
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#include <part.h>
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#include <i2c.h>
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#include <twl4030.h>
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#include <asm/io.h>
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#include "omap3_mmc.h"
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static const unsigned short mmc_transspeed_val[15][4] = {
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{CLKD(10, 1), CLKD(10, 10), CLKD(10, 100), CLKD(10, 1000)},
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{CLKD(12, 1), CLKD(12, 10), CLKD(12, 100), CLKD(12, 1000)},
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{CLKD(13, 1), CLKD(13, 10), CLKD(13, 100), CLKD(13, 1000)},
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{CLKD(15, 1), CLKD(15, 10), CLKD(15, 100), CLKD(15, 1000)},
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{CLKD(20, 1), CLKD(20, 10), CLKD(20, 100), CLKD(20, 1000)},
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{CLKD(26, 1), CLKD(26, 10), CLKD(26, 100), CLKD(26, 1000)},
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{CLKD(30, 1), CLKD(30, 10), CLKD(30, 100), CLKD(30, 1000)},
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{CLKD(35, 1), CLKD(35, 10), CLKD(35, 100), CLKD(35, 1000)},
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{CLKD(40, 1), CLKD(40, 10), CLKD(40, 100), CLKD(40, 1000)},
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{CLKD(45, 1), CLKD(45, 10), CLKD(45, 100), CLKD(45, 1000)},
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{CLKD(52, 1), CLKD(52, 10), CLKD(52, 100), CLKD(52, 1000)},
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{CLKD(55, 1), CLKD(55, 10), CLKD(55, 100), CLKD(55, 1000)},
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{CLKD(60, 1), CLKD(60, 10), CLKD(60, 100), CLKD(60, 1000)},
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{CLKD(70, 1), CLKD(70, 10), CLKD(70, 100), CLKD(70, 1000)},
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{CLKD(80, 1), CLKD(80, 10), CLKD(80, 100), CLKD(80, 1000)}
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};
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static mmc_card_data cur_card_data;
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static block_dev_desc_t mmc_blk_dev;
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static hsmmc_t *mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE;
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int mmc_set_dev(int dev_num)
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{
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switch (dev_num) {
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case 1:
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mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE;
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break;
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case 2:
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mmc_base = (hsmmc_t *)OMAP_HSMMC2_BASE;
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break;
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case 3:
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mmc_base = (hsmmc_t *)OMAP_HSMMC3_BASE;
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break;
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default:
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mmc_base = (hsmmc_t *)OMAP_HSMMC1_BASE;
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return 1;
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}
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return 0;
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}
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block_dev_desc_t *mmc_get_dev(int dev)
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{
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return (block_dev_desc_t *) &mmc_blk_dev;
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}
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static unsigned char mmc_board_init(void)
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{
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#if defined(CONFIG_TWL4030_POWER)
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twl4030_power_mmc_init();
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#endif
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#if defined(CONFIG_OMAP34XX)
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t2_t *t2_base = (t2_t *)T2_BASE;
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struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
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writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 |
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PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0,
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&t2_base->pbias_lite);
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writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL,
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&t2_base->devconf0);
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writel(readl(&t2_base->devconf1) | MMCSDIO2ADPCLKISEL,
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&t2_base->devconf1);
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writel(readl(&prcm_base->fclken1_core) |
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EN_MMC1 | EN_MMC2 | EN_MMC3,
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&prcm_base->fclken1_core);
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writel(readl(&prcm_base->iclken1_core) |
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EN_MMC1 | EN_MMC2 | EN_MMC3,
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&prcm_base->iclken1_core);
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#endif
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/* TODO add appropriate OMAP4 init */
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return 1;
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}
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static void mmc_init_stream(void)
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{
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writel(readl(&mmc_base->con) | INIT_INITSTREAM, &mmc_base->con);
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writel(MMC_CMD0, &mmc_base->cmd);
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while (!(readl(&mmc_base->stat) & CC_MASK));
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writel(CC_MASK, &mmc_base->stat);
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writel(MMC_CMD0, &mmc_base->cmd);
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while (!(readl(&mmc_base->stat) & CC_MASK));
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writel(readl(&mmc_base->con) & ~INIT_INITSTREAM, &mmc_base->con);
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}
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static unsigned char mmc_clock_config(unsigned int iclk, unsigned short clk_div)
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{
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unsigned int val;
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mmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK),
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(ICE_STOP | DTO_15THDTO | CEN_DISABLE));
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switch (iclk) {
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case CLK_INITSEQ:
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val = MMC_INIT_SEQ_CLK / 2;
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break;
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case CLK_400KHZ:
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val = MMC_400kHz_CLK;
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break;
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case CLK_MISC:
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val = clk_div;
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break;
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default:
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return 0;
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}
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mmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK,
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(val << CLKD_OFFSET) | ICE_OSCILLATE);
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while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY);
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writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl);
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return 1;
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}
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static unsigned char mmc_init_setup(void)
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{
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unsigned int reg_val;
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mmc_board_init();
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writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET,
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&mmc_base->sysconfig);
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while ((readl(&mmc_base->sysstatus) & RESETDONE) == 0);
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writel(readl(&mmc_base->sysctl) | SOFTRESETALL, &mmc_base->sysctl);
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while ((readl(&mmc_base->sysctl) & SOFTRESETALL) != 0x0);
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writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl);
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writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP,
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&mmc_base->capa);
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reg_val = readl(&mmc_base->con) & RESERVED_MASK;
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writel(CTPL_MMC_SD | reg_val | WPP_ACTIVEHIGH | CDP_ACTIVEHIGH |
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MIT_CTO | DW8_1_4BITMODE | MODE_FUNC | STR_BLOCK |
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HR_NOHOSTRESP | INIT_NOINIT | NOOPENDRAIN, &mmc_base->con);
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mmc_clock_config(CLK_INITSEQ, 0);
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writel(readl(&mmc_base->hctl) | SDBP_PWRON, &mmc_base->hctl);
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writel(IE_BADA | IE_CERR | IE_DEB | IE_DCRC | IE_DTO | IE_CIE |
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IE_CEB | IE_CCRC | IE_CTO | IE_BRR | IE_BWR | IE_TC | IE_CC,
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&mmc_base->ie);
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mmc_init_stream();
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return 1;
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}
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static unsigned char mmc_send_cmd(unsigned int cmd, unsigned int arg,
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unsigned int *response)
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{
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unsigned int mmc_stat;
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while ((readl(&mmc_base->pstate) & DATI_MASK) == DATI_CMDDIS);
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writel(BLEN_512BYTESLEN | NBLK_STPCNT, &mmc_base->blk);
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writel(0xFFFFFFFF, &mmc_base->stat);
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writel(arg, &mmc_base->arg);
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writel(cmd | CMD_TYPE_NORMAL | CICE_NOCHECK | CCCE_NOCHECK |
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MSBS_SGLEBLK | ACEN_DISABLE | BCE_DISABLE | DE_DISABLE,
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&mmc_base->cmd);
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while (1) {
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do {
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mmc_stat = readl(&mmc_base->stat);
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} while (mmc_stat == 0);
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if ((mmc_stat & ERRI_MASK) != 0)
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return (unsigned char) mmc_stat;
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if (mmc_stat & CC_MASK) {
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writel(CC_MASK, &mmc_base->stat);
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response[0] = readl(&mmc_base->rsp10);
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if ((cmd & RSP_TYPE_MASK) == RSP_TYPE_LGHT136) {
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response[1] = readl(&mmc_base->rsp32);
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response[2] = readl(&mmc_base->rsp54);
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response[3] = readl(&mmc_base->rsp76);
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}
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break;
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}
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}
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return 1;
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}
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static unsigned char mmc_read_data(unsigned int *output_buf)
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{
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unsigned int mmc_stat;
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unsigned int read_count = 0;
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/*
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* Start Polled Read
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*/
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while (1) {
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do {
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mmc_stat = readl(&mmc_base->stat);
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} while (mmc_stat == 0);
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if ((mmc_stat & ERRI_MASK) != 0)
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return (unsigned char) mmc_stat;
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if (mmc_stat & BRR_MASK) {
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unsigned int k;
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writel(readl(&mmc_base->stat) | BRR_MASK,
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&mmc_base->stat);
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for (k = 0; k < MMCSD_SECTOR_SIZE / 4; k++) {
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*output_buf = readl(&mmc_base->data);
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output_buf++;
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read_count += 4;
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}
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}
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if (mmc_stat & BWR_MASK)
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writel(readl(&mmc_base->stat) | BWR_MASK,
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&mmc_base->stat);
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if (mmc_stat & TC_MASK) {
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writel(readl(&mmc_base->stat) | TC_MASK,
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&mmc_base->stat);
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break;
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}
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}
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return 1;
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}
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static unsigned char mmc_detect_card(mmc_card_data *mmc_card_cur)
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{
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unsigned char err;
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unsigned int argument = 0;
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unsigned int ocr_value, ocr_recvd, ret_cmd41, hcs_val;
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unsigned short retry_cnt = 2000;
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mmc_resp_t mmc_resp;
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/* Set to Initialization Clock */
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err = mmc_clock_config(CLK_400KHZ, 0);
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if (err != 1)
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return err;
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mmc_card_cur->RCA = MMC_RELATIVE_CARD_ADDRESS;
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argument = 0x00000000;
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ocr_value = (0x1FF << 15);
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err = mmc_send_cmd(MMC_CMD0, argument, mmc_resp.resp);
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if (err != 1)
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return err;
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argument = SD_CMD8_CHECK_PATTERN | SD_CMD8_2_7_3_6_V_RANGE;
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err = mmc_send_cmd(MMC_SDCMD8, argument, mmc_resp.resp);
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hcs_val = (err == 1) ?
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MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR :
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MMC_OCR_REG_HOST_CAPACITY_SUPPORT_BYTE;
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argument = 0x0000 << 16;
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err = mmc_send_cmd(MMC_CMD55, argument, mmc_resp.resp);
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if (err == 1) {
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mmc_card_cur->card_type = SD_CARD;
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ocr_value |= hcs_val;
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ret_cmd41 = MMC_ACMD41;
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} else {
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mmc_card_cur->card_type = MMC_CARD;
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ocr_value |= MMC_OCR_REG_ACCESS_MODE_SECTOR;
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ret_cmd41 = MMC_CMD1;
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writel(readl(&mmc_base->con) & ~OD, &mmc_base->con);
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writel(readl(&mmc_base->con) | OPENDRAIN, &mmc_base->con);
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}
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argument = ocr_value;
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err = mmc_send_cmd(ret_cmd41, argument, mmc_resp.resp);
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if (err != 1)
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return err;
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ocr_recvd = mmc_resp.r3.ocr;
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while (!(ocr_recvd & (0x1 << 31)) && (retry_cnt > 0)) {
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retry_cnt--;
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if (mmc_card_cur->card_type == SD_CARD) {
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argument = 0x0000 << 16;
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err = mmc_send_cmd(MMC_CMD55, argument, mmc_resp.resp);
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}
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argument = ocr_value;
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err = mmc_send_cmd(ret_cmd41, argument, mmc_resp.resp);
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if (err != 1)
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return err;
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ocr_recvd = mmc_resp.r3.ocr;
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}
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if (!(ocr_recvd & (0x1 << 31)))
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return 0;
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|
||||||
if (mmc_card_cur->card_type == MMC_CARD) {
|
|
||||||
if ((ocr_recvd & MMC_OCR_REG_ACCESS_MODE_MASK) ==
|
|
||||||
MMC_OCR_REG_ACCESS_MODE_SECTOR) {
|
|
||||||
mmc_card_cur->mode = SECTOR_MODE;
|
|
||||||
} else {
|
|
||||||
mmc_card_cur->mode = BYTE_MODE;
|
|
||||||
}
|
|
||||||
|
|
||||||
ocr_recvd &= ~MMC_OCR_REG_ACCESS_MODE_MASK;
|
|
||||||
} else {
|
|
||||||
if ((ocr_recvd & MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK)
|
|
||||||
== MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR) {
|
|
||||||
mmc_card_cur->mode = SECTOR_MODE;
|
|
||||||
} else {
|
|
||||||
mmc_card_cur->mode = BYTE_MODE;
|
|
||||||
}
|
|
||||||
ocr_recvd &= ~MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK;
|
|
||||||
}
|
|
||||||
|
|
||||||
ocr_recvd &= ~(0x1 << 31);
|
|
||||||
if (!(ocr_recvd & ocr_value))
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
err = mmc_send_cmd(MMC_CMD2, argument, mmc_resp.resp);
|
|
||||||
if (err != 1)
|
|
||||||
return err;
|
|
||||||
|
|
||||||
if (mmc_card_cur->card_type == MMC_CARD) {
|
|
||||||
argument = mmc_card_cur->RCA << 16;
|
|
||||||
err = mmc_send_cmd(MMC_CMD3, argument, mmc_resp.resp);
|
|
||||||
if (err != 1)
|
|
||||||
return err;
|
|
||||||
} else {
|
|
||||||
argument = 0x00000000;
|
|
||||||
err = mmc_send_cmd(MMC_SDCMD3, argument, mmc_resp.resp);
|
|
||||||
if (err != 1)
|
|
||||||
return err;
|
|
||||||
|
|
||||||
mmc_card_cur->RCA = mmc_resp.r6.newpublishedrca;
|
|
||||||
}
|
|
||||||
|
|
||||||
writel(readl(&mmc_base->con) & ~OD, &mmc_base->con);
|
|
||||||
writel(readl(&mmc_base->con) | NOOPENDRAIN, &mmc_base->con);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
static unsigned char mmc_read_cardsize(mmc_card_data *mmc_dev_data,
|
|
||||||
mmc_csd_reg_t *cur_csd)
|
|
||||||
{
|
|
||||||
mmc_extended_csd_reg_t ext_csd;
|
|
||||||
unsigned int size, count, blk_len, blk_no, card_size, argument;
|
|
||||||
unsigned char err;
|
|
||||||
unsigned int resp[4];
|
|
||||||
|
|
||||||
if (mmc_dev_data->mode == SECTOR_MODE) {
|
|
||||||
if (mmc_dev_data->card_type == SD_CARD) {
|
|
||||||
card_size =
|
|
||||||
(((mmc_sd2_csd_reg_t *) cur_csd)->
|
|
||||||
c_size_lsb & MMC_SD2_CSD_C_SIZE_LSB_MASK) |
|
|
||||||
((((mmc_sd2_csd_reg_t *) cur_csd)->
|
|
||||||
c_size_msb & MMC_SD2_CSD_C_SIZE_MSB_MASK)
|
|
||||||
<< MMC_SD2_CSD_C_SIZE_MSB_OFFSET);
|
|
||||||
mmc_dev_data->size = card_size * 1024;
|
|
||||||
if (mmc_dev_data->size == 0)
|
|
||||||
return 0;
|
|
||||||
} else {
|
|
||||||
argument = 0x00000000;
|
|
||||||
err = mmc_send_cmd(MMC_CMD8, argument, resp);
|
|
||||||
if (err != 1)
|
|
||||||
return err;
|
|
||||||
err = mmc_read_data((unsigned int *) &ext_csd);
|
|
||||||
if (err != 1)
|
|
||||||
return err;
|
|
||||||
mmc_dev_data->size = ext_csd.sectorcount;
|
|
||||||
|
|
||||||
if (mmc_dev_data->size == 0)
|
|
||||||
mmc_dev_data->size = 8388608;
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
if (cur_csd->c_size_mult >= 8)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
if (cur_csd->read_bl_len >= 12)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
/* Compute size */
|
|
||||||
count = 1 << (cur_csd->c_size_mult + 2);
|
|
||||||
card_size = (cur_csd->c_size_lsb & MMC_CSD_C_SIZE_LSB_MASK) |
|
|
||||||
((cur_csd->c_size_msb & MMC_CSD_C_SIZE_MSB_MASK)
|
|
||||||
<< MMC_CSD_C_SIZE_MSB_OFFSET);
|
|
||||||
blk_no = (card_size + 1) * count;
|
|
||||||
blk_len = 1 << cur_csd->read_bl_len;
|
|
||||||
size = blk_no * blk_len;
|
|
||||||
mmc_dev_data->size = size / MMCSD_SECTOR_SIZE;
|
|
||||||
if (mmc_dev_data->size == 0)
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
static unsigned long mmc_bread(int dev_num, unsigned long blknr,
|
|
||||||
lbaint_t blkcnt, void *dst)
|
|
||||||
{
|
|
||||||
unsigned char err;
|
|
||||||
unsigned int argument;
|
|
||||||
unsigned int resp[4];
|
|
||||||
unsigned int *output_buf = dst;
|
|
||||||
unsigned int sec_inc_val;
|
|
||||||
lbaint_t i;
|
|
||||||
|
|
||||||
if (blkcnt == 0)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
if (cur_card_data.mode == SECTOR_MODE) {
|
|
||||||
argument = blknr;
|
|
||||||
sec_inc_val = 1;
|
|
||||||
} else {
|
|
||||||
argument = blknr * MMCSD_SECTOR_SIZE;
|
|
||||||
sec_inc_val = MMCSD_SECTOR_SIZE;
|
|
||||||
}
|
|
||||||
|
|
||||||
for (i = 0; i < blkcnt; i++) {
|
|
||||||
err = mmc_send_cmd(MMC_CMD17, argument, resp);
|
|
||||||
if (err != 1) {
|
|
||||||
printf("mmc: CMD17 failed, status = %08x\n", err);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
err = mmc_read_data(output_buf);
|
|
||||||
if (err != 1) {
|
|
||||||
printf("mmc: read failed, status = %08x\n", err);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
output_buf += (MMCSD_SECTOR_SIZE / 4);
|
|
||||||
argument += sec_inc_val;
|
|
||||||
}
|
|
||||||
|
|
||||||
return i;
|
|
||||||
}
|
|
||||||
|
|
||||||
static unsigned char configure_mmc(mmc_card_data *mmc_card_cur)
|
|
||||||
{
|
|
||||||
unsigned char ret_val;
|
|
||||||
unsigned int argument;
|
|
||||||
unsigned int trans_clk, trans_fact, trans_unit, retries = 2;
|
|
||||||
unsigned char trans_speed;
|
|
||||||
mmc_resp_t mmc_resp;
|
|
||||||
|
|
||||||
ret_val = mmc_init_setup();
|
|
||||||
|
|
||||||
if (ret_val != 1)
|
|
||||||
return ret_val;
|
|
||||||
|
|
||||||
do {
|
|
||||||
ret_val = mmc_detect_card(mmc_card_cur);
|
|
||||||
retries--;
|
|
||||||
} while ((retries > 0) && (ret_val != 1));
|
|
||||||
|
|
||||||
argument = mmc_card_cur->RCA << 16;
|
|
||||||
ret_val = mmc_send_cmd(MMC_CMD9, argument, mmc_resp.resp);
|
|
||||||
if (ret_val != 1)
|
|
||||||
return ret_val;
|
|
||||||
|
|
||||||
if (mmc_card_cur->card_type == MMC_CARD)
|
|
||||||
mmc_card_cur->version = mmc_resp.Card_CSD.spec_vers;
|
|
||||||
|
|
||||||
trans_speed = mmc_resp.Card_CSD.tran_speed;
|
|
||||||
|
|
||||||
ret_val = mmc_send_cmd(MMC_CMD4, MMC_DSR_DEFAULT << 16, mmc_resp.resp);
|
|
||||||
if (ret_val != 1)
|
|
||||||
return ret_val;
|
|
||||||
|
|
||||||
trans_unit = trans_speed & MMC_CSD_TRAN_SPEED_UNIT_MASK;
|
|
||||||
trans_fact = trans_speed & MMC_CSD_TRAN_SPEED_FACTOR_MASK;
|
|
||||||
|
|
||||||
if (trans_unit > MMC_CSD_TRAN_SPEED_UNIT_100MHZ)
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
if ((trans_fact < MMC_CSD_TRAN_SPEED_FACTOR_1_0) ||
|
|
||||||
(trans_fact > MMC_CSD_TRAN_SPEED_FACTOR_8_0))
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
trans_unit >>= 0;
|
|
||||||
trans_fact >>= 3;
|
|
||||||
|
|
||||||
trans_clk = mmc_transspeed_val[trans_fact - 1][trans_unit] * 2;
|
|
||||||
ret_val = mmc_clock_config(CLK_MISC, trans_clk);
|
|
||||||
|
|
||||||
if (ret_val != 1)
|
|
||||||
return ret_val;
|
|
||||||
|
|
||||||
argument = mmc_card_cur->RCA << 16;
|
|
||||||
ret_val = mmc_send_cmd(MMC_CMD7_SELECT, argument, mmc_resp.resp);
|
|
||||||
if (ret_val != 1)
|
|
||||||
return ret_val;
|
|
||||||
|
|
||||||
/* Configure the block length to 512 bytes */
|
|
||||||
argument = MMCSD_SECTOR_SIZE;
|
|
||||||
ret_val = mmc_send_cmd(MMC_CMD16, argument, mmc_resp.resp);
|
|
||||||
if (ret_val != 1)
|
|
||||||
return ret_val;
|
|
||||||
|
|
||||||
/* get the card size in sectors */
|
|
||||||
ret_val = mmc_read_cardsize(mmc_card_cur, &mmc_resp.Card_CSD);
|
|
||||||
if (ret_val != 1)
|
|
||||||
return ret_val;
|
|
||||||
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int mmc_legacy_init(int dev)
|
|
||||||
{
|
|
||||||
if (mmc_set_dev(dev) != 0)
|
|
||||||
return 1;
|
|
||||||
|
|
||||||
if (configure_mmc(&cur_card_data) != 1)
|
|
||||||
return 1;
|
|
||||||
|
|
||||||
mmc_blk_dev.if_type = IF_TYPE_MMC;
|
|
||||||
mmc_blk_dev.part_type = PART_TYPE_DOS;
|
|
||||||
mmc_blk_dev.dev = 0;
|
|
||||||
mmc_blk_dev.lun = 0;
|
|
||||||
mmc_blk_dev.type = 0;
|
|
||||||
|
|
||||||
/* FIXME fill in the correct size (is set to 32MByte) */
|
|
||||||
mmc_blk_dev.blksz = MMCSD_SECTOR_SIZE;
|
|
||||||
mmc_blk_dev.lba = 0x10000;
|
|
||||||
mmc_blk_dev.removable = 0;
|
|
||||||
mmc_blk_dev.block_read = mmc_bread;
|
|
||||||
|
|
||||||
fat_register_device(&mmc_blk_dev, 1);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
@ -1,233 +0,0 @@
|
||||||
/*
|
|
||||||
* (C) Copyright 2008
|
|
||||||
* Texas Instruments, <www.ti.com>
|
|
||||||
* Syed Mohammed Khasim <khasim@ti.com>
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
|
||||||
* project.
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation's version 2 of
|
|
||||||
* the License.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
||||||
* MA 02111-1307 USA
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef MMC_H
|
|
||||||
#define MMC_H
|
|
||||||
|
|
||||||
#include <asm/arch/mmc_host_def.h>
|
|
||||||
|
|
||||||
/* Responses */
|
|
||||||
#define RSP_TYPE_NONE (RSP_TYPE_NORSP | CCCE_NOCHECK | CICE_NOCHECK)
|
|
||||||
#define RSP_TYPE_R1 (RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK)
|
|
||||||
#define RSP_TYPE_R1B (RSP_TYPE_LGHT48B | CCCE_CHECK | CICE_CHECK)
|
|
||||||
#define RSP_TYPE_R2 (RSP_TYPE_LGHT136 | CCCE_CHECK | CICE_NOCHECK)
|
|
||||||
#define RSP_TYPE_R3 (RSP_TYPE_LGHT48 | CCCE_NOCHECK | CICE_NOCHECK)
|
|
||||||
#define RSP_TYPE_R4 (RSP_TYPE_LGHT48 | CCCE_NOCHECK | CICE_NOCHECK)
|
|
||||||
#define RSP_TYPE_R5 (RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK)
|
|
||||||
#define RSP_TYPE_R6 (RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK)
|
|
||||||
#define RSP_TYPE_R7 (RSP_TYPE_LGHT48 | CCCE_CHECK | CICE_CHECK)
|
|
||||||
|
|
||||||
/* All supported commands */
|
|
||||||
#define MMC_CMD0 (INDEX(0) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD1 (INDEX(1) | RSP_TYPE_R3 | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD2 (INDEX(2) | RSP_TYPE_R2 | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD3 (INDEX(3) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_SDCMD3 (INDEX(3) | RSP_TYPE_R6 | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD4 (INDEX(4) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD6 (INDEX(6) | RSP_TYPE_R1B | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD7_SELECT (INDEX(7) | RSP_TYPE_R1B | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD7_DESELECT (INDEX(7)| RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD8 (INDEX(8) | RSP_TYPE_R1 | DP_DATA | DDIR_READ)
|
|
||||||
#define MMC_SDCMD8 (INDEX(8) | RSP_TYPE_R7 | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD9 (INDEX(9) | RSP_TYPE_R2 | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD12 (INDEX(12) | RSP_TYPE_R1B | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD13 (INDEX(13) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD15 (INDEX(15) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD16 (INDEX(16) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_CMD17 (INDEX(17) | RSP_TYPE_R1 | DP_DATA | DDIR_READ)
|
|
||||||
#define MMC_CMD24 (INDEX(24) | RSP_TYPE_R1 | DP_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_ACMD6 (INDEX(6) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_ACMD41 (INDEX(41) | RSP_TYPE_R3 | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
#define MMC_ACMD51 (INDEX(51) | RSP_TYPE_R1 | DP_DATA | DDIR_READ)
|
|
||||||
#define MMC_CMD55 (INDEX(55) | RSP_TYPE_R1 | DP_NO_DATA | DDIR_WRITE)
|
|
||||||
|
|
||||||
#define MMC_AC_CMD_RCA_MASK (unsigned int)(0xFFFF << 16)
|
|
||||||
#define MMC_BC_CMD_DSR_MASK (unsigned int)(0xFFFF << 16)
|
|
||||||
#define MMC_DSR_DEFAULT 0x0404
|
|
||||||
#define SD_CMD8_CHECK_PATTERN 0xAA
|
|
||||||
#define SD_CMD8_2_7_3_6_V_RANGE (0x01 << 8)
|
|
||||||
|
|
||||||
/* Clock Configurations and Macros */
|
|
||||||
|
|
||||||
#define MMC_CLOCK_REFERENCE 96
|
|
||||||
#define MMC_RELATIVE_CARD_ADDRESS 0x1234
|
|
||||||
#define MMC_INIT_SEQ_CLK (MMC_CLOCK_REFERENCE * 1000 / 80)
|
|
||||||
#define MMC_400kHz_CLK (MMC_CLOCK_REFERENCE * 1000 / 400)
|
|
||||||
#define CLKDR(r, f, u) ((((r)*100) / ((f)*(u))) + 1)
|
|
||||||
#define CLKD(f, u) (CLKDR(MMC_CLOCK_REFERENCE, f, u))
|
|
||||||
|
|
||||||
#define MMC_OCR_REG_ACCESS_MODE_MASK (0x3 << 29)
|
|
||||||
#define MMC_OCR_REG_ACCESS_MODE_BYTE (0x0 << 29)
|
|
||||||
#define MMC_OCR_REG_ACCESS_MODE_SECTOR (0x2 << 29)
|
|
||||||
|
|
||||||
#define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_MASK (0x1 << 30)
|
|
||||||
#define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_BYTE (0x0 << 30)
|
|
||||||
#define MMC_OCR_REG_HOST_CAPACITY_SUPPORT_SECTOR (0x1 << 30)
|
|
||||||
|
|
||||||
#define MMC_SD2_CSD_C_SIZE_LSB_MASK 0xFFFF
|
|
||||||
#define MMC_SD2_CSD_C_SIZE_MSB_MASK 0x003F
|
|
||||||
#define MMC_SD2_CSD_C_SIZE_MSB_OFFSET 16
|
|
||||||
#define MMC_CSD_C_SIZE_LSB_MASK 0x0003
|
|
||||||
#define MMC_CSD_C_SIZE_MSB_MASK 0x03FF
|
|
||||||
#define MMC_CSD_C_SIZE_MSB_OFFSET 2
|
|
||||||
|
|
||||||
#define MMC_CSD_TRAN_SPEED_UNIT_MASK (0x07 << 0)
|
|
||||||
#define MMC_CSD_TRAN_SPEED_FACTOR_MASK (0x0F << 3)
|
|
||||||
#define MMC_CSD_TRAN_SPEED_UNIT_100MHZ (0x3 << 0)
|
|
||||||
#define MMC_CSD_TRAN_SPEED_FACTOR_1_0 (0x01 << 3)
|
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||||||
#define MMC_CSD_TRAN_SPEED_FACTOR_8_0 (0x0F << 3)
|
|
||||||
|
|
||||||
typedef struct {
|
|
||||||
unsigned not_used:1;
|
|
||||||
unsigned crc:7;
|
|
||||||
unsigned ecc:2;
|
|
||||||
unsigned file_format:2;
|
|
||||||
unsigned tmp_write_protect:1;
|
|
||||||
unsigned perm_write_protect:1;
|
|
||||||
unsigned copy:1;
|
|
||||||
unsigned file_format_grp:1;
|
|
||||||
unsigned content_prot_app:1;
|
|
||||||
unsigned reserved_1:4;
|
|
||||||
unsigned write_bl_partial:1;
|
|
||||||
unsigned write_bl_len:4;
|
|
||||||
unsigned r2w_factor:3;
|
|
||||||
unsigned default_ecc:2;
|
|
||||||
unsigned wp_grp_enable:1;
|
|
||||||
unsigned wp_grp_size:5;
|
|
||||||
unsigned erase_grp_mult:5;
|
|
||||||
unsigned erase_grp_size:5;
|
|
||||||
unsigned c_size_mult:3;
|
|
||||||
unsigned vdd_w_curr_max:3;
|
|
||||||
unsigned vdd_w_curr_min:3;
|
|
||||||
unsigned vdd_r_curr_max:3;
|
|
||||||
unsigned vdd_r_curr_min:3;
|
|
||||||
unsigned c_size_lsb:2;
|
|
||||||
unsigned c_size_msb:10;
|
|
||||||
unsigned reserved_2:2;
|
|
||||||
unsigned dsr_imp:1;
|
|
||||||
unsigned read_blk_misalign:1;
|
|
||||||
unsigned write_blk_misalign:1;
|
|
||||||
unsigned read_bl_partial:1;
|
|
||||||
unsigned read_bl_len:4;
|
|
||||||
unsigned ccc:12;
|
|
||||||
unsigned tran_speed:8;
|
|
||||||
unsigned nsac:8;
|
|
||||||
unsigned taac:8;
|
|
||||||
unsigned reserved_3:2;
|
|
||||||
unsigned spec_vers:4;
|
|
||||||
unsigned csd_structure:2;
|
|
||||||
} mmc_csd_reg_t;
|
|
||||||
|
|
||||||
/* csd for sd2.0 */
|
|
||||||
typedef struct {
|
|
||||||
unsigned not_used:1;
|
|
||||||
unsigned crc:7;
|
|
||||||
unsigned reserved_1:2;
|
|
||||||
unsigned file_format:2;
|
|
||||||
unsigned tmp_write_protect:1;
|
|
||||||
unsigned perm_write_protect:1;
|
|
||||||
unsigned copy:1;
|
|
||||||
unsigned file_format_grp:1;
|
|
||||||
unsigned reserved_2:5;
|
|
||||||
unsigned write_bl_partial:1;
|
|
||||||
unsigned write_bl_len:4;
|
|
||||||
unsigned r2w_factor:3;
|
|
||||||
unsigned reserved_3:2;
|
|
||||||
unsigned wp_grp_enable:1;
|
|
||||||
unsigned wp_grp_size:7;
|
|
||||||
unsigned sector_size:7;
|
|
||||||
unsigned erase_blk_len:1;
|
|
||||||
unsigned reserved_4:1;
|
|
||||||
unsigned c_size_lsb:16;
|
|
||||||
unsigned c_size_msb:6;
|
|
||||||
unsigned reserved_5:6;
|
|
||||||
unsigned dsr_imp:1;
|
|
||||||
unsigned read_blk_misalign:1;
|
|
||||||
unsigned write_blk_misalign:1;
|
|
||||||
unsigned read_bl_partial:1;
|
|
||||||
unsigned read_bl_len:4;
|
|
||||||
unsigned ccc:12;
|
|
||||||
unsigned tran_speed:8;
|
|
||||||
unsigned nsac:8;
|
|
||||||
unsigned taac:8;
|
|
||||||
unsigned reserved_6:6;
|
|
||||||
unsigned csd_structure:2;
|
|
||||||
} mmc_sd2_csd_reg_t;
|
|
||||||
|
|
||||||
/* extended csd - 512 bytes long */
|
|
||||||
typedef struct {
|
|
||||||
unsigned char reserved_1[181];
|
|
||||||
unsigned char erasedmemorycontent;
|
|
||||||
unsigned char reserved_2;
|
|
||||||
unsigned char buswidthmode;
|
|
||||||
unsigned char reserved_3;
|
|
||||||
unsigned char highspeedinterfacetiming;
|
|
||||||
unsigned char reserved_4;
|
|
||||||
unsigned char powerclass;
|
|
||||||
unsigned char reserved_5;
|
|
||||||
unsigned char commandsetrevision;
|
|
||||||
unsigned char reserved_6;
|
|
||||||
unsigned char commandset;
|
|
||||||
unsigned char extendedcsdrevision;
|
|
||||||
unsigned char reserved_7;
|
|
||||||
unsigned char csdstructureversion;
|
|
||||||
unsigned char reserved_8;
|
|
||||||
unsigned char cardtype;
|
|
||||||
unsigned char reserved_9[3];
|
|
||||||
unsigned char powerclass_52mhz_1_95v;
|
|
||||||
unsigned char powerclass_26mhz_1_95v;
|
|
||||||
unsigned char powerclass_52mhz_3_6v;
|
|
||||||
unsigned char powerclass_26mhz_3_6v;
|
|
||||||
unsigned char reserved_10;
|
|
||||||
unsigned char minreadperf_4b_26mhz;
|
|
||||||
unsigned char minwriteperf_4b_26mhz;
|
|
||||||
unsigned char minreadperf_8b_26mhz_4b_52mhz;
|
|
||||||
unsigned char minwriteperf_8b_26mhz_4b_52mhz;
|
|
||||||
unsigned char minreadperf_8b_52mhz;
|
|
||||||
unsigned char minwriteperf_8b_52mhz;
|
|
||||||
unsigned char reserved_11;
|
|
||||||
unsigned int sectorcount;
|
|
||||||
unsigned char reserved_12[288];
|
|
||||||
unsigned char supportedcommandsets;
|
|
||||||
unsigned char reserved_13[7];
|
|
||||||
} mmc_extended_csd_reg_t;
|
|
||||||
|
|
||||||
/* mmc sd responce */
|
|
||||||
typedef struct {
|
|
||||||
unsigned int ocr;
|
|
||||||
} mmc_resp_r3;
|
|
||||||
|
|
||||||
typedef struct {
|
|
||||||
unsigned short cardstatus;
|
|
||||||
unsigned short newpublishedrca;
|
|
||||||
} mmc_resp_r6;
|
|
||||||
|
|
||||||
typedef union {
|
|
||||||
unsigned int resp[4];
|
|
||||||
mmc_resp_r3 r3;
|
|
||||||
mmc_resp_r6 r6;
|
|
||||||
mmc_csd_reg_t Card_CSD;
|
|
||||||
} mmc_resp_t;
|
|
||||||
|
|
||||||
#endif /* MMC_H */
|
|
||||||
Loading…
Reference in New Issue