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armv7, beagle: add support for ELF relocations 

Signed-off-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Heiko Schocher 2010-10-11 14:08:15 +02:00 committed by Wolfgang Denk
parent 9710504d20
commit c3d3a5418d
3 changed files with 86 additions and 54 deletions
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131
arch/arm/cpu/armv7/start.S
View File

@ -78,13 +78,13 @@ _armboot_start:
/* /*
* These are defined in the board-specific linker script. * These are defined in the board-specific linker script.
*/ */
.globl _bss_start .globl _bss_start_ofs
_bss_start: _bss_start_ofs:
.word __bss_start .word __bss_start - _start
.globl _bss_end .globl _bss_end_ofs
_bss_end: _bss_end_ofs:
.word _end .word _end - _start
#ifdef CONFIG_USE_IRQ #ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */ /* IRQ stack memory (calculated at run-time) */
@ -104,29 +104,29 @@ FIQ_STACK_START:
IRQ_STACK_START_IN: IRQ_STACK_START_IN:
.word 0x0badc0de .word 0x0badc0de
.globl _datarel_start .globl _datarel_start_ofs
_datarel_start: _datarel_start_ofs:
.word __datarel_start .word __datarel_start - _start
.globl _datarelrolocal_start .globl _datarelrolocal_start_ofs
_datarelrolocal_start: _datarelrolocal_start_ofs:
.word __datarelrolocal_start .word __datarelrolocal_start - _start
.globl _datarellocal_start .globl _datarellocal_start_ofs
_datarellocal_start: _datarellocal_start_ofs:
.word __datarellocal_start .word __datarellocal_start - _start
.globl _datarelro_start .globl _datarelro_start_ofs
_datarelro_start: _datarelro_start_ofs:
.word __datarelro_start .word __datarelro_start - _start
.globl _got_start .globl _got_start_ofs
_got_start: _got_start_ofs:
.word __got_start .word __got_start - _start
.globl _got_end .globl _got_end_Ofs
_got_end: _got_end_ofs:
.word __got_end .word __got_end - _start
/* /*
* the actual reset code * the actual reset code
@ -198,9 +198,8 @@ stack_setup:
#ifndef CONFIG_SKIP_RELOCATE_UBOOT #ifndef CONFIG_SKIP_RELOCATE_UBOOT
adr r0, _start adr r0, _start
ldr r2, _TEXT_BASE ldr r2, _TEXT_BASE
ldr r3, _bss_start ldr r3, _bss_start_ofs
sub r2, r3, r2 /* r2 <- size of armboot */ add r2, r0, r3 /* r2 <- source end address */
add r2, r0, r2 /* r2 <- source end address */
cmp r0, r6 cmp r0, r6
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
beq jump_2_ram beq jump_2_ram
@ -213,33 +212,51 @@ copy_loop:
blo copy_loop blo copy_loop
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
/* fix got entries */ /*
ldr r1, _TEXT_BASE * fix .rel.dyn relocations
mov r0, r7 /* reloc addr */ */
ldr r2, _got_start /* addr in Flash */ ldr r0, _TEXT_BASE /* r0 <- Text base */
ldr r3, _got_end /* addr in Flash */ sub r9, r7, r0 /* r9 <- relocation offset */
sub r3, r3, r1 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
add r3, r3, r0 add r10, r10, r0 /* r10 <- sym table in FLASH */
sub r2, r2, r1 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
add r2, r2, r0 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
fixloop: fixloop:
ldr r4, [r2] ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
sub r4, r4, r1 add r0, r9 /* r0 <- location to fix up in RAM */
add r4, r4, r0 ldr r1, [r2, #4]
str r4, [r2] and r8, r1, #0xff
add r2, r2, #4 cmp r8, #23 /* relative fixup? */
beq fixrel
cmp r8, #2 /* absolute fixup? */
beq fixabs
/* ignore unknown type of fixup */
b fixnext
fixabs:
/* absolute fix: set location to (offset) symbol value */
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
add r1, r10, r1 /* r1 <- address of symbol in table */
ldr r1, [r1, #4] /* r1 <- symbol value */
add r1, r9 /* r1 <- relocated sym addr */
b fixnext
fixrel:
/* relative fix: increase location by offset */
ldr r1, [r0]
add r1, r1, r9
fixnext:
str r1, [r0]
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3 cmp r2, r3
bne fixloop blo fixloop
clear_bss: clear_bss:
ldr r0, _bss_start ldr r0, _bss_start_ofs
ldr r1, _bss_end ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */ ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */ mov r4, r7 /* reloc addr */
sub r0, r0, r3
add r0, r0, r4 add r0, r0, r4
sub r1, r1, r3
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
@ -255,18 +272,26 @@ clbss_l:str r2, [r0] /* clear loop... */
* initialization, now running from RAM. * initialization, now running from RAM.
*/ */
jump_2_ram: jump_2_ram:
ldr r0, _TEXT_BASE ldr r0, _board_init_r_ofs
ldr r2, _board_init_r adr r1, _start
sub r2, r2, r0 add r0, r0, r1
add r2, r2, r7 /* position from board_init_r in RAM */ add lr, r0, r9
/* setup parameters for board_init_r */ /* setup parameters for board_init_r */
mov r0, r5 /* gd_t */ mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */ mov r1, r7 /* dest_addr */
/* jump to it ... */ /* jump to it ... */
mov lr, r2
mov pc, lr mov pc, lr
_board_init_r: .word board_init_r _board_init_r_ofs:
.word board_init_r - _start
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
_rel_dyn_end_ofs:
.word __rel_dyn_end - _start
_dynsym_start_ofs:
.word __dynsym_start - _start
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/* /*
* the actual reset code * the actual reset code

7
arch/arm/cpu/armv7/u-boot.lds
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@ -53,6 +53,13 @@ SECTIONS
__datarelro_start = .; __datarelro_start = .;
*(.data.rel.ro) *(.data.rel.ro)
} }
. = ALIGN(4);
__rel_dyn_start = .;
.rel.dyn : { *(.rel.dyn) }
__rel_dyn_end = .;
__dynsym_start = .;
.dynsym : { *(.dynsym) }
__got_start = .; __got_start = .;
. = ALIGN(4); . = ALIGN(4);

2
arch/arm/lib/cache.c
View File

@ -38,7 +38,7 @@ void flush_cache (unsigned long dummy1, unsigned long dummy2)
/* disable write buffer as well (page 2-22) */ /* disable write buffer as well (page 2-22) */
asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
#endif #endif
#ifdef CONFIG_ARMCORTEXA8 #ifdef CONFIG_ARMV7
void v7_flush_cache_all(void); void v7_flush_cache_all(void);
v7_flush_cache_all(); v7_flush_cache_all();