From c67fb07a2a68aa8992166ba2e3d315d5780a4326 Mon Sep 17 00:00:00 2001 From: Patrick Zysset Date: Fri, 23 Nov 2018 01:16:37 +0100 Subject: [PATCH] nmhw21: fix several cppcheck warnings BugzID: 54211 Signed-off-by: Patrick Zysset --- board/nm/nmhw21/board.c | 47 ++++++++++++++++++++++++--------------- board/nm/nmhw21/sja1105.c | 10 ++++----- board/nm/nmhw21/sja1105.h | 6 +---- 3 files changed, 35 insertions(+), 28 deletions(-) diff --git a/board/nm/nmhw21/board.c b/board/nm/nmhw21/board.c index 4b30e1b194..e9151ad9e8 100644 --- a/board/nm/nmhw21/board.c +++ b/board/nm/nmhw21/board.c @@ -534,9 +534,12 @@ static void configure_broadr_phys(void) devname = miiphy_get_current_dev(); /* configure BroadR PHY TJA1100 as slave and restart FSM*/ for (phy = 6; phy <= 7 && err == 0; phy++) { - err = miiphy_write (devname, phy, 0x11, 0x0004);/*Extended control register : bit 15 ->link control disabled*/ - err = miiphy_write (devname, phy, 0x12, 0x0910);/*Configuration register 1 : bit 15 -> PHY configured as Slave*/ - err = miiphy_write (devname, phy, 0x11, 0x9A04);/*Extended control register : link control enable and training restart*/ + /* Extended control register : bit 15 ->link control disabled */ + if (0 != miiphy_write (devname, phy, 0x11, 0x0004)) { err++; } + /* Configuration register 1 : bit 15 -> PHY configured as Slave */ + if (0 != miiphy_write (devname, phy, 0x12, 0x0910)) { err++; } + /* Extended control register : link control enable and training restart */ + if (0 != miiphy_write (devname, phy, 0x11, 0x9A04)) { err++; } } if (err != 0) { puts("BroadR not ready, "); @@ -1037,9 +1040,8 @@ static void set_mac_address(int index, uchar mac[6]) */ int board_eth_init(bd_t *bis) { - int rv, n = 0; - uint8_t mac_addr0[6] = {02,00,00,00,00,01}; - __maybe_unused struct ti_am_eeprom *header; + int n = 0; + __maybe_unused uint8_t mac_addr0[6] = {02,00,00,00,00,01}; #if !defined(CONFIG_SPL_BUILD) #ifdef CONFIG_DRIVER_TI_CPSW cpsw_data.mdio_div = 0x3E; @@ -1048,25 +1050,34 @@ int board_eth_init(bd_t *bis) set_mac_address(0, mac_addr0); writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel); - - rv = cpsw_register(&cpsw_data); - if (rv < 0) - printf("Error %d registering CPSW switch\n", rv); - else - n += rv; + + { + int rv = cpsw_register(&cpsw_data); + if (rv < 0) + { + printf("Error %d registering CPSW switch\n", rv); + } else { + n += rv; + } + } #endif #endif #if defined(CONFIG_USB_ETHER) && \ (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_USBETH_SUPPORT)) - if (is_valid_ethaddr(mac_addr0)) + if (is_valid_ethaddr(mac_addr0)) { eth_setenv_enetaddr("usbnet_devaddr", mac_addr0); + } - rv = usb_eth_initialize(bis); - if (rv < 0) - printf("Error %d registering USB_ETHER\n", rv); - else - n += rv; + { + int rv = usb_eth_initialize(bis); + if (rv < 0) + { + printf("Error %d registering USB_ETHER\n", rv); + } else { + n += rv; + } + } #endif /* Enable BroadR PHYs, set to slave mode */ configure_broadr_phys(); diff --git a/board/nm/nmhw21/sja1105.c b/board/nm/nmhw21/sja1105.c index f55484694d..10ca053ec5 100644 --- a/board/nm/nmhw21/sja1105.c +++ b/board/nm/nmhw21/sja1105.c @@ -256,11 +256,11 @@ static int do_sjainfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) sja1105_release_bus(); printf("Port MAC Stat Rx Tx\n"); - printf("0 (UM) : %08x %d %d\n", p0_mac_stat, p0_rxf, p0_txf); - printf("1 (BroadR-0) : %08x %d %d\n", p1_mac_stat, p1_rxf, p1_txf); - printf("2 (BroadR-1) : %08x %d %d\n", p2_mac_stat, p2_rxf, p2_txf); - printf("3 (100bTx) : %08x %d %d\n", p3_mac_stat, p3_rxf, p3_txf); - printf("4 (CPU) : %08x %d %d\n", p4_mac_stat, p4_rxf, p4_txf); + printf("0 (UM) : %08x %u %u\n", p0_mac_stat, p0_rxf, p0_txf); + printf("1 (BroadR-0) : %08x %u %u\n", p1_mac_stat, p1_rxf, p1_txf); + printf("2 (BroadR-1) : %08x %u %u\n", p2_mac_stat, p2_rxf, p2_txf); + printf("3 (100bTx) : %08x %u %u\n", p3_mac_stat, p3_rxf, p3_txf); + printf("4 (CPU) : %08x %u %u\n", p4_mac_stat, p4_rxf, p4_txf); return 0; } diff --git a/board/nm/nmhw21/sja1105.h b/board/nm/nmhw21/sja1105.h index 7ba6462d3b..20c0191a0c 100644 --- a/board/nm/nmhw21/sja1105.h +++ b/board/nm/nmhw21/sja1105.h @@ -10,13 +10,9 @@ #ifndef _SJA1105_H_ #define _SJA1105_H_ - - #define SJA_REG_DEVICE_ID 0x000000 #define SJA_REG_CONFIG_STATUS 0x000001 - - /** * Initializes the sja1105 driver. * @@ -45,7 +41,7 @@ void sja1105_release_bus(void); * @param address register to read (range 0x0 to 0x100BC3) * @returns readback data */ -uint32_t sja1105_read_reg(uint32_t adress); +uint32_t sja1105_read_reg(uint32_t address); /** * Writes switch register.