Merge git://git.denx.de/u-boot-dm

drivers/core/regmap.c

@@ -70,6 +70,7 @@ int regmap_init_mem(struct udevice *dev, struct regmap **mapp)
 	int addr_len, size_len, both_len;
 	int parent;
 	int len;
+	int index;
 
 	parent = dev_of_offset(dev->parent);
 	addr_len = fdt_address_cells(blob, parent);
@@ -86,13 +87,14 @@ int regmap_init_mem(struct udevice *dev, struct regmap **mapp)
 	if (!map)
 		return -ENOMEM;
 
-	map->base = fdtdec_get_number(cell, addr_len);
-
-	for (range = map->range; count > 0;
-	     count--, cell += both_len, range++) {
-		range->start = fdtdec_get_number(cell, addr_len);
-		range->size = fdtdec_get_number(cell + addr_len, size_len);
+	for (range = map->range, index = 0; count > 0;
+	     count--, cell += both_len, range++, index++) {
+		fdt_size_t sz;
+		range->start = fdtdec_get_addr_size_fixed(blob, dev->of_offset,
+				"reg", index, addr_len, size_len, &sz, true);
+		range->size = sz;
 	}
+	map->base = map->range[0].start;
 
 	*mapp = map;
 

drivers/core/root.c

@@ -44,8 +44,10 @@ struct udevice *dm_root(void)
 void dm_fixup_for_gd_move(struct global_data *new_gd)
 {
 	/* The sentinel node has moved, so update things that point to it */
-	new_gd->uclass_root.next->prev = &new_gd->uclass_root;
-	new_gd->uclass_root.prev->next = &new_gd->uclass_root;
+	if (gd->dm_root) {
+		new_gd->uclass_root.next->prev = &new_gd->uclass_root;
+		new_gd->uclass_root.prev->next = &new_gd->uclass_root;
+	}
 }
 
 fdt_addr_t dm_get_translation_offset(void)

drivers/spi/ti_qspi.c

@@ -17,6 +17,8 @@
 #include <asm/omap_common.h>
 #include <asm/ti-common/ti-edma3.h>
 #include <linux/kernel.h>
+#include <regmap.h>
+#include <syscon.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -549,21 +551,56 @@ static int ti_qspi_probe(struct udevice *bus)
 	return 0;
 }
 
+static void *map_syscon_chipselects(struct udevice *bus)
+{
+#if CONFIG_IS_ENABLED(SYSCON)
+	struct udevice *syscon;
+	struct regmap *regmap;
+	const fdt32_t *cell;
+	int len, err;
+
+	err = uclass_get_device_by_phandle(UCLASS_SYSCON, bus,
+					   "syscon-chipselects", &syscon);
+	if (err) {
+		debug("%s: unable to find syscon device (%d)\n", __func__,
+		      err);
+		return NULL;
+	}
+
+	regmap = syscon_get_regmap(syscon);
+	if (IS_ERR(regmap)) {
+		debug("%s: unable to find regmap (%ld)\n", __func__,
+		      PTR_ERR(regmap));
+		return NULL;
+	}
+
+	cell = fdt_getprop(gd->fdt_blob, bus->of_offset, "syscon-chipselects",
+			   &len);
+	if (len < 2*sizeof(fdt32_t)) {
+		debug("%s: offset not available\n", __func__);
+		return NULL;
+	}
+
+	return fdtdec_get_number(cell + 1, 1) + regmap_get_range(regmap, 0);
+#else
+	fdt_addr_t addr;
+	addr = dev_get_addr_index(bus, 2);
+	return (addr == FDT_ADDR_T_NONE) ? NULL :
+		map_physmem(addr, 0, MAP_NOCACHE);
+#endif
+}
+
 static int ti_qspi_ofdata_to_platdata(struct udevice *bus)
 {
 	struct ti_qspi_priv *priv = dev_get_priv(bus);
 	const void *blob = gd->fdt_blob;
 	int node = dev_of_offset(bus);
-	fdt_addr_t addr;
-	void *mmap;
 
+	priv->ctrl_mod_mmap = map_syscon_chipselects(bus);
 	priv->base = map_physmem(dev_get_addr(bus), sizeof(struct ti_qspi_regs),
 				 MAP_NOCACHE);
 	priv->memory_map = map_physmem(dev_get_addr_index(bus, 1), 0,
 				       MAP_NOCACHE);
-	addr = dev_get_addr_index(bus, 2);
-	mmap = map_physmem(dev_get_addr_index(bus, 2), 0, MAP_NOCACHE);
-	priv->ctrl_mod_mmap = (addr == FDT_ADDR_T_NONE) ? NULL : mmap;
 
 	priv->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", -1);
 	if (priv->max_hz < 0) {

tools/dtoc/dtoc.py

@@ -172,6 +172,21 @@ class DtbPlatdata:
         """
         self.fdt = fdt_select.FdtScan(self._dtb_fname)
 
+    def ScanNode(self, root):
+        for node in root.subnodes:
+            if 'compatible' in node.props:
+                status = node.props.get('status')
+                if (not options.include_disabled and not status or
+                    status.value != 'disabled'):
+                    self._valid_nodes.append(node)
+                    phandle_prop = node.props.get('phandle')
+                    if phandle_prop:
+                        phandle = phandle_prop.GetPhandle()
+                        self._phandle_node[phandle] = node
+
+            # recurse to handle any subnodes
+            self.ScanNode(node);
+
     def ScanTree(self):
         """Scan the device tree for useful information
 
@@ -180,8 +195,10 @@ class DtbPlatdata:
             _valid_nodes: A list of nodes we wish to consider include in the
                 platform data
         """
-        node_list = []
         self._phandle_node = {}
+        self._valid_nodes = []
+        return self.ScanNode(self.fdt.GetRoot());
+
         for node in self.fdt.GetRoot().subnodes:
             if 'compatible' in node.props:
                 status = node.props.get('status')