From d29870a3cc6fbf50f56d7ec12656aeb6ed2b998b Mon Sep 17 00:00:00 2001
From: Keerthy <j-keerthy@ti.com>
Date: Mon, 9 Oct 2023 14:12:49 +0530
Subject: [PATCH] arm: dts: k3-j784s4-r5: Add the PMIC ESM and the PMIC node

The PMIC ESM node is responsible for triggering the PMIC reset.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/dts/k3-j784s4-r5-evm.dts | 39 +++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/dts/k3-j784s4-r5-evm.dts b/arch/arm/dts/k3-j784s4-r5-evm.dts
index 95e521c078..c38deb49a4 100644
--- a/arch/arm/dts/k3-j784s4-r5-evm.dts
+++ b/arch/arm/dts/k3-j784s4-r5-evm.dts
@@ -114,6 +114,14 @@
 			J784S4_WKUP_IOPAD(0x070, PIN_INPUT, 7) /* (L37) WKUP_GPIO0_6 */
 		>;
 	};
+
+	wkup_i2c0_pins_default: wkup-i2c0-pins-default {
+		bootph-pre-ram;
+		pinctrl-single,pins = <
+			J784S4_WKUP_IOPAD(0x98, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */
+			J784S4_WKUP_IOPAD(0x9c, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
+		>;
+	};
 };
 
 &sms {
@@ -205,3 +213,34 @@
 &mcu_udmap {
 	ti,sci = <&dm_tifs>;
 };
+
+&wkup_i2c0 {
+	bootph-pre-ram;
+	pinctrl-names = "default";
+	pinctrl-0 = <&wkup_i2c0_pins_default>;
+	clock-frequency = <400000>;
+
+	tps659413: tps659413@48 {
+		compatible = "ti,tps659413";
+		reg = <0x48>;
+		bootph-pre-ram;
+
+		regulators: regulators {
+			bootph-pre-ram;
+			buck12_reg: buck12 {
+				/*VDD_DDR_1V1*/
+				regulator-name = "buck12";
+				regulator-min-microvolt = <1100000>;
+				regulator-max-microvolt = <1100000>;
+				regulator-always-on;
+				regulator-boot-on;
+				bootph-pre-ram;
+			};
+		};
+
+		esm: esm {
+			compatible = "ti,tps659413-esm";
+			bootph-pre-ram;
+		};
+	};
+};