net: phy: micrel: Separate KSZ9000 drivers from KSZ8000 drivers
The KS8721BL and KSZ9021 PHYs are software-incompatible, yet they share the same ID. Drivers for bothe PHYs cannot safely coexist, so the solution was to use #ifdefs to select between the two drivers. As a result KSZ9031, which has a unique ID, is now caught in the crossfire. Unless CONFIG_PHY_MICREL_KSZ9031 is defined, the KSZ9031 will not function properly, as some essential configuration code is ifdef'd-out. To prevent such situations, move the KSZ9000 drivers to a separate file, and place them under a separate Kconfig option. While it is possible to enable both KSZ8000 and KSZ9000 drivers at the same time, the assumption is that it is highly unlikely for a system to contain both a KSZ8000 and a KSZ9000 PHY, and that only one of the drivers will be enabled at any given time. Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
Alexandru Gagniuc
Joe Hershberger
parent
cb543d30df
commit
d397f7c45b
|
|
@ -69,6 +69,7 @@ if PHY_MICREL
|
|||
config PHY_MICREL_KSZ9021
|
||||
bool "Micrel KSZ9021 family support"
|
||||
select PHY_GIGE
|
||||
select PHY_MICREL_KSZ90X1
|
||||
help
|
||||
Enable support for the Micrel KSZ9021 GbE PHY family. If
|
||||
enabled, the extended register read/write for KSZ9021 PHYs
|
||||
|
|
@ -80,9 +81,12 @@ config PHY_MICREL_KSZ9021
|
|||
KSZ8921BL, so enabling this option disables support for the
|
||||
KSZ8721BL.
|
||||
|
||||
Deprecated. Use PHY_MICREL_KSZ90X1 instead.
|
||||
|
||||
config PHY_MICREL_KSZ9031
|
||||
bool "Micrel KSZ9031 family support"
|
||||
select PHY_GIGE
|
||||
select PHY_MICREL_KSZ90X1
|
||||
help
|
||||
Enable support for the Micrel KSZ9031 GbE PHY family. If
|
||||
enabled, the extended register read/write for KSZ9021 PHYs
|
||||
|
|
@ -90,6 +94,32 @@ config PHY_MICREL_KSZ9031
|
|||
delays configured in the device tree will be applied to the
|
||||
PHY during initialisatioin.
|
||||
|
||||
Deprecated. Use PHY_MICREL_KSZ90X1 instead.
|
||||
|
||||
config PHY_MICREL_KSZ90X1
|
||||
bool "Micrel KSZ90x1 family support"
|
||||
select PHY_GIGE
|
||||
help
|
||||
Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If
|
||||
enabled, the extended register read/write for KSZ90x1 PHYs
|
||||
is supported through the 'mdio' command and any RGMII signal
|
||||
delays configured in the device tree will be applied to the
|
||||
PHY during initialization.
|
||||
|
||||
This should not be enabled at the same time with PHY_MICREL_KSZ8XXX
|
||||
as the KSZ9021 and KS8721 share the same ID.
|
||||
|
||||
config PHY_MICREL_KSZ8XXX
|
||||
bool "Micrel KSZ8xxx family support"
|
||||
default y if !PHY_MICREL_KSZ90X1
|
||||
help
|
||||
Enable support for the 8000 series GbE PHYs manufactured by Micrel
|
||||
(now a part of Microchip). This includes drivers for the KSZ804,
|
||||
KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721.
|
||||
|
||||
This should not be enabled at the same time with PHY_MICREL_KSZ90X1
|
||||
as the KSZ9021 and KS8721 share the same ID.
|
||||
|
||||
endif # PHY_MICREL
|
||||
|
||||
config PHY_MSCC
|
||||
|
|
|
|||
|
|
@ -19,7 +19,8 @@ obj-$(CONFIG_PHY_DAVICOM) += davicom.o
|
|||
obj-$(CONFIG_PHY_ET1011C) += et1011c.o
|
||||
obj-$(CONFIG_PHY_LXT) += lxt.o
|
||||
obj-$(CONFIG_PHY_MARVELL) += marvell.o
|
||||
obj-$(CONFIG_PHY_MICREL) += micrel.o
|
||||
obj-$(CONFIG_PHY_MICREL_KSZ8XXX) += micrel_ksz8xxx.o
|
||||
obj-$(CONFIG_PHY_MICREL_KSZ90X1) += micrel_ksz90x1.o
|
||||
obj-$(CONFIG_PHY_NATSEMI) += natsemi.o
|
||||
obj-$(CONFIG_PHY_REALTEK) += realtek.o
|
||||
obj-$(CONFIG_PHY_SMSC) += smsc.o
|
||||
|
|
|
|||
|
|
@ -365,7 +365,8 @@ static int ksz9021_config(struct phy_device *phydev)
|
|||
ctrl1000 |= ADVERTISE_1000HALF | master;
|
||||
if (features & SUPPORTED_1000baseT_Full)
|
||||
ctrl1000 |= ADVERTISE_1000FULL | master;
|
||||
phydev->advertising = phydev->supported = features;
|
||||
phydev->advertising = features;
|
||||
phydev->supported = features;
|
||||
phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, ctrl1000);
|
||||
genphy_config_aneg(phydev);
|
||||
genphy_restart_aneg(phydev);
|
||||
|
|
@ -479,14 +480,14 @@ static int ksz9031_phy_extread(struct phy_device *phydev, int addr, int devaddr,
|
|||
{
|
||||
return ksz9031_phy_extended_read(phydev, devaddr, regnum,
|
||||
MII_KSZ9031_MOD_DATA_NO_POST_INC);
|
||||
};
|
||||
}
|
||||
|
||||
static int ksz9031_phy_extwrite(struct phy_device *phydev, int addr,
|
||||
int devaddr, int regnum, u16 val)
|
||||
{
|
||||
return ksz9031_phy_extended_write(phydev, devaddr, regnum,
|
||||
MII_KSZ9031_MOD_DATA_POST_INC_RW, val);
|
||||
};
|
||||
}
|
||||
|
||||
static int ksz9031_config(struct phy_device *phydev)
|
||||
{
|
||||
|
|
@ -537,7 +538,7 @@ static struct phy_driver ksz886x_driver = {
|
|||
.shutdown = &genphy_shutdown,
|
||||
};
|
||||
|
||||
int phy_micrel_init(void)
|
||||
int phy_micrel_ksz8xxx_init(void)
|
||||
{
|
||||
phy_register(&KSZ804_driver);
|
||||
phy_register(&KSZ8031_driver);
|
||||
|
|
@ -0,0 +1,364 @@
|
|||
/*
|
||||
* Micrel PHY drivers
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*
|
||||
* Copyright 2010-2011 Freescale Semiconductor, Inc.
|
||||
* author Andy Fleming
|
||||
* (C) 2012 NetModule AG, David Andrey, added KSZ9031
|
||||
* (C) Copyright 2017 Adaptrum, Inc.
|
||||
* Written by Alexandru Gagniuc <alex.g@adaptrum.com> for Adaptrum, Inc.
|
||||
*/
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <dm.h>
|
||||
#include <errno.h>
|
||||
#include <fdtdec.h>
|
||||
#include <micrel.h>
|
||||
#include <phy.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/*
|
||||
* KSZ9021 - KSZ9031 common
|
||||
*/
|
||||
|
||||
#define MII_KSZ90xx_PHY_CTL 0x1f
|
||||
#define MIIM_KSZ90xx_PHYCTL_1000 (1 << 6)
|
||||
#define MIIM_KSZ90xx_PHYCTL_100 (1 << 5)
|
||||
#define MIIM_KSZ90xx_PHYCTL_10 (1 << 4)
|
||||
#define MIIM_KSZ90xx_PHYCTL_DUPLEX (1 << 3)
|
||||
|
||||
/* KSZ9021 PHY Registers */
|
||||
#define MII_KSZ9021_EXTENDED_CTRL 0x0b
|
||||
#define MII_KSZ9021_EXTENDED_DATAW 0x0c
|
||||
#define MII_KSZ9021_EXTENDED_DATAR 0x0d
|
||||
|
||||
#define CTRL1000_PREFER_MASTER (1 << 10)
|
||||
#define CTRL1000_CONFIG_MASTER (1 << 11)
|
||||
#define CTRL1000_MANUAL_CONFIG (1 << 12)
|
||||
|
||||
/* KSZ9031 PHY Registers */
|
||||
#define MII_KSZ9031_MMD_ACCES_CTRL 0x0d
|
||||
#define MII_KSZ9031_MMD_REG_DATA 0x0e
|
||||
|
||||
static int ksz90xx_startup(struct phy_device *phydev)
|
||||
{
|
||||
unsigned phy_ctl;
|
||||
int ret;
|
||||
|
||||
ret = genphy_update_link(phydev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
phy_ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ90xx_PHY_CTL);
|
||||
|
||||
if (phy_ctl & MIIM_KSZ90xx_PHYCTL_DUPLEX)
|
||||
phydev->duplex = DUPLEX_FULL;
|
||||
else
|
||||
phydev->duplex = DUPLEX_HALF;
|
||||
|
||||
if (phy_ctl & MIIM_KSZ90xx_PHYCTL_1000)
|
||||
phydev->speed = SPEED_1000;
|
||||
else if (phy_ctl & MIIM_KSZ90xx_PHYCTL_100)
|
||||
phydev->speed = SPEED_100;
|
||||
else if (phy_ctl & MIIM_KSZ90xx_PHYCTL_10)
|
||||
phydev->speed = SPEED_10;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Common OF config bits for KSZ9021 and KSZ9031 */
|
||||
#ifdef CONFIG_DM_ETH
|
||||
struct ksz90x1_reg_field {
|
||||
const char *name;
|
||||
const u8 size; /* Size of the bitfield, in bits */
|
||||
const u8 off; /* Offset from bit 0 */
|
||||
const u8 dflt; /* Default value */
|
||||
};
|
||||
|
||||
struct ksz90x1_ofcfg {
|
||||
const u16 reg;
|
||||
const u16 devad;
|
||||
const struct ksz90x1_reg_field *grp;
|
||||
const u16 grpsz;
|
||||
};
|
||||
|
||||
static const struct ksz90x1_reg_field ksz90x1_rxd_grp[] = {
|
||||
{ "rxd0-skew-ps", 4, 0, 0x7 }, { "rxd1-skew-ps", 4, 4, 0x7 },
|
||||
{ "rxd2-skew-ps", 4, 8, 0x7 }, { "rxd3-skew-ps", 4, 12, 0x7 }
|
||||
};
|
||||
|
||||
static const struct ksz90x1_reg_field ksz90x1_txd_grp[] = {
|
||||
{ "txd0-skew-ps", 4, 0, 0x7 }, { "txd1-skew-ps", 4, 4, 0x7 },
|
||||
{ "txd2-skew-ps", 4, 8, 0x7 }, { "txd3-skew-ps", 4, 12, 0x7 },
|
||||
};
|
||||
|
||||
static const struct ksz90x1_reg_field ksz9021_clk_grp[] = {
|
||||
{ "txen-skew-ps", 4, 0, 0x7 }, { "txc-skew-ps", 4, 4, 0x7 },
|
||||
{ "rxdv-skew-ps", 4, 8, 0x7 }, { "rxc-skew-ps", 4, 12, 0x7 },
|
||||
};
|
||||
|
||||
static const struct ksz90x1_reg_field ksz9031_ctl_grp[] = {
|
||||
{ "txen-skew-ps", 4, 0, 0x7 }, { "rxdv-skew-ps", 4, 4, 0x7 }
|
||||
};
|
||||
|
||||
static const struct ksz90x1_reg_field ksz9031_clk_grp[] = {
|
||||
{ "rxc-skew-ps", 5, 0, 0xf }, { "txc-skew-ps", 5, 5, 0xf }
|
||||
};
|
||||
|
||||
static int ksz90x1_of_config_group(struct phy_device *phydev,
|
||||
struct ksz90x1_ofcfg *ofcfg)
|
||||
{
|
||||
struct udevice *dev = phydev->dev;
|
||||
struct phy_driver *drv = phydev->drv;
|
||||
const int ps_to_regval = 60;
|
||||
int val[4];
|
||||
int i, changed = 0, offset, max;
|
||||
u16 regval = 0;
|
||||
|
||||
if (!drv || !drv->writeext)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
for (i = 0; i < ofcfg->grpsz; i++) {
|
||||
val[i] = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
|
||||
ofcfg->grp[i].name, -1);
|
||||
offset = ofcfg->grp[i].off;
|
||||
if (val[i] == -1) {
|
||||
/* Default register value for KSZ9021 */
|
||||
regval |= ofcfg->grp[i].dflt << offset;
|
||||
} else {
|
||||
changed = 1; /* Value was changed in OF */
|
||||
/* Calculate the register value and fix corner cases */
|
||||
if (val[i] > ps_to_regval * 0xf) {
|
||||
max = (1 << ofcfg->grp[i].size) - 1;
|
||||
regval |= max << offset;
|
||||
} else {
|
||||
regval |= (val[i] / ps_to_regval) << offset;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (!changed)
|
||||
return 0;
|
||||
|
||||
return drv->writeext(phydev, 0, ofcfg->devad, ofcfg->reg, regval);
|
||||
}
|
||||
|
||||
static int ksz9021_of_config(struct phy_device *phydev)
|
||||
{
|
||||
struct ksz90x1_ofcfg ofcfg[] = {
|
||||
{ MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0, ksz90x1_rxd_grp, 4 },
|
||||
{ MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0, ksz90x1_txd_grp, 4 },
|
||||
{ MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0, ksz9021_clk_grp, 4 },
|
||||
};
|
||||
int i, ret = 0;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(ofcfg); i++) {
|
||||
ret = ksz90x1_of_config_group(phydev, &(ofcfg[i]));
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ksz9031_of_config(struct phy_device *phydev)
|
||||
{
|
||||
struct ksz90x1_ofcfg ofcfg[] = {
|
||||
{ MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, 2, ksz9031_ctl_grp, 2 },
|
||||
{ MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, 2, ksz90x1_rxd_grp, 4 },
|
||||
{ MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, 2, ksz90x1_txd_grp, 4 },
|
||||
{ MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, 2, ksz9031_clk_grp, 2 },
|
||||
};
|
||||
int i, ret = 0;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(ofcfg); i++) {
|
||||
ret = ksz90x1_of_config_group(phydev, &(ofcfg[i]));
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ksz9031_center_flp_timing(struct phy_device *phydev)
|
||||
{
|
||||
struct phy_driver *drv = phydev->drv;
|
||||
int ret = 0;
|
||||
|
||||
if (!drv || !drv->writeext)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
ret = drv->writeext(phydev, 0, 0, MII_KSZ9031_FLP_BURST_TX_LO, 0x1A80);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = drv->writeext(phydev, 0, 0, MII_KSZ9031_FLP_BURST_TX_HI, 0x6);
|
||||
return ret;
|
||||
}
|
||||
|
||||
#else /* !CONFIG_DM_ETH */
|
||||
static int ksz9021_of_config(struct phy_device *phydev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ksz9031_of_config(struct phy_device *phydev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ksz9031_center_flp_timing(struct phy_device *phydev)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* KSZ9021
|
||||
*/
|
||||
int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val)
|
||||
{
|
||||
/* extended registers */
|
||||
phy_write(phydev, MDIO_DEVAD_NONE,
|
||||
MII_KSZ9021_EXTENDED_CTRL, regnum | 0x8000);
|
||||
return phy_write(phydev, MDIO_DEVAD_NONE,
|
||||
MII_KSZ9021_EXTENDED_DATAW, val);
|
||||
}
|
||||
|
||||
int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum)
|
||||
{
|
||||
/* extended registers */
|
||||
phy_write(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_EXTENDED_CTRL, regnum);
|
||||
return phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9021_EXTENDED_DATAR);
|
||||
}
|
||||
|
||||
|
||||
static int ksz9021_phy_extread(struct phy_device *phydev, int addr, int devaddr,
|
||||
int regnum)
|
||||
{
|
||||
return ksz9021_phy_extended_read(phydev, regnum);
|
||||
}
|
||||
|
||||
static int ksz9021_phy_extwrite(struct phy_device *phydev, int addr,
|
||||
int devaddr, int regnum, u16 val)
|
||||
{
|
||||
return ksz9021_phy_extended_write(phydev, regnum, val);
|
||||
}
|
||||
|
||||
static int ksz9021_config(struct phy_device *phydev)
|
||||
{
|
||||
unsigned ctrl1000 = 0;
|
||||
const unsigned master = CTRL1000_PREFER_MASTER |
|
||||
CTRL1000_CONFIG_MASTER | CTRL1000_MANUAL_CONFIG;
|
||||
unsigned features = phydev->drv->features;
|
||||
int ret;
|
||||
|
||||
ret = ksz9021_of_config(phydev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (getenv("disable_giga"))
|
||||
features &= ~(SUPPORTED_1000baseT_Half |
|
||||
SUPPORTED_1000baseT_Full);
|
||||
/* force master mode for 1000BaseT due to chip errata */
|
||||
if (features & SUPPORTED_1000baseT_Half)
|
||||
ctrl1000 |= ADVERTISE_1000HALF | master;
|
||||
if (features & SUPPORTED_1000baseT_Full)
|
||||
ctrl1000 |= ADVERTISE_1000FULL | master;
|
||||
phydev->advertising = features;
|
||||
phydev->supported = features;
|
||||
phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, ctrl1000);
|
||||
genphy_config_aneg(phydev);
|
||||
genphy_restart_aneg(phydev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct phy_driver ksz9021_driver = {
|
||||
.name = "Micrel ksz9021",
|
||||
.uid = 0x221610,
|
||||
.mask = 0xfffff0,
|
||||
.features = PHY_GBIT_FEATURES,
|
||||
.config = &ksz9021_config,
|
||||
.startup = &ksz90xx_startup,
|
||||
.shutdown = &genphy_shutdown,
|
||||
.writeext = &ksz9021_phy_extwrite,
|
||||
.readext = &ksz9021_phy_extread,
|
||||
};
|
||||
|
||||
/*
|
||||
* KSZ9031
|
||||
*/
|
||||
int ksz9031_phy_extended_write(struct phy_device *phydev,
|
||||
int devaddr, int regnum, u16 mode, u16 val)
|
||||
{
|
||||
/*select register addr for mmd*/
|
||||
phy_write(phydev, MDIO_DEVAD_NONE,
|
||||
MII_KSZ9031_MMD_ACCES_CTRL, devaddr);
|
||||
/*select register for mmd*/
|
||||
phy_write(phydev, MDIO_DEVAD_NONE,
|
||||
MII_KSZ9031_MMD_REG_DATA, regnum);
|
||||
/*setup mode*/
|
||||
phy_write(phydev, MDIO_DEVAD_NONE,
|
||||
MII_KSZ9031_MMD_ACCES_CTRL, (mode | devaddr));
|
||||
/*write the value*/
|
||||
return phy_write(phydev, MDIO_DEVAD_NONE,
|
||||
MII_KSZ9031_MMD_REG_DATA, val);
|
||||
}
|
||||
|
||||
int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr,
|
||||
int regnum, u16 mode)
|
||||
{
|
||||
phy_write(phydev, MDIO_DEVAD_NONE,
|
||||
MII_KSZ9031_MMD_ACCES_CTRL, devaddr);
|
||||
phy_write(phydev, MDIO_DEVAD_NONE,
|
||||
MII_KSZ9031_MMD_REG_DATA, regnum);
|
||||
phy_write(phydev, MDIO_DEVAD_NONE,
|
||||
MII_KSZ9031_MMD_ACCES_CTRL, (devaddr | mode));
|
||||
return phy_read(phydev, MDIO_DEVAD_NONE, MII_KSZ9031_MMD_REG_DATA);
|
||||
}
|
||||
|
||||
static int ksz9031_phy_extread(struct phy_device *phydev, int addr, int devaddr,
|
||||
int regnum)
|
||||
{
|
||||
return ksz9031_phy_extended_read(phydev, devaddr, regnum,
|
||||
MII_KSZ9031_MOD_DATA_NO_POST_INC);
|
||||
}
|
||||
|
||||
static int ksz9031_phy_extwrite(struct phy_device *phydev, int addr,
|
||||
int devaddr, int regnum, u16 val)
|
||||
{
|
||||
return ksz9031_phy_extended_write(phydev, devaddr, regnum,
|
||||
MII_KSZ9031_MOD_DATA_POST_INC_RW, val);
|
||||
}
|
||||
|
||||
static int ksz9031_config(struct phy_device *phydev)
|
||||
{
|
||||
int ret;
|
||||
ret = ksz9031_of_config(phydev);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = ksz9031_center_flp_timing(phydev);
|
||||
if (ret)
|
||||
return ret;
|
||||
return genphy_config(phydev);
|
||||
}
|
||||
|
||||
static struct phy_driver ksz9031_driver = {
|
||||
.name = "Micrel ksz9031",
|
||||
.uid = 0x221620,
|
||||
.mask = 0xfffff0,
|
||||
.features = PHY_GBIT_FEATURES,
|
||||
.config = &ksz9031_config,
|
||||
.startup = &ksz90xx_startup,
|
||||
.shutdown = &genphy_shutdown,
|
||||
.writeext = &ksz9031_phy_extwrite,
|
||||
.readext = &ksz9031_phy_extread,
|
||||
};
|
||||
|
||||
int phy_micrel_ksz90x1_init(void)
|
||||
{
|
||||
phy_register(&ksz9021_driver);
|
||||
phy_register(&ksz9031_driver);
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -488,8 +488,11 @@ int phy_init(void)
|
|||
#ifdef CONFIG_PHY_MARVELL
|
||||
phy_marvell_init();
|
||||
#endif
|
||||
#ifdef CONFIG_PHY_MICREL
|
||||
phy_micrel_init();
|
||||
#ifdef CONFIG_PHY_MICREL_KSZ8XXX
|
||||
phy_micrel_ksz8xxx_init();
|
||||
#endif
|
||||
#ifdef CONFIG_PHY_MICREL_KSZ90X1
|
||||
phy_micrel_ksz90x1_init();
|
||||
#endif
|
||||
#ifdef CONFIG_PHY_NATSEMI
|
||||
phy_natsemi_init();
|
||||
|
|
|
|||
|
|
@ -266,7 +266,8 @@ int phy_davicom_init(void);
|
|||
int phy_et1011c_init(void);
|
||||
int phy_lxt_init(void);
|
||||
int phy_marvell_init(void);
|
||||
int phy_micrel_init(void);
|
||||
int phy_micrel_ksz8xxx_init(void);
|
||||
int phy_micrel_ksz90x1_init(void);
|
||||
int phy_natsemi_init(void);
|
||||
int phy_realtek_init(void);
|
||||
int phy_smsc_init(void);
|
||||
|
|
|
|||
Loading…
Reference in New Issue