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netbird_v2: enable wlan clock in u-boot

This commit is contained in:
Stefan Eichenberger 2017-01-12 11:34:39 +01:00
parent 4642adbd4e
commit d661aae654
3 changed files with 60 additions and 4 deletions
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6
arch/arm/include/asm/arch-am33xx/cpu.h
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@ -530,10 +530,12 @@ struct ctrl_dev {
unsigned int macid1h; /* offset 0x3c */ unsigned int macid1h; /* offset 0x3c */
unsigned int resv4[4]; unsigned int resv4[4];
unsigned int miisel; /* offset 0x50 */ unsigned int miisel; /* offset 0x50 */
unsigned int resv5[7]; unsigned int resv5[4];
unsigned int pwmssctrl; /* offset 0x64 */
unsigned int resv6[2];
unsigned int mreqprio_0; /* offset 0x70 */ unsigned int mreqprio_0; /* offset 0x70 */
unsigned int mreqprio_1; /* offset 0x74 */ unsigned int mreqprio_1; /* offset 0x74 */
unsigned int resv6[97]; unsigned int resv7[97];
unsigned int efuse_sma; /* offset 0x1FC */ unsigned int efuse_sma; /* offset 0x1FC */
}; };

54
board/nm/netbird_v2/board.c
View File

@ -355,6 +355,58 @@ int board_init(void)
return 0; return 0;
} }
/* Enable the ecap2 pwm see siemens/pxm2 */
static int enable_pwm(void)
{
#define PWM_TICKS 0xBEB
#define PWM_DUTY 0x5F5
#define AM33XX_ECAP2_BASE 0x48304100
#define PWMSS2_BASE 0x48304000
struct pwmss_regs *pwmss = (struct pwmss_regs *)PWMSS2_BASE;
struct pwmss_ecap_regs *ecap;
int ticks = PWM_TICKS;
int duty = PWM_DUTY;
ecap = (struct pwmss_ecap_regs *)AM33XX_ECAP2_BASE;
/* enable clock */
setbits_le32(&pwmss->clkconfig, ECAP_CLK_EN);
/* TimeStamp Counter register */
writel(0x0, &ecap->ctrphs);
setbits_le16(&ecap->ecctl2,
(ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK));
/* config period */
writel(ticks - 1, &ecap->cap3);
writel(ticks - 1, &ecap->cap1);
/* config duty */
writel(duty, &ecap->cap2);
writel(duty, &ecap->cap4);
/* start */
setbits_le16(&ecap->ecctl2, ECTRL2_CTRSTP_FREERUN);
return 0;
}
/* Enable the input clock for ecap2 and then enable the pwm */
static void enable_wlan_clock(void)
{
struct cm_perpll *const cmper = (struct cm_perpll*)CM_PER;
struct ctrl_dev *const cdev= (struct ctrl_dev*)CTRL_DEVICE_BASE;
u32 *const clk_domains[] = { 0 };
u32 *const clk_modules_nmspecific[] = {
&cmper->epwmss2clkctrl,
0
};
do_enable_clocks(clk_domains, clk_modules_nmspecific, 1);
/* Enable timebase clock for pwmss2 */
writel(0x04, &cdev->pwmssctrl);
enable_pwm();
}
#ifdef CONFIG_BOARD_LATE_INIT #ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void) int board_late_init(void)
{ {
@ -394,6 +446,8 @@ int board_late_init(void)
set_board_info_env(name); set_board_info_env(name);
#endif #endif
enable_wlan_clock();
return 0; return 0;
} }
#endif #endif

2
board/nm/netbird_v2/mux.c
View File

@ -129,7 +129,7 @@ static struct module_pin_mux gpio_netbird_pin_mux[] = {
{OFFSET(mii1_rxdv), (MODE(7) | PULLUDDIS)}, /* (J17) gmii1_rxdv.gpio3[4] */ /* BT_EN */ {OFFSET(mii1_rxdv), (MODE(7) | PULLUDDIS)}, /* (J17) gmii1_rxdv.gpio3[4] */ /* BT_EN */
{OFFSET(mii1_rxdv), (MODE(7) | RXACTIVE)}, /* (K18) gmii1_txclk.gpio3[9] */ /* WLAN_IRQ */ {OFFSET(mii1_rxdv), (MODE(7) | RXACTIVE)}, /* (K18) gmii1_txclk.gpio3[9] */ /* WLAN_IRQ */
{OFFSET(mii1_rxclk), (MODE(7) | PULLUDDIS)}, /* (L18) gmii1_rxclk.gpio3[10] */ /* WLAN_EN */ {OFFSET(mii1_rxclk), (MODE(7) | PULLUDDIS)}, /* (L18) gmii1_rxclk.gpio3[10] */ /* WLAN_EN */
{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS)}, /* (C12) mcasp0_ahclkr.gpio3[17] */ /* WLAN_CLK (32k Linux only) */ {OFFSET(mcasp0_ahclkr), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (C12) mcasp0_ahclkr.ecap2_in_pwm2_out */ /* WLAN_CLK */
{-1}, {-1},
}; };