diff --git a/MAINTAINERS b/MAINTAINERS index 52d7307525..c8c1ea1761 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -504,6 +504,7 @@ F: drivers/ram/k3* F: drivers/remoteproc/k3_system_controller.c F: drivers/remoteproc/ti* F: drivers/reset/reset-ti-sci.c +F: drivers/reset/reset-dra7.c F: drivers/rtc/davinci.c F: drivers/serial/serial_omap.c F: drivers/soc/ti/ diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 33c2736554..1de9e4144a 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -188,4 +188,11 @@ config RESET_SCMI Enable this option if you want to support reset controller devices exposed by a SCMI agent based on SCMI reset domain protocol communication with a SCMI server. + +config RESET_DRA7 + bool "Support for TI's DRA7 Reset driver" + depends on DM_RESET + help + Support for TI DRA7-RESET subsystem. Basic Assert/Deassert + is supported. endmenu diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index fa52aa3329..bb7779ce5f 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -28,3 +28,4 @@ obj-$(CONFIG_RESET_SIFIVE) += reset-sifive.o obj-$(CONFIG_RESET_SYSCON) += reset-syscon.o obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o obj-$(CONFIG_RESET_SCMI) += reset-scmi.o +obj-$(CONFIG_RESET_DRA7) += reset-dra7.o diff --git a/drivers/reset/reset-dra7.c b/drivers/reset/reset-dra7.c new file mode 100644 index 0000000000..5fb53646f0 --- /dev/null +++ b/drivers/reset/reset-dra7.c @@ -0,0 +1,97 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Texas Instruments DRA7 reset driver + * + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Author: Keerthy + */ + +#include +#include +#include +#include +#include + +struct dra7_reset_priv { + u32 rstctrl; + u32 rstst; + u8 nreset; +}; + +static int dra7_reset_request(struct reset_ctl *reset_ctl) +{ + return 0; +} + +static int dra7_reset_free(struct reset_ctl *reset_ctl) +{ + return 0; +} + +static inline void dra7_reset_rmw(u32 addr, u32 value, u32 mask) +{ + writel(((readl(addr) & (~mask)) | (value & mask)), addr); +} + +static int dra7_reset_deassert(struct reset_ctl *reset_ctl) +{ + struct dra7_reset_priv *priv = dev_get_priv(reset_ctl->dev); + int mask = 1 << reset_ctl->id; + + if (reset_ctl->id < 0 || reset_ctl->id >= priv->nreset) + return -EINVAL; + + dra7_reset_rmw(priv->rstctrl, 0x0, mask); + + while ((readl(priv->rstst) & mask) != mask) + ; + + return 0; +} + +static int dra7_reset_assert(struct reset_ctl *reset_ctl) +{ + struct dra7_reset_priv *priv = dev_get_priv(reset_ctl->dev); + int mask = 1 << reset_ctl->id; + + if (reset_ctl->id < 0 || reset_ctl->id >= priv->nreset) + return -EINVAL; + + dra7_reset_rmw(priv->rstctrl, mask, 0x0); + + return 0; +} + +struct reset_ops dra7_reset_ops = { + .request = dra7_reset_request, + .rfree = dra7_reset_free, + .rst_assert = dra7_reset_assert, + .rst_deassert = dra7_reset_deassert, +}; + +static const struct udevice_id dra7_reset_ids[] = { + { .compatible = "ti,dra7-reset" }, + { } +}; + +static int dra7_reset_probe(struct udevice *dev) +{ + struct dra7_reset_priv *priv = dev_get_priv(dev); + + priv->rstctrl = dev_read_addr(dev); + priv->rstst = priv->rstctrl + 0x4; + priv->nreset = dev_read_u32_default(dev, "ti,nresets", 1); + + dev_info(dev, "dra7-reset successfully probed %s\n", dev->name); + + return 0; +} + +U_BOOT_DRIVER(dra7_reset) = { + .name = "dra7_reset", + .id = UCLASS_RESET, + .of_match = dra7_reset_ids, + .probe = dra7_reset_probe, + .ops = &dra7_reset_ops, + .priv_auto_alloc_size = sizeof(struct dra7_reset_priv), +};