Add support for Eukrea CPUAT91 SBC
CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII mode. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
This commit is contained in:
Tom Rix
parent
eb95aa15e6
commit
d8380c9d35
|
|
@ -525,6 +525,10 @@ Dirk Behme <dirk.behme@gmail.com>
|
|||
|
||||
omap3_beagle ARM CORTEX-A8 (OMAP3530 SoC)
|
||||
|
||||
Eric Benard <eric@eukrea.com>
|
||||
|
||||
cpuat91 ARM920T
|
||||
|
||||
Rishi Bhattacharya <rishi@ti.com>
|
||||
|
||||
omap5912osk ARM926EJS
|
||||
|
|
|
|||
3
MAKEALL
3
MAKEALL
|
|
@ -618,11 +618,12 @@ LIST_at91=" \
|
|||
at91sam9260ek \
|
||||
at91sam9261ek \
|
||||
at91sam9263ek \
|
||||
at91sam9g10ek \
|
||||
at91sam9g10ek \
|
||||
at91sam9g20ek \
|
||||
at91sam9m10g45ek \
|
||||
at91sam9rlek \
|
||||
cmc_pu2 \
|
||||
CPUAT91 \
|
||||
csb637 \
|
||||
kb9202 \
|
||||
meesc \
|
||||
|
|
|
|||
6
Makefile
6
Makefile
|
|
@ -2691,6 +2691,12 @@ at91rm9200ek_config : unconfig
|
|||
cmc_pu2_config : unconfig
|
||||
@$(MKCONFIG) $(@:_config=) arm arm920t cmc_pu2 NULL at91rm9200
|
||||
|
||||
CPUAT91_RAM_config \
|
||||
CPUAT91_config : unconfig
|
||||
@mkdir -p $(obj)include
|
||||
@echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h
|
||||
@$(MKCONFIG) -a cpuat91 arm arm920t cpuat91 eukrea at91rm9200
|
||||
|
||||
csb637_config : unconfig
|
||||
@$(MKCONFIG) $(@:_config=) arm arm920t csb637 NULL at91rm9200
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,50 @@
|
|||
#
|
||||
# (C) Copyright 2003-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd at denx.de. <http://lists.denx.de/mailman/listinfo/u-boot>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
LIB = $(obj)lib$(BOARD).a
|
||||
|
||||
COBJS := cpuat91.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
SOBJS := $(addprefix $(obj),$(SOBJS))
|
||||
|
||||
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
|
||||
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
|
||||
|
||||
clean:
|
||||
rm -f $(SOBJS) $(OBJS)
|
||||
|
||||
distclean: clean
|
||||
rm -f $(LIB) core *.bak .depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -0,0 +1 @@
|
|||
TEXT_BASE = 0x21F00000
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
/*
|
||||
* (C) Copyright 2006 Eukrea Electromatique <www.eukrea.com>
|
||||
* Eric Benard <eric@eukrea.com>
|
||||
* based on at91rm9200dk.c which is :
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/AT91RM9200.h>
|
||||
#include <at91rm9200_net.h>
|
||||
#include <ks8721.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/* ------------------------------------------------------------------------- */
|
||||
/*
|
||||
* Miscelaneous platform dependent initialisations
|
||||
*/
|
||||
|
||||
int board_init(void)
|
||||
{
|
||||
/* Enable Ctrlc */
|
||||
console_init_f();
|
||||
/* arch number of CPUAT91-Board */
|
||||
gd->bd->bi_arch_number = MACH_TYPE_CPUAT91;
|
||||
/* adress of boot parameters */
|
||||
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dram_init(void)
|
||||
{
|
||||
gd->bd->bi_dram[0].start = PHYS_SDRAM;
|
||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_DRIVER_ETHER)
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* at91rm9200_GetPhyInterface
|
||||
* Description:
|
||||
* Initialise the interface functions to the PHY
|
||||
* Arguments:
|
||||
* None
|
||||
* Return value:
|
||||
* None
|
||||
*/
|
||||
void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
|
||||
{
|
||||
p_phyops->Init = ks8721_initphy;
|
||||
p_phyops->IsPhyConnected = ks8721_isphyconnected;
|
||||
p_phyops->GetLinkSpeed = ks8721_getlinkspeed;
|
||||
p_phyops->AutoNegotiate = ks8721_autonegotiate;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_CMD_NET */
|
||||
#endif /* CONFIG_DRIVER_ETHER */
|
||||
|
|
@ -31,14 +31,15 @@ COBJS += bcm5221.o
|
|||
COBJS += dm9161.o
|
||||
COBJS += ether.o
|
||||
COBJS += i2c.o
|
||||
COBJS-$(CONFIG_KS8721_PHY) += ks8721.o
|
||||
COBJS += lxt972.o
|
||||
COBJS += reset.o
|
||||
COBJS += spi.o
|
||||
COBJS += timer.o
|
||||
COBJS += usb.o
|
||||
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(COBJS-y:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS-y))
|
||||
|
||||
all: $(obj).depend $(LIB)
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,249 @@
|
|||
/*
|
||||
* (C) Copyright 2006
|
||||
* Author : Eric Benard (Eukrea Electromatique)
|
||||
* based on dm9161.c which is :
|
||||
* (C) Copyright 2003
|
||||
* Author : Hamid Ikdoumi (Atmel)
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <at91rm9200_net.h>
|
||||
#include <net.h>
|
||||
#include <ks8721.h>
|
||||
|
||||
#ifdef CONFIG_DRIVER_ETHER
|
||||
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* ks8721_isphyconnected
|
||||
* Description:
|
||||
* Reads the 2 PHY ID registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to AT91S_EMAC struct
|
||||
* Return value:
|
||||
* 1 - if id read successfully
|
||||
* 0 - if error
|
||||
*/
|
||||
unsigned int ks8721_isphyconnected(AT91PS_EMAC p_mac)
|
||||
{
|
||||
unsigned short id1, id2;
|
||||
|
||||
at91rm9200_EmacEnableMDIO(p_mac);
|
||||
at91rm9200_EmacReadPhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_PHYID1, &id1);
|
||||
at91rm9200_EmacReadPhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_PHYID2, &id2);
|
||||
at91rm9200_EmacDisableMDIO(p_mac);
|
||||
|
||||
if ((id1 == (KS8721_PHYID_OUI >> 6)) &&
|
||||
((id2 >> 10) == (KS8721_PHYID_OUI & KS8721_LSB_MASK))) {
|
||||
if ((id2 & KS8721_MODELMASK) == KS8721BL_MODEL)
|
||||
printf("Micrel KS8721bL PHY detected : ");
|
||||
else
|
||||
printf("Unknown Micrel PHY detected : ");
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* ks8721_getlinkspeed
|
||||
* Description:
|
||||
* Link parallel detection status of MAC is checked and set in the
|
||||
* MAC configuration registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to MAC
|
||||
* Return value:
|
||||
* 1 - if link status set succesfully
|
||||
* 0 - if link status not set
|
||||
*/
|
||||
unsigned char ks8721_getlinkspeed(AT91PS_EMAC p_mac)
|
||||
{
|
||||
unsigned short stat1;
|
||||
|
||||
if (!at91rm9200_EmacReadPhy(p_mac, KS8721_BMSR, &stat1))
|
||||
return 0;
|
||||
|
||||
if (!(stat1 & KS8721_LINK_STATUS)) {
|
||||
/* link status up? */
|
||||
printf("Link Down !\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (stat1 & KS8721_100BASE_TX_FD) {
|
||||
/* set Emac for 100BaseTX and Full Duplex */
|
||||
printf("100BT FD\n");
|
||||
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (stat1 & KS8721_10BASE_T_FD) {
|
||||
/* set MII for 10BaseT and Full Duplex */
|
||||
printf("10BT FD\n");
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_FD;
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (stat1 & KS8721_100BASE_T4_HD) {
|
||||
/* set MII for 100BaseTX and Half Duplex */
|
||||
printf("100BT HD\n");
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_SPD;
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (stat1 & KS8721_10BASE_T_HD) {
|
||||
/* set MII for 10BaseT and Half Duplex */
|
||||
printf("10BT HD\n");
|
||||
p_mac->EMAC_CFG &= ~(AT91C_EMAC_SPD | AT91C_EMAC_FD);
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* ks8721_initphy
|
||||
* Description:
|
||||
* MAC starts checking its link by using parallel detection and
|
||||
* Autonegotiation and the same is set in the MAC configuration registers
|
||||
* Arguments:
|
||||
* p_mac - pointer to struct AT91S_EMAC
|
||||
* Return value:
|
||||
* 1 - if link status set succesfully
|
||||
* 0 - if link status not set
|
||||
*/
|
||||
unsigned char ks8721_initphy(AT91PS_EMAC p_mac)
|
||||
{
|
||||
unsigned char ret = 1;
|
||||
unsigned short intvalue;
|
||||
|
||||
at91rm9200_EmacEnableMDIO(p_mac);
|
||||
|
||||
/* Try another time */
|
||||
if (!ks8721_getlinkspeed(p_mac))
|
||||
ret = ks8721_getlinkspeed(p_mac);
|
||||
|
||||
/* Disable PHY Interrupts */
|
||||
intvalue = 0;
|
||||
at91rm9200_EmacWritePhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_MDINTR, &intvalue);
|
||||
at91rm9200_EmacDisableMDIO(p_mac);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Name:
|
||||
* ks8721_autonegotiate
|
||||
* Description:
|
||||
* MAC Autonegotiates with the partner status of same is set in the
|
||||
* MAC configuration registers
|
||||
* Arguments:
|
||||
* dev - pointer to struct net_device
|
||||
* Return value:
|
||||
* 1 - if link status set successfully
|
||||
* 0 - if link status not set
|
||||
*/
|
||||
unsigned char ks8721_autonegotiate(AT91PS_EMAC p_mac, int *status)
|
||||
{
|
||||
unsigned short value;
|
||||
unsigned short phyanar;
|
||||
unsigned short phyanalpar;
|
||||
|
||||
/* Set ks8721 control register */
|
||||
if (!at91rm9200_EmacReadPhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value))
|
||||
return 0;
|
||||
|
||||
/* remove autonegotiation enable */
|
||||
value &= ~KS8721_AUTONEG;
|
||||
/* Electrically isolate PHY */
|
||||
value |= KS8721_ISOLATE;
|
||||
if (!at91rm9200_EmacWritePhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) {
|
||||
return 0;
|
||||
}
|
||||
/*
|
||||
* Set the Auto_negotiation Advertisement Register
|
||||
* MII advertising for Next page, 100BaseTxFD and HD,
|
||||
* 10BaseTFD and HD, IEEE 802.3
|
||||
*/
|
||||
phyanar = KS8721_NP | KS8721_TX_FDX | KS8721_TX_HDX |
|
||||
KS8721_10_FDX | KS8721_10_HDX | KS8721_AN_IEEE_802_3;
|
||||
if (!at91rm9200_EmacWritePhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_ANAR, &phyanar)) {
|
||||
return 0;
|
||||
}
|
||||
/* Read the Control Register */
|
||||
if (!at91rm9200_EmacReadPhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) {
|
||||
return 0;
|
||||
}
|
||||
value |= KS8721_SPEED_SELECT | KS8721_AUTONEG | KS8721_DUPLEX_MODE;
|
||||
if (!at91rm9200_EmacWritePhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) {
|
||||
return 0;
|
||||
}
|
||||
/* Restart Auto_negotiation */
|
||||
value |= KS8721_RESTART_AUTONEG;
|
||||
value &= ~KS8721_ISOLATE;
|
||||
if (!at91rm9200_EmacWritePhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_BMCR, &value)) {
|
||||
return 0;
|
||||
}
|
||||
/* Check AutoNegotiate complete */
|
||||
udelay(10000);
|
||||
at91rm9200_EmacReadPhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_BMSR, &value);
|
||||
if (!(value & KS8721_AUTONEG_COMP))
|
||||
return 0;
|
||||
|
||||
/* Get the AutoNeg Link partner base page */
|
||||
if (!at91rm9200_EmacReadPhy(p_mac,
|
||||
CONFIG_PHY_ADDRESS | KS8721_ANLPAR, &phyanalpar)) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
if ((phyanar & KS8721_TX_FDX) && (phyanalpar & KS8721_TX_FDX)) {
|
||||
/* Set MII for 100BaseTX and Full Duplex */
|
||||
p_mac->EMAC_CFG |= AT91C_EMAC_SPD | AT91C_EMAC_FD;
|
||||
return 1;
|
||||
}
|
||||
|
||||
if ((phyanar & KS8721_10_FDX) && (phyanalpar & KS8721_10_FDX)) {
|
||||
/* Set MII for 10BaseT and Full Duplex */
|
||||
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
|
||||
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
|
||||
| AT91C_EMAC_FD;
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_CMD_NET */
|
||||
|
||||
#endif /* CONFIG_DRIVER_ETHER */
|
||||
|
|
@ -0,0 +1,228 @@
|
|||
/*
|
||||
* CPUAT91 by (C) Copyright 2006 Eric Benard
|
||||
* eric@eukrea.com
|
||||
*
|
||||
* Configuration settings for the CPUAT91 board.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#ifdef CONFIG_CPUAT91_RAM
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT 1
|
||||
#define CONFIG_SKIP_RELOCATE_UBOOT 1
|
||||
#define CONFIG_CPUAT91 1
|
||||
#else
|
||||
#define CONFIG_BOOTDELAY 1
|
||||
#endif
|
||||
|
||||
#define AT91C_MAIN_CLOCK 179712000
|
||||
#define AT91C_MASTER_CLOCK 59904000
|
||||
|
||||
#define AT91_SLOW_CLOCK 32768
|
||||
|
||||
#define CONFIG_ARM920T 1
|
||||
#define CONFIG_AT91RM9200 1
|
||||
|
||||
#undef CONFIG_USE_IRQ
|
||||
#define USE_920T_MMU 1
|
||||
|
||||
#define CONFIG_CMDLINE_TAG 1
|
||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||||
#define CONFIG_INITRD_TAG 1
|
||||
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
|
||||
/* flash */
|
||||
#define CONFIG_SYS_MC_PUIA_VAL 0x00000000
|
||||
#define CONFIG_SYS_MC_PUP_VAL 0x00000000
|
||||
#define CONFIG_SYS_MC_PUER_VAL 0x00000000
|
||||
#define CONFIG_SYS_MC_ASR_VAL 0x00000000
|
||||
#define CONFIG_SYS_MC_AASR_VAL 0x00000000
|
||||
#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
|
||||
#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
|
||||
|
||||
/* clocks */
|
||||
#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
|
||||
#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz for USB */
|
||||
#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock */
|
||||
|
||||
/* sdram */
|
||||
#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as D16/D31 */
|
||||
#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
|
||||
#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
|
||||
#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
|
||||
#define CONFIG_SYS_SDRC_CR_VAL 0x2188C155 /* set up the SDRAM */
|
||||
#define CONFIG_SYS_SDRAM 0x20000000 /* address of the SDRAM */
|
||||
#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the SDRAM */
|
||||
#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to SDRAM */
|
||||
#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
|
||||
#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
|
||||
#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
|
||||
#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
|
||||
#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
||||
|
||||
/* define one of these to choose the DBGU, USART0 or USART1 as console */
|
||||
#define CONFIG_AT91RM9200_USART 1
|
||||
#define CONFIG_DBGU 1
|
||||
#undef CONFIG_USART0
|
||||
#undef CONFIG_USART1
|
||||
|
||||
#define CONFIG_HARD_I2C 1
|
||||
|
||||
#if defined(CONFIG_HARD_I2C)
|
||||
#define CONFIG_SYS_I2C_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
|
||||
#endif
|
||||
|
||||
#define CONFIG_BOOTP_BOOTFILESIZE 1
|
||||
#define CONFIG_BOOTP_BOOTPATH 1
|
||||
#define CONFIG_BOOTP_GATEWAY 1
|
||||
#define CONFIG_BOOTP_HOSTNAME 1
|
||||
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#define CONFIG_CMD_DHCP 1
|
||||
#define CONFIG_CMD_PING 1
|
||||
#define CONFIG_CMD_MII 1
|
||||
#define CONFIG_CMD_CACHE 1
|
||||
#undef CONFIG_CMD_USB
|
||||
#undef CONFIG_CMD_FPGA
|
||||
#undef CONFIG_CMD_IMI
|
||||
#undef CONFIG_CMD_LOADS
|
||||
#undef CONFIG_CMD_NFS
|
||||
|
||||
#if defined(CONFIG_HARD_I2C)
|
||||
#define CONFIG_CMD_EEPROM 1
|
||||
#define CONFIG_CMD_I2C 1
|
||||
#endif
|
||||
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define PHYS_SDRAM 0x20000000
|
||||
#define PHYS_SDRAM_SIZE 0x02000000
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
|
||||
#define CONFIG_SYS_MEMTEST_END \
|
||||
(CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 512 * 1024)
|
||||
|
||||
#define CONFIG_DRIVER_ETHER 1
|
||||
#define CONFIG_NET_RETRY_COUNT 20
|
||||
#define CONFIG_AT91C_USE_RMII 1
|
||||
#define CONFIG_PHY_ADDRESS (1 << 5)
|
||||
#define CONFIG_KS8721_PHY 1
|
||||
|
||||
#define CONFIG_SYS_FLASH_CFI 1
|
||||
#define CONFIG_FLASH_CFI_DRIVER 1
|
||||
#define CONFIG_SYS_FLASH_EMPTY_INFO 1
|
||||
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1
|
||||
#define CONFIG_SYS_FLASH_PROTECTION 1
|
||||
#define PHYS_FLASH_1 0x10000000
|
||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 128
|
||||
|
||||
#if defined(CONFIG_CMD_USB)
|
||||
#define CONFIG_USB_OHCI_NEW 1
|
||||
#define CONFIG_USB_STORAGE 1
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
#define CONFIG_AT91C_PQFP_UHPBU 1
|
||||
#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
|
||||
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
|
||||
#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
|
||||
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200"
|
||||
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
|
||||
#endif
|
||||
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
||||
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x20000)
|
||||
#define CONFIG_ENV_SIZE 0x20000
|
||||
#define CONFIG_ENV_SECT_SIZE 0x20000
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x21000000
|
||||
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
|
||||
|
||||
#define CONFIG_SYS_PROMPT "CPUAT91=> "
|
||||
#define CONFIG_SYS_CBSIZE 256
|
||||
#define CONFIG_SYS_MAXARGS 32
|
||||
#define CONFIG_SYS_PBSIZE \
|
||||
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
#define CONFIG_CMDLINE_EDITING 1
|
||||
#define CONFIG_SYS_LONGHELP 1
|
||||
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
|
||||
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
|
||||
#define CONFIG_SYS_GBL_DATA_SIZE 128
|
||||
#define CONFIG_STACKSIZE (32 * 1024)
|
||||
|
||||
#if defined(CONFIG_USE_IRQ)
|
||||
#error CONFIG_USE_IRQ not supported
|
||||
#endif
|
||||
|
||||
#define CONFIG_DEVICE_NULLDEV 1
|
||||
#define CONFIG_SILENT_CONSOLE 1
|
||||
|
||||
#define CONFIG_AUTOBOOT_KEYED 1
|
||||
#define CONFIG_AUTOBOOT_PROMPT \
|
||||
"Press SPACE to abort autoboot in %d seconds\n"
|
||||
#define CONFIG_AUTOBOOT_STOP_STR " "
|
||||
#define CONFIG_AUTOBOOT_DELAY_STR "d"
|
||||
|
||||
#define CONFIG_VERSION_VARIABLE 1
|
||||
|
||||
#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
|
||||
#define MTDPARTS_DEFAULT \
|
||||
"mtdparts=physmap-flash.0:" \
|
||||
"128k(u-boot)ro," \
|
||||
"128k(u-boot-env)," \
|
||||
"1408k(kernel)," \
|
||||
"-(rootfs)"
|
||||
|
||||
#define CONFIG_BOOTARGS \
|
||||
"root=/dev/mtdblock3 rootfstype=jffs2 console=ttyS0,115200"
|
||||
|
||||
#define CONFIG_BOOTCOMMAND "run flashboot"
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"mtdid=" MTDIDS_DEFAULT "\0" \
|
||||
"mtdparts=" MTDPARTS_DEFAULT "\0" \
|
||||
"flub=tftp 21000000 cpuat91/u-boot.bin; protect off 10000000 " \
|
||||
"1001FFFF; erase 10000000 1001FFFF; cp.b 21000000 " \
|
||||
"10000000 ${filesize}\0" \
|
||||
"flui=tftp 21000000 cpuat91/uImage; protect off 10040000 " \
|
||||
"1019ffff; erase 10040000 1019ffff; cp.b 21000000 " \
|
||||
"10040000 ${filesize}\0" \
|
||||
"flrfs=tftp 21000000 cpuat91/rootfs.jffs2; protect off " \
|
||||
"101a0000 10ffffff; erase 101a0000 10ffffff; cp.b " \
|
||||
"21000000 101A0000 ${filesize}\0" \
|
||||
"ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \
|
||||
"flashboot=run ramargs;bootm 10040000\0" \
|
||||
"netboot=run ramargs;tftpboot 21000000 cpuat91/uImage;" \
|
||||
"bootm 21000000\0"
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
/*
|
||||
* NOTE: MICREL ethernet Physical layer
|
||||
*
|
||||
* Version: KS8721.h
|
||||
*
|
||||
* Authors: Eric Benard (based on dm9161.h)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
/* MICREL PHYSICAL LAYER TRANSCEIVER KS8721 */
|
||||
|
||||
#define KS8721_BMCR 0
|
||||
#define KS8721_BMSR 1
|
||||
#define KS8721_PHYID1 2
|
||||
#define KS8721_PHYID2 3
|
||||
#define KS8721_ANAR 4
|
||||
#define KS8721_ANLPAR 5
|
||||
#define KS8721_ANER 6
|
||||
#define KS8721_RECR 15
|
||||
#define KS8721_MDINTR 27
|
||||
#define KS8721_100BT 31
|
||||
|
||||
/* --Bit definitions: KS8721_BMCR */
|
||||
#define KS8721_RESET (1 << 15)
|
||||
#define KS8721_LOOPBACK (1 << 14)
|
||||
#define KS8721_SPEED_SELECT (1 << 13)
|
||||
#define KS8721_AUTONEG (1 << 12)
|
||||
#define KS8721_POWER_DOWN (1 << 11)
|
||||
#define KS8721_ISOLATE (1 << 10)
|
||||
#define KS8721_RESTART_AUTONEG (1 << 9)
|
||||
#define KS8721_DUPLEX_MODE (1 << 8)
|
||||
#define KS8721_COLLISION_TEST (1 << 7)
|
||||
#define KS8721_DISABLE (1 << 0)
|
||||
|
||||
/*--Bit definitions: KS8721_BMSR */
|
||||
#define KS8721_100BASE_T4 (1 << 15)
|
||||
#define KS8721_100BASE_TX_FD (1 << 14)
|
||||
#define KS8721_100BASE_T4_HD (1 << 13)
|
||||
#define KS8721_10BASE_T_FD (1 << 12)
|
||||
#define KS8721_10BASE_T_HD (1 << 11)
|
||||
#define KS8721_MF_PREAMB_SUPPR (1 << 6)
|
||||
#define KS8721_AUTONEG_COMP (1 << 5)
|
||||
#define KS8721_REMOTE_FAULT (1 << 4)
|
||||
#define KS8721_AUTONEG_ABILITY (1 << 3)
|
||||
#define KS8721_LINK_STATUS (1 << 2)
|
||||
#define KS8721_JABBER_DETECT (1 << 1)
|
||||
#define KS8721_EXTEND_CAPAB (1 << 0)
|
||||
|
||||
/*--Bit definitions: KS8721_PHYID */
|
||||
#define KS8721_PHYID_OUI 0x0885
|
||||
#define KS8721_LSB_MASK 0x3F
|
||||
|
||||
#define KS8721BL_MODEL 0x21
|
||||
#define KS8721_MODELMASK 0x3F0
|
||||
#define KS8721BL_REV 0x9
|
||||
#define KS8721_REVMASK 0xF
|
||||
|
||||
/*--Bit definitions: KS8721_ANAR, KS8721_ANLPAR */
|
||||
#define KS8721_NP (1 << 15)
|
||||
#define KS8721_ACK (1 << 14)
|
||||
#define KS8721_RF (1 << 13)
|
||||
#define KS8721_PAUSE (1 << 10)
|
||||
#define KS8721_T4 (1 << 9)
|
||||
#define KS8721_TX_FDX (1 << 8)
|
||||
#define KS8721_TX_HDX (1 << 7)
|
||||
#define KS8721_10_FDX (1 << 6)
|
||||
#define KS8721_10_HDX (1 << 5)
|
||||
#define KS8721_AN_IEEE_802_3 0x0001
|
||||
|
||||
/****************** function prototypes **********************/
|
||||
unsigned int ks8721_isphyconnected(AT91PS_EMAC p_mac);
|
||||
unsigned char ks8721_getlinkspeed(AT91PS_EMAC p_mac);
|
||||
unsigned char ks8721_autonegotiate(AT91PS_EMAC p_mac, int *status);
|
||||
unsigned char ks8721_initphy(AT91PS_EMAC p_mac);
|
||||
Loading…
Reference in New Issue