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clk: at91: clk-master: add 5th divisor for mck master 

clk-master can have 5 divisors with a field width of 3 bits
on some products.

Change the mask and number of divisors accordingly.

Reported-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
This commit is contained in:
Eugen Hristev 2020-07-01 10:42:58 +03:00
parent db228c5b46
commit dff3904254
2 changed files with 2 additions and 2 deletions
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2
drivers/clk/at91/clk-master.c
View File

@ -24,7 +24,7 @@
#define MASTER_PRES_MASK 0x7
#define MASTER_PRES_MAX MASTER_PRES_MASK
#define MASTER_DIV_SHIFT 8
#define MASTER_DIV_MASK 0x3
#define MASTER_DIV_MASK 0x7
#define PMC_MCR 0x30
#define PMC_MCR_ID_MSK GENMASK(3, 0)

2
drivers/clk/at91/pmc.h
View File

@ -30,7 +30,7 @@ extern const struct clk_master_layout at91sam9x5_master_layout;
struct clk_master_characteristics {
struct clk_range output;
u32 divisors[4];
u32 divisors[5];
u8 have_div3_pres;
};