powerpc, mpc83xx: add DDR SDRAM Timing Configuration 3 definitions
Signed-off-by: Heiko Schocher <hs@denx.de> Added its mask, too, for intra-file consistency. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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				|  | @ -1053,6 +1053,12 @@ | ||||||
| #define TIMING_CFG2_FOUR_ACT		0x0000003F | #define TIMING_CFG2_FOUR_ACT		0x0000003F | ||||||
| #define TIMING_CFG2_FOUR_ACT_SHIFT	0 | #define TIMING_CFG2_FOUR_ACT_SHIFT	0 | ||||||
| 
 | 
 | ||||||
|  | /*
 | ||||||
|  |  * TIMING_CFG_3 - DDR SDRAM Timing Configuration 3 | ||||||
|  |  */ | ||||||
|  | #define TIMING_CFG3_EXT_REFREC		0x00070000 | ||||||
|  | #define TIMING_CFG3_EXT_REFREC_SHIFT	16 | ||||||
|  | 
 | ||||||
| /*
 | /*
 | ||||||
|  * DDR_SDRAM_CFG - DDR SDRAM Control Configuration |  * DDR_SDRAM_CFG - DDR SDRAM Control Configuration | ||||||
|  */ |  */ | ||||||
|  |  | ||||||
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