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Fix merge problems 

Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese 2008-08-06 14:05:38 +02:00
parent 9246f5ecfd
commit f2302d4430
132 changed files with 1173 additions and 1771 deletions
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7
.gitignore vendored
View File

@ -26,6 +26,8 @@
/u-boot.ldr
/u-boot.ldr.hex
/u-boot.ldr.srec
/u-boot-onenand.bin
/u-boot-flexonenand.bin
#
# Generated files
@ -46,3 +48,8 @@ series
# cscope files
cscope.*
# OneNAND IPL files
/onenand_ipl/onenand-ipl*
/onenand_ipl/board/*/onenand*
/onenand_ipl/board/*/*.S

550
CHANGELOG
View File

@ -1,3 +1,553 @@
commit a48311557db6e7e9473a6163b44bb1e6c6ed64c4
Author: Mark Jackson <mpfj@mimc.co.uk>
Date: Thu Jul 31 16:09:00 2008 +0100
Add gzipped logo support
The README file states that CONFIG_VIDEO_BMP_GZIP behaves as follows:
If this option is set, additionally to standard BMP
images, gzipped BMP images can be displayed via the
splashscreen support or the bmp command.
However, the splashscreen function *only* supports standard BMP images.
This patch adds the documented gzip support.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
commit a5bcb01fbde6b1f1c9863cd86e5c4c369f0121ac
Author: Mark Jackson <mpfj@mimc.co.uk>
Date: Thu Jul 31 15:56:48 2008 +0100
Fix Atmel LCD controller endianess for AVR32 processors
The Atmel lcd controller is used on Atmel's AT91 (little endian) and
AVR32 (big endian) platforms.
As such, the controller can handle both big and little endian memory.
This patch fixes the driver for the AVR32 platform.
Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
commit cdb8bd2fd3bcbe65d8e4334a55f5a667845426a1
Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Thu Jul 31 15:56:01 2008 +0200
apollon: fix build out of tree
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
commit 2e752be39d3e398d4ab89ffa6634c397df298297
Author: Guennadi Liakhovetski <lg@denx.de>
Date: Thu Jul 31 12:35:04 2008 +0200
Uncompressed images loaded to their start address shall set load_end too
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Acked-by: Bartlomiej Sieka <tur@semihalf.com>
commit c37207d7f51e19c17f859966f314e27cc1231801
Author: Wolfgang Denk <wd@denx.de>
Date: Wed Jul 16 16:38:59 2008 +0200
Fix printf() format problems with configurable prompts
U-Boot allows for configurable prompt strings using the
CONFIG_AUTOBOOT_PROMPT resp. CONFIG_MENUPROMPT definitions. So far,
the assumption was that any such user defined problts would contain
exactly one "%d" format specifier. But some boards did not.
To allow for flexible boot prompts without adding too complex code we
now allow to specify the whole list of printf() arguments in the user
definition. This is powerful, but requires a responsible user who
really understands what he is doing, as he needs to know for exanple
which variables are available in the respective context.
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit 54754120637b6a7f4ff774fb199fc550bcfea1da
Author: Wolfgang Denk <wd@denx.de>
Date: Thu Jul 31 17:02:14 2008 +0200
TQM85xx: fix typo introduce by commit ffbb5cb9
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit 0b4951d4cddca9cc800745891c95b291e47cbbd7
Author: Wolfgang Denk <wd@denx.de>
Date: Thu Jul 31 15:27:01 2008 +0200
mvbc_p board: fix most build warnings.
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit c4ec6db074051d2f6fc76a66411c60621b22bc02
Author: Wolfgang Denk <wd@denx.de>
Date: Thu Jul 31 13:57:20 2008 +0200
E1000: clean up CONFIG_E1000_FALLBACK_MAC handling
Avoid "integer constant is too large for 'long' type" warnings.
And simplify the code.
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit 9196b44334c330cc13de2464c59181e4db71f549
Author: Matvejchikov Ilya <matvejchikov@gmail.com>
Date: Wed Jul 30 23:21:19 2008 +0400
8260: Making the use of gd->pci_clk dependant on the CONFIG_PCI
Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
commit 6361ad4b596f5a940a01c91ae0297d98f790cbe0
Author: Matvejchikov Ilya <matvejchikov@gmail.com>
Date: Wed Jul 30 23:20:32 2008 +0400
PPC: Add pci_clk in the global_data for CPM2 processors
This patch adds pci_clk field to the global_data structure for the
processors which have CPM2 module in case the CONFIG_PCI is defined.
Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
commit f0ff885ca64655bee6540eb8a25eed90b1152686
Author: Kumar Gala <galak@kernel.crashing.org>
Date: Wed Jul 30 14:13:30 2008 -0500
mpc85xx: Update linker scripts for Freescale boards
* Move to using absolute addressing always. Makes the scripts a bit more
portable and common
* Moved .bss after the end of the image. These allows us to have more
room in the resulting binary image for code and data.
* Removed .text object files that aren't really needed
* Make sure _end is 4-byte aligned as the .bss init code expects this.
(Its possible that the end of .bss isn't 4-byte aligned)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
commit 57c219ad5d34dd9d49991777a62e3899595f2ec7
Author: Kumar Gala <galak@kernel.crashing.org>
Date: Wed Jul 30 08:01:15 2008 -0500
Fix compile warnings in dlmalloc
The origional code was using on odd reference to get to the first
real element in av_[]. The first two elements of the array are
not used for actual bins, but for house keeping. If we are more
explicit about how use the first few elements we can get rid of the
warnings:
dlmalloc.c: In function 'malloc_extend_top':
dlmalloc.c:1971: warning: dereferencing type-punned pointer will break strict-aliasing rules
dlmalloc.c:1999: warning: dereferencing type-punned pointer will break strict-aliasing rules
dlmalloc.c:2029: warning: dereferencing type-punned pointer will break strict-aliasing rules
...
The logic of how this code came to be is:
bin_at(0) = (char*)&(av_[2]) - 2*SIZE_SZ
SIZE_SZ is the size of pointer, and av_ is arry of pointers so:
bin_at(0) = &(av_[0])
Going from there to bin_at(0)->fd or bin_at(0)->size should be straight forward.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
commit 3f9ae1a5d43c49a8ecf497470c3d1d80255e44b9
Author: Stefan Roese <sr@denx.de>
Date: Wed Jul 30 10:21:01 2008 +0200
ppc4xx: Fix W7OLMG compile problems by adding missing LM75 defines
Signed-off-by: Stefan Roese <sr@denx.de>
commit ebb86c4ecd37a7701358284e497ca4c6483c7cc5
Author: Stefan Roese <sr@denx.de>
Date: Wed Jul 30 09:59:51 2008 +0200
cmd_bootm.c: Fix problem with '#if (CONFIG_CMD_USB)'
A recent patch used '#if (CONFIG_CMD_USB)' instead of
'#if defined(CONFIG_CMD_USB)'. This patch fixes this problem and makes
common/bootm.c compile again.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Markus Klotzbuecher <mk@denx.de>
commit 2cb9080427fe641dcb71da46cd0634dd406f37ed
Author: Kyungmin Park <kmpark@infradead.org>
Date: Tue Jul 22 08:01:43 2008 +0900
Remove unused I2C at apollon board
There are no I2C devices on this board.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
commit 3c95960e526b3b026da20201db64526f46faf14b
Author: Wolfgang Denk <wd@denx.de>
Date: Thu Jul 31 10:12:09 2008 +0200
at91rm9200dk, csb637: fix NAND related build problems
Tried fixing NAND support for the at91rm9200dk board; untested.
Disabled NAND support in the csb637 board config file.
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit 09d318a8bb1444ec92e31cafcdba877eb9409e58
Author: Kumar Gala <galak@kernel.crashing.org>
Date: Tue Jul 29 12:23:49 2008 -0500
fsl_i2c: Use timebase timer functions instead of get_timer()
The current implementation of get_timer() is only really useful after we
have relocated u-boot to memory. The i2c code is used before that as part
of the SPD DDR setup.
We actually have a bug when using the get_timer() code before relocation
because the .bss hasn't been setup and thus we could be reading/writing
a random location (probably in flash).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
commit 4fc72a0d6ca85070a5e90d76cc5a853526ac09c4
Author: Frank Svendsbøe <frank.svendsboe@gmail.com>
Date: Tue Jul 29 14:49:31 2008 +0200
Adder8xx: Fix CFG_MONITOR_LEN
Due to increased space usage, U-Boot can no longer be stored in three sectors.
The current U-Boot use just over three flash sectors (197k), and U-Boot will
become corrupt after saving environment variables. This patch adds another 64k
to CFG_MONITOR_LEN.
Signed-off-by: Frank E. Svendsbøe <frank.svendsboe@gmail.com>
commit a4c59ad4a21140550ada6f97690d2527c4146ce5
Author: Kyungmin Park <kmpark@infradead.org>
Date: Tue Jul 29 08:47:57 2008 +0900
Add OneNAND IPL related files to gitignore
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
commit 8d87589e8e874df7120a3d9667f051bc33bac250
Author: Rafal Jaworowski <raj@semihalf.com>
Date: Mon Jul 28 20:38:25 2008 +0200
API: Teach the storage layer about SATA and MMC options.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
commit 6b73b754f782e1ecce5048bf20b22ce56a07a5b8
Author: Rafal Jaworowski <raj@semihalf.com>
Date: Mon Jul 28 20:37:48 2008 +0200
API: Dump contents of sector 0 in the demo application.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
commit 13ca6305f2eba49c175f6370c35286141059c789
Author: Rafal Jaworowski <raj@semihalf.com>
Date: Mon Jul 28 20:37:10 2008 +0200
API: Correct storage enumeration routine, other minor fixes in API storage area.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
commit 05c7fe0f049b1c9eb9a1992f27e5e350d865f4a8
Author: Rafal Jaworowski <raj@semihalf.com>
Date: Mon Jul 28 20:36:19 2008 +0200
API: Fix compilation warnings in api_examples/demo.c.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
commit c14eefcc48212af2f3314809605698dd8393a90a
Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Sun Jul 27 17:09:43 2008 +0200
Fix more printf() format warnings
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
commit 936897d4d1365452bbbdf8430db5e7769ef08d38
Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Fri Jul 25 15:18:16 2008 +0200
Fix remaining CFG_CMD_ define, ifdef and comments
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
commit 5d1d00fb36005482e1803a00ddc46efa11d719af
Author: Stefano Babic <sbabic@denx.de>
Date: Fri Jul 25 08:57:40 2008 +0200
Add include for config.h in command.h.
Because the cmd_tbl_s structure depends on the configuration file, it
must be assured that config.h is included before the structure is
evaluated by the compiler. If this is not certain, it could happen
that the compiler generates structures of different size, depending
on the fact if the source file includes <config.h> before or after
<command.h>.
The effect is that u-boot crashes when tries to relocate the command
table (for ppc) or try to access to the command table for other
architectures.
The problem can happen on board-depending commands. All general
commands under /common are unaffected, because they include already
config.h before command.h.
Signed-off-by: Stefano Babic <sbabic@denx.de>
commit 2dacb734bac9dba1db9e704d3e0b200ef521c79a
Author: Scott Wood <scottwood@freescale.com>
Date: Wed Jul 23 13:16:06 2008 -0500
NAND: $(obj)-qualify ecc.h in kilauea NAND boot Makefile.
This fixes building out-of-tree.
Signed-off-by: Scott Wood <scottwood@freescale.com>
commit 36d59bd9da9e15d19b867b48449408830f4e2ad5
Author: Heiko Schocher <hs@denx.de>
Date: Wed Jul 23 07:30:46 2008 +0200
Fix warnings if compiling with IDE support.
cmd_ide.c:827: Warnung: weak declaration of `ide_outb' after first use results in unspecified behavior
cmd_ide.c:839: Warnung: weak declaration of `ide_inb' after first use results in unspecified behavior
Signed-off-by: Heiko Schocher <hs@denx.de>
commit 7610db17fd4d59c51d825488526d85ede2f06767
Author: Adrian Filipi <adrian.filipi@eurotech.com>
Date: Tue Jul 22 14:28:11 2008 -0400
Removed support for the adsvix board.
Support for the adsvix was originally provided by Applied Data
Systems (ADS), inc., now EuroTech, Inc.
The board never shipped aside from some sample boards.
Signed-off-by: Adrian Filipi <adrian.filipi@eurotech.com>
commit f96b44cef897bd372beb86dde1b33637c119d84d
Author: Remy Bohmer <linux@bohmer.net>
Date: Tue Jul 22 16:22:11 2008 +0200
ARM: set GD_FLG_RELOC for boards skipping relocation to RAM
If CONFIG_SKIP_RELOCATE_UBOOT is set the flag GD_FLG_RELOC is usually
never set, because relocation to RAM is actually never done by U-boot
itself. However, several pieces of code check if this flag is set at
some time.
So, to make sure this flag is set on boards skipping relocation, this
is added to the initialisation of U-boot at a moment where it is safe
to do so.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
commit e4dafff86f289b5677143a3e41da7b45c6d27fc7
Author: Timur Tabi <timur@freescale.com>
Date: Mon Jul 21 14:26:23 2008 -0500
fsl-i2c: fix writes to data segment before relocation
Prevent i2c_init() in fsl_i2c.c from writing to the data segment before
relocation. Commit d8c82db4 added the ability for i2c_init() to program the
I2C bus speed and save the value in i2c_bus_speed[], which is a global
variable. It is an error to write to the data segment before relocation,
which is what i2c_init() does when it stores the bus speed in i2c_bus_speed[].
Signed-off-by: Timur Tabi <timur@freescale.com>
commit dbd32387920e5ad6f9dd58a7b5012bbabe2a6a21
Author: Wolfgang Ocker <weo@reccoware.de>
Date: Mon Jul 28 16:56:51 2008 +0200
mips: Fix baudrate divisor computation on alchemy cpus
Use CFG_MIPS_TIMER_FREQ when computing the baudrate divisor
on alchemy cpus.
Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
commit a229d291f33308ab7761d39f25fa1a53c0fc00a2
Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Date: Wed Jul 23 10:55:46 2008 +0200
spi flash: Fix printf() format warnings
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
commit 252a5e0738bcafaf25f7fbb40f19a59abc2cb13e
Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Date: Wed Jul 23 10:55:31 2008 +0200
atmel_mci: Fix printf() format warnings
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
commit 7f4b009f4232d57084ce0ec5aeb3b57bccb08e4c
Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Date: Wed Jul 23 10:55:15 2008 +0200
avr32: Fix printf() format warnings
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
commit a79c3e8d9c31db25d5ca3ec8e08a97f323410dd4
Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Date: Wed Jul 23 10:52:19 2008 +0200
avr32: asm/io.h needs asm/types.h
map_physmem() takes a phys_addr_t as parameter. This type is defined in
asm/types.h, so we need to include that file.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
commit 1953d128fd07f07d1c3810a28c0863ea64dae1b6
Author: Michal Simek <monstr@monstr.eu>
Date: Thu Jul 17 12:25:46 2008 +0200
microblaze: Fix printf() format issues
Signed-off-by: Michal Simek <monstr@monstr.eu>
commit de2a07e534f18b1ca5f9869a4ef0604ca829cff0
Author: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
Date: Thu Jul 17 07:27:51 2008 +0530
Remove unused code from lib_arm/bootm.c
Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
commit ffbb5cb942e9856fa24e946977e0a60c64df04ab
Author: Detlev Zundel <dzu@denx.de>
Date: Wed Jul 16 18:56:45 2008 +0200
tqm85xx: Demystify 'DK: !!!' comment
Signed-off-by: Detlev Zundel <dzu@denx.de>
commit b2f44ba570f3a01113bbb745daf46f3858d22f53
Author: Detlev Zundel <dzu@denx.de>
Date: Wed Jul 16 18:56:44 2008 +0200
83xx/85xx/86xx: Add LTEDR local bus definitions
Signed-off-by: Detlev Zundel <dzu@denx.de>
commit f13f64cf42d5abec3e0f920233f6a7a61e7ae494
Author: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Date: Wed Jul 16 16:22:32 2008 +0200
serial_xuartlite.c: fix compiler warnings
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@uam.es>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
commit 86446d3a5d9d3ca81e85d1ccd3accaaae6f8e3c9
Author: Stefan Roese <sr@denx.de>
Date: Fri Jul 18 11:03:35 2008 +0200
POST: Add disable interrupts in some of the missing CPU POST tests
Some CPU POST tests did not disable the interrupts while running. This
seems to be necessary to protect this self modifying code.
Signed-off-by: Stefan Roese <sr@denx.de>
commit 97a3bf268d096e0e97e54048448c35114edcf557
Author: Stefan Roese <sr@denx.de>
Date: Fri Jul 18 10:43:24 2008 +0200
ide: Use CFG_64BIT_LBA instead of CFG_64BIT_STRTOUL
This is needed for boards that define CFG_64BIT_STRTOUL but don't define
CFG_64BIT_LBA.
Signed-off-by: Stefan Roese <sr@denx.de>
commit 0043ac55024963295fc79b39af85b6dc3b261e17
Author: Niklaus Giger <niklaus.giger@netstal.com>
Date: Fri Jul 18 11:22:23 2008 +0200
POST PPC4xx/spr IVPR only if PPC440
The SPR IVPR register is only present (as far as I know) for
processors with a PPC440 core.
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Acked-by: Stefan Roese <sr@denx.de>
commit 1092fbd64748dfa2e979b102611ece9bc5ec1855
Author: Stefan Roese <sr@denx.de>
Date: Fri Jul 18 10:42:29 2008 +0200
ppc4xx: Enable 64bit printf format on 440/460 platforms
This patch defines CFG_64BIT_VSPRINTF and CFG_64BIT_STRTOUL for all
440/460 platforms. This may be needed since those platforms support
36bit physical address space.
Signed-off-by: Stefan Roese <sr@denx.de>
commit 66fe183b1dd9c7534605147a8ecfed1c02345ee5
Author: Stefan Roese <sr@denx.de>
Date: Fri Jul 18 15:57:23 2008 +0200
ppc4xx: Fix incorrect MODTx setup for some DIMM configurations
This patch fixes a problem with incorrect MODTx (On Die Termination)
setup for a configuration with multiple DIMM's and multiple ranks.
Without this change Katmai was unable to boot Linux with DDR2 frequency
>= 533MHz and mem>=3GB. With this patch Katmai successfully boots Linux
with DDR2 frequency = 640MHz and mem=4GB.
Signed-off-by: Stefan Roese <sr@denx.de>
commit 340ccb260f21516be360745d5c5e3bd0657698df
Author: Sebastian Siewior <bigeasy@linutronix.de>
Date: Wed Jul 16 20:04:49 2008 +0200
cfi_flash: fix flash on BE machines with CFG_WRITE_SWAPPED_DATA
This got broken by commits 93c56f212c
[cfi_flash: support of long cmd in U-boot.]
That command needs to be in little endian format on BE machines
with CFG_WRITE_SWAPPED_DATA. Without this patch, the command 0xf0
gets saved on stack as 0x00 00 00 f0 and 0x00 gets written into
the cmdbuf in case portwidth = chipwidth = 8bit.
Cc: Alexey Korolev <akorolev@infradead.org>
Cc: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
commit 699f05125509249072a0b865c8d35520d97cd501
Author: Wolfgang Denk <wd@denx.de>
Date: Tue Jul 15 22:22:44 2008 +0200
Prepare v1.3.4-rc1: Code cleanup, update CHANGELOG, sort Makefile
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit bcab74baa6b1b1c969038ab6f64a186239180405
Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Date: Tue Jul 15 11:23:02 2008 -0400

1
MAKEALL
View File

@ -543,7 +543,6 @@ LIST_at91=" \
#########################################################################
LIST_pxa=" \
adsvix \
cerf250 \
cradle \
csb226 \

9
Makefile
View File

@ -24,7 +24,7 @@
VERSION = 1
PATCHLEVEL = 3
SUBLEVEL = 4
EXTRAVERSION = -rc1
EXTRAVERSION = -rc2
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
VERSION_FILE = $(obj)include/version_autogenerated.h
@ -346,10 +346,9 @@ $(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
$(ONENAND_IPL): $(VERSION_FILE) $(obj)include/autoconf.mk
$(MAKE) -C $(obj)onenand_ipl/board/$(BOARDDIR) all
$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
$(U_BOOT_ONENAND): $(ONENAND_IPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
$(MAKE) -C $(obj)onenand_ipl/board/$(BOARDDIR) all
cat $(obj)onenand_ipl/onenand-ipl-2k.bin $(obj)u-boot.bin > $(obj)u-boot-onenand.bin
cat $(obj)onenand_ipl/onenand-ipl-4k.bin $(obj)u-boot.bin > $(obj)u-boot-flexonenand.bin
@ -2609,9 +2608,6 @@ actux3_config : unconfig
actux4_config : unconfig
@$(MKCONFIG) $(@:_config=) arm ixp actux4
adsvix_config : unconfig
@$(MKCONFIG) $(@:_config=) arm pxa adsvix
cerf250_config : unconfig
@$(MKCONFIG) $(@:_config=) arm pxa cerf250
@ -2678,6 +2674,7 @@ zylonite_config :
apollon_config : unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)onenand_ipl/board/apollon
@echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h
@$(MKCONFIG) $(@:_config=) arm arm1136 apollon NULL omap24xx
@echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk

45
api/api_storage.c
View File

@ -1,5 +1,5 @@
/*
* (C) Copyright 2007 Semihalf
* (C) Copyright 2007-2008 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
@ -46,14 +46,15 @@
#define ENUM_USB 1
#define ENUM_SCSI 2
#define ENUM_MMC 3
#define ENUM_MAX 4
#define ENUM_SATA 4
#define ENUM_MAX 5
struct stor_spec {
int max_dev;
int enum_started;
int enum_ended;
int type; /* "external" type: DT_STOR_{IDE,USB,etc} */
char name[4];
char *name;
};
static struct stor_spec specs[ENUM_MAX] = { { 0, 0, 0, 0, "" }, };
@ -68,12 +69,19 @@ void dev_stor_init(void)
specs[ENUM_IDE].type = DEV_TYP_STOR | DT_STOR_IDE;
specs[ENUM_IDE].name = "ide";
#endif
#if defined(CONFIG_CMD_USB)
specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV;
specs[ENUM_USB].enum_started = 0;
specs[ENUM_USB].enum_ended = 0;
specs[ENUM_USB].type = DEV_TYP_STOR | DT_STOR_USB;
specs[ENUM_USB].name = "usb";
#if defined(CONFIG_CMD_MMC)
specs[ENUM_MMC].max_dev = CFG_MMC_MAX_DEVICE;
specs[ENUM_MMC].enum_started = 0;
specs[ENUM_MMC].enum_ended = 0;
specs[ENUM_MMC].type = DEV_TYP_STOR | DT_STOR_MMC;
specs[ENUM_MMC].name = "mmc";
#endif
#if defined(CONFIG_CMD_SATA)
specs[ENUM_SATA].max_dev = CFG_SATA_MAX_DEVICE;
specs[ENUM_SATA].enum_started = 0;
specs[ENUM_SATA].enum_ended = 0;
specs[ENUM_SATA].type = DEV_TYP_STOR | DT_STOR_SATA;
specs[ENUM_SATA].name = "sata";
#endif
#if defined(CONFIG_CMD_SCSI)
specs[ENUM_SCSI].max_dev = CFG_SCSI_MAX_DEVICE;
@ -82,6 +90,13 @@ void dev_stor_init(void)
specs[ENUM_SCSI].type = DEV_TYP_STOR | DT_STOR_SCSI;
specs[ENUM_SCSI].name = "scsi";
#endif
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
specs[ENUM_USB].max_dev = USB_MAX_STOR_DEV;
specs[ENUM_USB].enum_started = 0;
specs[ENUM_USB].enum_ended = 0;
specs[ENUM_USB].type = DEV_TYP_STOR | DT_STOR_USB;
specs[ENUM_USB].name = "usb";
#endif
}
/*
@ -108,7 +123,10 @@ static int dev_stor_get(int type, int first, int *more, struct device_info *di)
if (first) {
di->cookie = (void *)get_dev(specs[type].name, 0);
found = 1;
if (di->cookie == NULL)
return 0;
else
found = 1;
} else {
for (i = 0; i < specs[type].max_dev; i++)
@ -123,7 +141,10 @@ static int dev_stor_get(int type, int first, int *more, struct device_info *di)
}
di->cookie = (void *)get_dev(specs[type].name, i);
found = 1;
if (di->cookie == NULL)
return 0;
else
found = 1;
/* provide hint if there are more devices in
* this group to enumerate */
@ -360,7 +381,7 @@ lbasize_t dev_read_stor(void *cookie, void *buf, lbasize_t len, lbastart_t start
return 0;
if ((dd->block_read) == NULL) {
debugf("no block_read() for device 0x%08x\n");
debugf("no block_read() for device 0x%08x\n", cookie);
return 0;
}

78
api_examples/demo.c
View File

@ -1,5 +1,5 @@
/*
* (C) Copyright 2007 Semihalf
* (C) Copyright 2007-2008 Semihalf
*
* Written by: Rafal Jaworowski <raj@semihalf.com>
*
@ -31,13 +31,15 @@
#define errf(fmt, args...) do { printf("ERROR @ %s(): ", __func__); printf(fmt, ##args); } while (0)
void test_dump_si(struct sys_info *);
#define BUF_SZ 2048
#define WAIT_SECS 5
void test_dump_buf(void *, int);
void test_dump_di(int);
void test_dump_si(struct sys_info *);
void test_dump_sig(struct api_signature *);
char buf[2048];
#define WAIT_SECS 5
static char buf[BUF_SZ];
int main(int argc, char *argv[])
{
@ -58,11 +60,12 @@ int main(int argc, char *argv[])
if (sig->version > API_SIG_VERSION)
return -3;
printf("API signature found @%x\n", sig);
printf("API signature found @%x\n", (unsigned int)sig);
test_dump_sig(sig);
printf("\n*** Consumer API test ***\n");
printf("syscall ptr 0x%08x@%08x\n", syscall_ptr, &syscall_ptr);
printf("syscall ptr 0x%08x@%08x\n", (unsigned int)syscall_ptr,
(unsigned int)&syscall_ptr);
/* console activities */
ub_putc('B');
@ -125,11 +128,17 @@ int main(int argc, char *argv[])
if (i == devs_no)
printf("No storage devices available\n");
else {
memset(buf, 0, BUF_SZ);
if ((rv = ub_dev_open(i)) != 0)
errf("open device %d error %d\n", i, rv);
else if ((rv = ub_dev_read(i, &buf, 200, 20)) != 0)
else if ((rv = ub_dev_read(i, buf, 1, 0)) != 0)
errf("could not read from device %d, error %d\n", i, rv);
printf("Sector 0 dump (512B):\n");
test_dump_buf(buf, 512);
ub_dev_close(i);
}
@ -180,7 +189,7 @@ void test_dump_sig(struct api_signature *sig)
printf("signature:\n");
printf(" version\t= %d\n", sig->version);
printf(" checksum\t= 0x%08x\n", sig->checksum);
printf(" sc entry\t= 0x%08x\n", sig->syscall);
printf(" sc entry\t= 0x%08x\n", (unsigned int)sig->syscall);
}
void test_dump_si(struct sys_info *si)
@ -188,9 +197,9 @@ void test_dump_si(struct sys_info *si)
int i;
printf("sys info:\n");
printf(" clkbus\t= 0x%08x\n", si->clk_bus);
printf(" clkcpu\t= 0x%08x\n", si->clk_cpu);
printf(" bar\t\t= 0x%08x\n", si->bar);
printf(" clkbus\t= 0x%08x\n", (unsigned int)si->clk_bus);
printf(" clkcpu\t= 0x%08x\n", (unsigned int)si->clk_cpu);
printf(" bar\t\t= 0x%08x\n", (unsigned int)si->bar);
printf("---\n");
for (i = 0; i < si->mr_no; i++) {
@ -217,23 +226,56 @@ void test_dump_si(struct sys_info *si)
}
}
static char * test_stor_typ(int type)
static char *test_stor_typ(int type)
{
if (type & DT_STOR_IDE)
return "IDE";
if (type & DT_STOR_MMC)
return "MMC";
if (type & DT_STOR_SATA)
return "SATA";
if (type & DT_STOR_SCSI)
return "SCSI";
if (type & DT_STOR_USB)
return "USB";
if (type & DT_STOR_MMC);
return "MMC";
return "Unknown";
}
void test_dump_buf(void *buf, int len)
{
int i;
int line_counter = 0;
int sep_flag = 0;
int addr = 0;
printf("%07x:\t", addr);
for (i = 0; i < len; i++) {
if (line_counter++ > 15) {
line_counter = 0;
sep_flag = 0;
addr += 16;
i--;
printf("\n%07x:\t", addr);
continue;
}
if (sep_flag++ > 1) {
sep_flag = 1;
printf(" ");
}
printf("%02x", *((char *)buf++));
}
printf("\n");
}
void test_dump_di(int handle)
{
int i;
@ -252,7 +294,7 @@ void test_dump_di(int handle)
} else if (di->type & DEV_TYP_STOR) {
printf(" type\t\t= %s\n", test_stor_typ(di->type));
printf(" blk size\t\t= %d\n", di->di_stor.block_size);
printf(" blk count\t\t= %d\n", di->di_stor.block_count);
printf(" blk size\t\t= %d\n", (unsigned int)di->di_stor.block_size);
printf(" blk count\t\t= %d\n", (unsigned int)di->di_stor.block_count);
}
}

51
board/adsvix/Makefile
View File

@ -1,51 +0,0 @@
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := adsvix.o pcmcia.o
SOBJS := lowlevel_init.o pxavoltage.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

75
board/adsvix/adsvix.c
View File

@ -1,75 +0,0 @@
/*
* (C) Copyright 2004
* Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
*
* (C) Copyright 2002
* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/*
* Miscelaneous platform dependent initialisations
*/
int board_init (void)
{
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
/* arch number of ADSVIX-Board */
gd->bd->bi_arch_number = 620;
/* adress of boot parameters */
gd->bd->bi_boot_params = 0xa000003c;
return 0;
}
int board_late_init(void)
{
setenv("stdout", "serial");
setenv("stderr", "serial");
return 0;
}
int dram_init (void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
return 0;
}

1
board/adsvix/config.mk
View File

@ -1 +0,0 @@
TEXT_BASE = 0xa1700000

466
board/adsvix/lowlevel_init.S
View File

@ -1,466 +0,0 @@
/*
* This was originally from the Lubbock u-boot port.
*
* Most of this taken from Redboot hal_platform_setup.h with cleanup
*
* NOTE: I haven't clean this up considerably, just enough to get it
* running. See hal_platform_setup.h for the source. See
* board/cradle/lowlevel_init.S for another PXA250 setup that is
* much cleaner.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <version.h>
#include <asm/arch/pxa-regs.h>
/* wait for coprocessor write complete */
.macro CPWAIT reg
mrc p15,0,\reg,c2,c0,0
mov \reg,\reg
sub pc,pc,#4
.endm
/*
* Memory setup
*/
.globl lowlevel_init
lowlevel_init:
/* Set up GPIO pins first ----------------------------------------- */
ldr r0, =GPSR0
ldr r1, =CFG_GPSR0_VAL
str r1, [r0]
ldr r0, =GPSR1
ldr r1, =CFG_GPSR1_VAL
str r1, [r0]
ldr r0, =GPSR2
ldr r1, =CFG_GPSR2_VAL
str r1, [r0]
ldr r0, =GPSR3
ldr r1, =CFG_GPSR3_VAL
str r1, [r0]
ldr r0, =GPCR0
ldr r1, =CFG_GPCR0_VAL
str r1, [r0]
ldr r0, =GPCR1
ldr r1, =CFG_GPCR1_VAL
str r1, [r0]
ldr r0, =GPCR2
ldr r1, =CFG_GPCR2_VAL
str r1, [r0]
ldr r0, =GPCR3
ldr r1, =CFG_GPCR3_VAL
str r1, [r0]
ldr r0, =GPDR0
ldr r1, =CFG_GPDR0_VAL
str r1, [r0]
ldr r0, =GPDR1
ldr r1, =CFG_GPDR1_VAL
str r1, [r0]
ldr r0, =GPDR2
ldr r1, =CFG_GPDR2_VAL
str r1, [r0]
ldr r0, =GPDR3
ldr r1, =CFG_GPDR3_VAL
str r1, [r0]
ldr r0, =GAFR0_L
ldr r1, =CFG_GAFR0_L_VAL
str r1, [r0]
ldr r0, =GAFR0_U
ldr r1, =CFG_GAFR0_U_VAL
str r1, [r0]
ldr r0, =GAFR1_L
ldr r1, =CFG_GAFR1_L_VAL
str r1, [r0]
ldr r0, =GAFR1_U
ldr r1, =CFG_GAFR1_U_VAL
str r1, [r0]
ldr r0, =GAFR2_L
ldr r1, =CFG_GAFR2_L_VAL
str r1, [r0]
ldr r0, =GAFR2_U
ldr r1, =CFG_GAFR2_U_VAL
str r1, [r0]
ldr r0, =GAFR3_L
ldr r1, =CFG_GAFR3_L_VAL
str r1, [r0]
ldr r0, =GAFR3_U
ldr r1, =CFG_GAFR3_U_VAL
str r1, [r0]
ldr r0, =PSSR /* enable GPIO pins */
ldr r1, =CFG_PSSR_VAL
str r1, [r0]
/* ---------------------------------------------------------------- */
/* Enable memory interface */
/* */
/* The sequence below is based on the recommended init steps */
/* detailed in the Intel PXA250 Operating Systems Developers Guide, */
/* Chapter 10. */
/* ---------------------------------------------------------------- */
/* ---------------------------------------------------------------- */
/* Step 1: Wait for at least 200 microsedonds to allow internal */
/* clocks to settle. Only necessary after hard reset... */
/* FIXME: can be optimized later */
/* ---------------------------------------------------------------- */
ldr r3, =OSCR /* reset the OS Timer Count to zero */
mov r2, #0
str r2, [r3]
ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
/* so 0x300 should be plenty */
1:
ldr r2, [r3]
cmp r4, r2
bgt 1b
mem_init:
ldr r1, =MEMC_BASE /* get memory controller base addr. */
/* ---------------------------------------------------------------- */
/* Step 2a: Initialize Asynchronous static memory controller */
/* ---------------------------------------------------------------- */
/* MSC registers: timing, bus width, mem type */
/* MSC0: nCS(0,1) */
ldr r2, =CFG_MSC0_VAL
str r2, [r1, #MSC0_OFFSET]
ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */
/* that data latches */
/* MSC1: nCS(2,3) */
ldr r2, =CFG_MSC1_VAL
str r2, [r1, #MSC1_OFFSET]
ldr r2, [r1, #MSC1_OFFSET]
/* MSC2: nCS(4,5) */
ldr r2, =CFG_MSC2_VAL
str r2, [r1, #MSC2_OFFSET]
ldr r2, [r1, #MSC2_OFFSET]
/* ---------------------------------------------------------------- */
/* Step 2b: Initialize Card Interface */
/* ---------------------------------------------------------------- */
/* MECR: Memory Expansion Card Register */
ldr r2, =CFG_MECR_VAL
str r2, [r1, #MECR_OFFSET]
ldr r2, [r1, #MECR_OFFSET]
/* MCMEM0: Card Interface slot 0 timing */
ldr r2, =CFG_MCMEM0_VAL
str r2, [r1, #MCMEM0_OFFSET]
ldr r2, [r1, #MCMEM0_OFFSET]
/* MCMEM1: Card Interface slot 1 timing */
ldr r2, =CFG_MCMEM1_VAL
str r2, [r1, #MCMEM1_OFFSET]
ldr r2, [r1, #MCMEM1_OFFSET]
/* MCATT0: Card Interface Attribute Space Timing, slot 0 */
ldr r2, =CFG_MCATT0_VAL
str r2, [r1, #MCATT0_OFFSET]
ldr r2, [r1, #MCATT0_OFFSET]
/* MCATT1: Card Interface Attribute Space Timing, slot 1 */
ldr r2, =CFG_MCATT1_VAL
str r2, [r1, #MCATT1_OFFSET]
ldr r2, [r1, #MCATT1_OFFSET]
/* MCIO0: Card Interface I/O Space Timing, slot 0 */
ldr r2, =CFG_MCIO0_VAL
str r2, [r1, #MCIO0_OFFSET]
ldr r2, [r1, #MCIO0_OFFSET]
/* MCIO1: Card Interface I/O Space Timing, slot 1 */
ldr r2, =CFG_MCIO1_VAL
str r2, [r1, #MCIO1_OFFSET]
ldr r2, [r1, #MCIO1_OFFSET]
/* ---------------------------------------------------------------- */
/* Step 2c: Write FLYCNFG FIXME: what's that??? */
/* ---------------------------------------------------------------- */
ldr r2, =CFG_FLYCNFG_VAL
str r2, [r1, #FLYCNFG_OFFSET]
str r2, [r1, #FLYCNFG_OFFSET]
/* ---------------------------------------------------------------- */
/* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
/* ---------------------------------------------------------------- */
/* Before accessing MDREFR we need a valid DRI field, so we set */
/* this to power on defaults + DRI field. */
ldr r4, [r1, #MDREFR_OFFSET]
ldr r2, =0xFFF
bic r4, r4, r2
ldr r3, =CFG_MDREFR_VAL
and r3, r3, r2
orr r4, r4, r3
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
orr r4, r4, #MDREFR_K0RUN
orr r4, r4, #MDREFR_K0DB4
orr r4, r4, #MDREFR_K0FREE
orr r4, r4, #MDREFR_K0DB2
orr r4, r4, #MDREFR_K1DB2
bic r4, r4, #MDREFR_K1FREE
bic r4, r4, #MDREFR_K2FREE
str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
ldr r4, [r1, #MDREFR_OFFSET]
/* Note: preserve the mdrefr value in r4 */
/* ---------------------------------------------------------------- */
/* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
/* ---------------------------------------------------------------- */
/* Initialize SXCNFG register. Assert the enable bits */
/* Write SXMRS to cause an MRS command to all enabled banks of */
/* synchronous static memory. Note that SXLCR need not be written */
/* at this time. */
ldr r2, =CFG_SXCNFG_VAL
str r2, [r1, #SXCNFG_OFFSET]
/* ---------------------------------------------------------------- */
/* Step 4: Initialize SDRAM */
/* ---------------------------------------------------------------- */
bic r4, r4, #(MDREFR_K2FREE |MDREFR_K1FREE | MDREFR_K0FREE)
orr r4, r4, #MDREFR_K1RUN
bic r4, r4, #MDREFR_K2DB2
str r4, [r1, #MDREFR_OFFSET]
ldr r4, [r1, #MDREFR_OFFSET]
bic r4, r4, #MDREFR_SLFRSH
str r4, [r1, #MDREFR_OFFSET]
ldr r4, [r1, #MDREFR_OFFSET]
orr r4, r4, #MDREFR_E1PIN
str r4, [r1, #MDREFR_OFFSET]
ldr r4, [r1, #MDREFR_OFFSET]
nop
nop
/* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */
/* configure but not enable each SDRAM partition pair. */
ldr r4, =CFG_MDCNFG_VAL
bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
bic r4, r4, #(MDCNFG_DE2|MDCNFG_DE3)
str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */
ldr r4, [r1, #MDCNFG_OFFSET]
/* Step 4e: Wait for the clock to the SDRAMs to stabilize, */
/* 100..200 µsec. */
ldr r3, =OSCR /* reset the OS Timer Count to zero */
mov r2, #0
str r2, [r3]
ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
/* so 0x300 should be plenty */
1:
ldr r2, [r3]
cmp r4, r2
bgt 1b
/* Step 4f: Trigger a number (usually 8) refresh cycles by */
/* attempting non-burst read or write accesses to disabled */
/* SDRAM, as commonly specified in the power up sequence */
/* documented in SDRAM data sheets. The address(es) used */
/* for this purpose must not be cacheable. */
ldr r3, =CFG_DRAM_BASE
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
/* Step 4g: Write MDCNFG with enable bits asserted */
/* (MDCNFG:DEx set to 1). */
ldr r3, [r1, #MDCNFG_OFFSET]
mov r4, r3
orr r3, r3, #MDCNFG_DE0
str r3, [r1, #MDCNFG_OFFSET]
mov r0, r3
/* Step 4h: Write MDMRS. */
ldr r2, =CFG_MDMRS_VAL
str r2, [r1, #MDMRS_OFFSET]
/* enable APD */
ldr r3, [r1, #MDREFR_OFFSET]
orr r3, r3, #MDREFR_APD
str r3, [r1, #MDREFR_OFFSET]
/* We are finished with Intel's memory controller initialisation */
setvoltage:
mov r10, lr
bl initPXAvoltage /* In case the board is rebooting with a */
mov lr, r10 /* low voltage raise it up to a good one. */
wakeup:
/* Are we waking from sleep? */
ldr r0, =RCSR
ldr r1, [r0]
and r1, r1, #(RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR)
str r1, [r0]
teq r1, #RCSR_SMR
bne initirqs
ldr r0, =PSSR
mov r1, #PSSR_PH
str r1, [r0]
/* if so, resume at PSPR */
ldr r0, =PSPR
ldr r1, [r0]
mov pc, r1
/* ---------------------------------------------------------------- */
/* Disable (mask) all interrupts at interrupt controller */
/* ---------------------------------------------------------------- */
initirqs:
mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
ldr r2, =ICLR
str r1, [r2]
ldr r2, =ICMR /* mask all interrupts at the controller */
str r1, [r2]
/* ---------------------------------------------------------------- */
/* Clock initialisation */
/* ---------------------------------------------------------------- */
initclks:
/* Disable the peripheral clocks, and set the core clock frequency */
/* Turn Off on-chip peripheral clocks (except for memory) */
/* for re-configuration. */
ldr r1, =CKEN
ldr r2, =CFG_CKEN
str r2, [r1]
/* ... and write the core clock config register */
ldr r2, =CFG_CCCR
ldr r1, =CCCR
str r2, [r1]
/* Turn on turbo mode */
mrc p14, 0, r2, c6, c0, 0
orr r2, r2, #0xB /* Turbo, Fast-Bus, Freq change**/
mcr p14, 0, r2, c6, c0, 0
/* Re-write MDREFR */
ldr r1, =MEMC_BASE
ldr r2, [r1, #MDREFR_OFFSET]
str r2, [r1, #MDREFR_OFFSET]
#ifdef RTC
/* enable the 32Khz oscillator for RTC and PowerManager */
ldr r1, =OSCC
mov r2, #OSCC_OON
str r2, [r1]
/* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
/* has settled. */
60:
ldr r2, [r1]
ands r2, r2, #1
beq 60b
#else
#error "RTC not defined"
#endif
/* Interrupt init: Mask all interrupts */
ldr r0, =ICMR /* enable no sources */
mov r1, #0
str r1, [r0]
/* FIXME */
#ifdef NODEBUG
/*Disable software and data breakpoints */
mov r0,#0
mcr p15,0,r0,c14,c8,0 /* ibcr0 */
mcr p15,0,r0,c14,c9,0 /* ibcr1 */
mcr p15,0,r0,c14,c4,0 /* dbcon */
/*Enable all debug functionality */
mov r0,#0x80000000
mcr p14,0,r0,c10,c0,0 /* dcsr */
#endif
/* ---------------------------------------------------------------- */
/* End lowlevel_init */
/* ---------------------------------------------------------------- */
endlowlevel_init:
mov pc, lr

67
board/adsvix/pcmcia.c
View File

@ -1,67 +0,0 @@
/*
* (C) Copyright 2004
* Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/arch/pxa-regs.h>
void pcmcia_power_on(void)
{
#if 0
if (!(GPLR(20) & GPIO_bit(20))) { /* 3.3V */
GPCR(81) = GPIO_bit(81);
GPSR(82) = GPIO_bit(82);
}
else if (!(GPLR(21) & GPIO_bit(21))) { /* 5.0V */
GPCR(81) = GPIO_bit(81);
GPCR(82) = GPIO_bit(82);
}
#else
#warning "Board will only supply 5V, wait for next HW spin for selectable power"
/* 5.0V */
GPCR(81) = GPIO_bit(81);
GPCR(82) = GPIO_bit(82);
#endif
udelay(300000);
/* reset the card */
GPSR(52) = GPIO_bit(52);
/* enable PCMCIA */
GPCR(83) = GPIO_bit(83);
/* clear reset */
udelay(10);
GPCR(52) = GPIO_bit(52);
udelay(20000);
}
void pcmcia_power_off(void)
{
/* 0V */
GPSR(81) = GPIO_bit(81);
GPSR(82) = GPIO_bit(82);
/* disable PCMCIA */
GPSR(83) = GPIO_bit(83);
}

230
board/adsvix/pxavoltage.S
View File

@ -1,230 +0,0 @@
/*
* (C) Copyright 2004
* Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <asm/arch/pxa-regs.h>
#define LTC1663_ADDR 0x20
#define LTC1663_SY 0x01 /* Sync ACK */
#define LTC1663_SD 0x04 /* shutdown */
#define LTC1663_BG 0x04 /* Internal Voltage Ref */
#define VOLT_1_55 18 /* DAC value for 1.55V */
.global initPXAvoltage
@ Set the voltage to 1.55V early in the boot process so we can run
@ at a high clock speed and boot quickly. Note that this is necessary
@ because the reset button does not reset the CPU voltage, so if the
@ voltage was low (say 0.85V) then the CPU would crash without this
@ routine
@ This routine clobbers r0-r4
initializei2c:
ldr r2, =CKEN
ldr r3, [r2]
orr r3, r3, #CKEN15_PWRI2C
str r3, [r2]
ldr r2, =PCFR
ldr r3, [r2]
orr r3, r3, #PCFR_PI2C_EN
str r3, [r2]
/* delay for about 250msec
*/
ldr r3, =OSCR
mov r2, #0
str r2, [r3]
ldr r1, =0xC0000
1:
ldr r2, [r3]
cmp r1, r2
bgt 1b
ldr r0, =PWRICR
ldr r1, [r0]
bic r1, r1, #(ICR_MA | ICR_START | ICR_STOP)
str r1, [r0]
orr r1, r1, #ICR_UR
str r1, [r0]
ldr r2, =PWRISR
ldr r3, =0x7ff
str r3, [r2]
bic r1, r1, #ICR_UR
str r1, [r0]
mov r1, #(ICR_GCD | ICR_SCLE)
str r1, [r0]
orr r1, r1, #ICR_IUE
str r1, [r0]
orr r1, r1, #ICR_FM
str r1, [r0]
/* delay for about 1msec
*/
ldr r3, =OSCR
mov r2, #0
str r2, [r3]
ldr r1, =0xC00
1:
ldr r2, [r3]
cmp r1, r2
bgt 1b
mov pc, lr
sendbytei2c:
ldr r3, =PWRIDBR
str r0, [r3]
ldr r3, =PWRICR
ldr r0, [r3]
orr r0, r0, r1
bic r0, r0, r2
str r0, [r3]
orr r0, r0, #ICR_TB
str r0, [r3]
mov r2, #0x100000
waitfortxemptyi2c:
ldr r0, =PWRISR
ldr r1, [r0]
/* take it from the top if we don't get empty after a while */
subs r2, r2, #1
moveq lr, r4
beq initPXAvoltage
tst r1, #ISR_ITE
beq waitfortxemptyi2c
orr r1, r1, #ISR_ITE
str r1, [r0]
mov pc, lr
initPXAvoltage:
mov r4, lr
bl setleds
bl initializei2c
bl setleds
/* now send the real message to set the correct voltage */
ldr r0, =LTC1663_ADDR
mov r0, r0, LSL #1
mov r1, #ICR_START
ldr r2, =(ICR_STOP | ICR_ALDIE | ICR_ACKNAK)
bl sendbytei2c
bl setleds
mov r0, #LTC1663_BG
mov r1, #0
mov r2, #(ICR_STOP | ICR_START)
bl sendbytei2c
bl setleds
ldr r0, =VOLT_1_55
and r0, r0, #0xff
mov r1, #0
mov r2, #(ICR_STOP | ICR_START)
bl sendbytei2c
bl setleds
ldr r0, =VOLT_1_55
mov r0, r0, ASR #8
and r0, r0, #0xff
mov r1, #ICR_STOP
mov r2, #ICR_START
bl sendbytei2c
bl setleds
@ delay a little for the volatage to stablize
ldr r3, =OSCR
mov r2, #0
str r2, [r3]
ldr r1, =0xC0
1:
ldr r2, [r3]
cmp r1, r2
bgt 1b
mov pc, r4
setleds:
mov pc, lr
ldr r5, =0x40e00058
ldr r3, [r5]
bic r3, r3, #0x3
str r3, [r5]
ldr r5, =0x40e0000c
ldr r3, [r5]
orr r3, r3, #0x00010000
str r3, [r5]
@ inner loop
mov r0, #0x2
1:
ldr r5, =0x40e00018
mov r3, #0x00010000
str r3, [r5]
@ outer loop
mov r3, #0x00F00000
2:
subs r3, r3, #1
bne 2b
ldr r5, =0x40e00024
mov r3, #0x00010000
str r3, [r5]
@ outer loop
mov r3, #0x00F00000
3:
subs r3, r3, #1
bne 3b
subs r0, r0, #1
bne 1b
mov pc, lr

56
board/adsvix/u-boot.lds
View File

@ -1,56 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/pxa/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) }
_end = .;
}

2
board/atmel/atngw100/atngw100.c
View File

@ -81,7 +81,7 @@ phys_size_t initdram(int board_type)
unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
if (expected_size != actual_size)
printf("Warning: Only %u of %u MiB SDRAM is working\n",
printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
actual_size >> 20, expected_size >> 20);
return actual_size;

2
board/atmel/atstk1000/atstk1000.c
View File

@ -104,7 +104,7 @@ phys_size_t initdram(int board_type)
unmap_physmem(sdram_base, EBI_SDRAM_SIZE);
if (expected_size != actual_size)
printf("Warning: Only %u of %u MiB SDRAM is working\n",
printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
actual_size >> 20, expected_size >> 20);
return actual_size;

2
board/atmel/atstk1000/flash.c
View File

@ -70,7 +70,7 @@ unsigned long flash_init(void)
void flash_print_info(flash_info_t *info)
{
printf("Flash: Vendor ID: 0x%02x, Product ID: 0x%02x\n",
printf("Flash: Vendor ID: 0x%02lx, Product ID: 0x%02lx\n",
info->flash_id >> 16, info->flash_id & 0xffff);
printf("Size: %ld MB in %d sectors\n",
info->size >> 10, info->sector_count);

2
board/esd/common/flash.c
View File

@ -22,7 +22,9 @@
*/
#include <common.h>
#ifdef __PPC__
#include <ppc4xx.h>
#endif
#include <asm/processor.h>
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */

2
board/freescale/m5275evb/Makefile
View File

@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
OBJS = $(BOARD).o mii.o
COBJS = $(BOARD).o mii.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))

37
board/freescale/mpc8540ads/u-boot.lds
View File

@ -2,6 +2,8 @@
* (C) Copyright 2002,2003, Motorola,Inc.
* Xianghua Xiao, X.Xiao@motorola.com.
*
* Copyright 2008 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
@ -26,16 +28,6 @@ OUTPUT_ARCH(powerpc)
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
@ -62,17 +54,6 @@ SECTIONS
.plt : { *(.plt) }
.text :
{
cpu/mpc85xx/start.o (.text)
cpu/mpc85xx/traps.o (.text)
cpu/mpc85xx/interrupts.o (.text)
cpu/mpc85xx/cpu_init.o (.text)
cpu/mpc85xx/cpu.o (.text)
cpu/mpc85xx/speed.o (.text)
cpu/mpc85xx/pci.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
*(.text)
*(.fixup)
*(.got1)
@ -134,6 +115,18 @@ SECTIONS
. = ALIGN(256);
__init_end = .;
.bootpg ADDR(.text) + 0x7f000 :
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
.resetvec ADDR(.text) + 0x7fffc :
{
*(.resetvec)
} = 0xffff
. = ADDR(.text) + 0x80000;
__bss_start = .;
.bss (NOLOAD) :
{
@ -142,6 +135,8 @@ SECTIONS
*(.bss)
*(COMMON)
}
. = ALIGN(4);
_end = . ;
PROVIDE (end = .);
}

38
board/freescale/mpc8541cds/u-boot.lds
View File

@ -1,5 +1,5 @@
/*
* Copyright 2004 Freescale Semiconductor.
* Copyright 2004, 2008 Freescale Semiconductor.
*
* See file CREDITS for list of people who contributed to this
* project.
@ -25,16 +25,6 @@ OUTPUT_ARCH(powerpc)
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
@ -61,18 +51,6 @@ SECTIONS
.plt : { *(.plt) }
.text :
{
cpu/mpc85xx/start.o (.text)
cpu/mpc85xx/traps.o (.text)
cpu/mpc85xx/interrupts.o (.text)
cpu/mpc85xx/cpu_init.o (.text)
cpu/mpc85xx/cpu.o (.text)
drivers/net/tsec.o (.text)
cpu/mpc85xx/speed.o (.text)
cpu/mpc85xx/pci.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
*(.text)
*(.fixup)
*(.got1)
@ -134,6 +112,18 @@ SECTIONS
. = ALIGN(256);
__init_end = .;
.bootpg ADDR(.text) + 0x7f000 :
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
.resetvec ADDR(.text) + 0x7fffc :
{
*(.resetvec)
} = 0xffff
. = ADDR(.text) + 0x80000;
__bss_start = .;
.bss (NOLOAD) :
{
@ -142,6 +132,8 @@ SECTIONS
*(.bss)
*(COMMON)
}
. = ALIGN(4);
_end = . ;
PROVIDE (end = .);
}

37
board/freescale/mpc8544ds/u-boot.lds
View File

@ -1,5 +1,5 @@
/*
* Copyright 2007 Freescale Semiconductor, Inc.
* Copyright 2007-2008 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@ -25,16 +25,6 @@ OUTPUT_ARCH(powerpc)
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
@ -61,17 +51,6 @@ SECTIONS
.plt : { *(.plt) }
.text :
{
cpu/mpc85xx/start.o (.text)
cpu/mpc85xx/traps.o (.text)
cpu/mpc85xx/interrupts.o (.text)
cpu/mpc85xx/cpu_init.o (.text)
cpu/mpc85xx/cpu.o (.text)
cpu/mpc85xx/speed.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
drivers/bios_emulator/atibios.o (.text)
*(.text)
*(.fixup)
*(.got1)
@ -133,6 +112,18 @@ SECTIONS
. = ALIGN(256);
__init_end = .;
.bootpg ADDR(.text) + 0x7f000 :
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
.resetvec ADDR(.text) + 0x7fffc :
{
*(.resetvec)
} = 0xffff
. = ADDR(.text) + 0x80000;
__bss_start = .;
.bss (NOLOAD) :
{
@ -141,6 +132,8 @@ SECTIONS
*(.bss)
*(COMMON)
}
. = ALIGN(4);
_end = . ;
PROVIDE (end = .);
}

37
board/freescale/mpc8548cds/u-boot.lds
View File

@ -1,5 +1,5 @@
/*
* Copyright 2004, 2007 Freescale Semiconductor.
* Copyright 2004, 2007-2008 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@ -25,16 +25,6 @@ OUTPUT_ARCH(powerpc)
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
@ -61,17 +51,6 @@ SECTIONS
.plt : { *(.plt) }
.text :
{
cpu/mpc85xx/start.o (.text)
cpu/mpc85xx/traps.o (.text)
cpu/mpc85xx/interrupts.o (.text)
cpu/mpc85xx/cpu_init.o (.text)
cpu/mpc85xx/cpu.o (.text)
drivers/net/tsec.o (.text)
cpu/mpc85xx/speed.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
*(.text)
*(.fixup)
*(.got1)
@ -133,6 +112,18 @@ SECTIONS
. = ALIGN(256);
__init_end = .;
.bootpg ADDR(.text) + 0x7f000 :
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
.resetvec ADDR(.text) + 0x7fffc :
{
*(.resetvec)
} = 0xffff
. = ADDR(.text) + 0x80000;
__bss_start = .;
.bss (NOLOAD) :
{
@ -141,6 +132,8 @@ SECTIONS
*(.bss)
*(COMMON)
}
. = ALIGN(4);
_end = . ;
PROVIDE (end = .);
}

38
board/freescale/mpc8555cds/u-boot.lds
View File

@ -1,5 +1,5 @@
/*
* Copyright 2004 Freescale Semiconductor.
* Copyright 2004, 2008 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@ -25,16 +25,6 @@ OUTPUT_ARCH(powerpc)
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
@ -61,18 +51,6 @@ SECTIONS
.plt : { *(.plt) }
.text :
{
cpu/mpc85xx/start.o (.text)
cpu/mpc85xx/traps.o (.text)
cpu/mpc85xx/interrupts.o (.text)
cpu/mpc85xx/cpu_init.o (.text)
cpu/mpc85xx/cpu.o (.text)
drivers/net/tsec.o (.text)
cpu/mpc85xx/speed.o (.text)
cpu/mpc85xx/pci.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
*(.text)
*(.fixup)
*(.got1)
@ -134,6 +112,18 @@ SECTIONS
. = ALIGN(256);
__init_end = .;
.bootpg ADDR(.text) + 0x7f000 :
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
.resetvec ADDR(.text) + 0x7fffc :
{
*(.resetvec)
} = 0xffff
. = ADDR(.text) + 0x80000;
__bss_start = .;
.bss (NOLOAD) :
{
@ -142,6 +132,8 @@ SECTIONS
*(.bss)
*(COMMON)
}
. = ALIGN(4);
_end = . ;
PROVIDE (end = .);
}

42
board/freescale/mpc8560ads/u-boot.lds
View File

@ -1,7 +1,9 @@
/*
* (C) Copyright 2002,2003,Motorola,Inc.
* (C) Copyright 2002,2003, Motorola,Inc.
* Xianghua Xiao, X.Xiao@motorola.com.
*
* Copyright 2008 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
@ -26,16 +28,6 @@ OUTPUT_ARCH(powerpc)
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
.bootpg 0xFFFFF000 :
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
@ -62,20 +54,6 @@ SECTIONS
.plt : { *(.plt) }
.text :
{
cpu/mpc85xx/start.o (.text)
cpu/mpc85xx/commproc.o (.text)
cpu/mpc85xx/traps.o (.text)
cpu/mpc85xx/interrupts.o (.text)
cpu/mpc85xx/serial_scc.o (.text)
cpu/mpc85xx/ether_fcc.o (.text)
cpu/mpc85xx/cpu_init.o (.text)
cpu/mpc85xx/cpu.o (.text)
cpu/mpc85xx/speed.o (.text)
cpu/mpc85xx/spd_sdram.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
*(.text)
*(.fixup)
*(.got1)
@ -137,6 +115,18 @@ SECTIONS
. = ALIGN(256);
__init_end = .;
.bootpg ADDR(.text) + 0x7f000 :
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
.resetvec ADDR(.text) + 0x7fffc :
{
*(.resetvec)
} = 0xffff
. = ADDR(.text) + 0x80000;
__bss_start = .;
.bss (NOLOAD) :
{
@ -145,6 +135,8 @@ SECTIONS
*(.bss)
*(COMMON)
}
. = ALIGN(4);
_end = . ;
PROVIDE (end = .);
}

40
board/freescale/mpc8568mds/u-boot.lds
View File

@ -1,5 +1,5 @@
/*
* Copyright 2004-2007 Freescale Semiconductor.
* Copyright 2004-2008 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@ -23,21 +23,8 @@
OUTPUT_ARCH(powerpc)
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
/* ELIOR - From RAM: From FLASH: 0xFFFFFFFC*/
.resetvec 0xFFFFFFFC:
{
*(.resetvec)
} = 0xffff
/*(ELIOR - From RAM: From FLASH: 0xFFFFF000*/
.bootpg 0xFFFFF000:
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
@ -64,17 +51,6 @@ SECTIONS
.plt : { *(.plt) }
.text :
{
cpu/mpc85xx/start.o (.text)
cpu/mpc85xx/traps.o (.text)
cpu/mpc85xx/interrupts.o (.text)
cpu/mpc85xx/cpu_init.o (.text)
cpu/mpc85xx/cpu.o (.text)
cpu/mpc85xx/speed.o (.text)
cpu/mpc85xx/pci.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
*(.text)
*(.fixup)
*(.got1)
@ -136,6 +112,18 @@ SECTIONS
. = ALIGN(256);
__init_end = .;
.bootpg ADDR(.text) + 0x7f000 :
{
cpu/mpc85xx/start.o (.bootpg)
} = 0xffff
.resetvec ADDR(.text) + 0x7fffc :
{
*(.resetvec)
} = 0xffff
. = ADDR(.text) + 0x80000;
__bss_start = .;
.bss (NOLOAD) :
{
@ -144,6 +132,8 @@ SECTIONS
*(.bss)
*(COMMON)
}
. = ALIGN(4);
_end = . ;
PROVIDE (end = .);
}

2
board/idmr/mii.c
View File

@ -200,7 +200,7 @@ int mii_discover_phy(struct eth_device *dev)
}
#endif /* CFG_DISCOVER_PHY */
int mii_init(void) __attribute__((weak,alias("__mii_init")));
void mii_init(void) __attribute__((weak,alias("__mii_init")));
void __mii_init(void)
{

2
board/ids8247/ids8247.c
View File

@ -321,7 +321,7 @@ nand_init (void)
printf ("%4lu MB\n", totlen >>20);
}
#endif /* CFG_CMD_NAND */
#endif /* CONFIG_CMD_NAND */
#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
/*

3
board/matrix_vision/mvbc_p/mvbc_p.c
View File

@ -32,6 +32,7 @@
#include <malloc.h>
#include <pci.h>
#include <i2c.h>
#include <fpga.h>
#include <environment.h>
#include <fdt_support.h>
#include <asm/io.h>
@ -109,7 +110,7 @@ void mvbc_init_gpio(void)
struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
printf("Ports : 0x%08x\n", gpio->port_config);
printf("PORCFG: 0x%08x\n", *(vu_long*)MPC5XXX_CDM_PORCFG);
printf("PORCFG: 0x%08lx\n", *(vu_long*)MPC5XXX_CDM_PORCFG);
out_be32(&gpio->simple_ddr, SIMPLE_DDR);
out_be32(&gpio->simple_dvo, SIMPLE_DVO);

3
board/tqc/tqm85xx/tqm85xx.c
View File

@ -464,7 +464,8 @@ void local_bus_init (void)
if (lbc_mhz < 66) {
lbc->lcrr = CFG_LBC_LCRR | LCRR_DBYP; /* DLL Bypass */
lbc->ltedr = 0xa4c80000; /* DK: !!! */
lbc->ltedr = LTEDR_BMD | LTEDR_PARD | LTEDR_WPD | LTEDR_WARA |
LTEDR_RAWA | LTEDR_CSD; /* Disable all error checking */
} else if (lbc_mhz >= 133) {
lbc->lcrr = CFG_LBC_LCRR & (~LCRR_DBYP); /* DLL Enabled */

6
board/w7o/post2.c
View File

@ -29,6 +29,12 @@
#include "errors.h"
#include "dtt.h"
/* for LM75 DTT POST test */
#define DTT_READ_TEMP 0x0
#define DTT_CONFIG 0x1
#define DTT_TEMP_HYST 0x2
#define DTT_TEMP_SET 0x3
#if defined(CONFIG_RTC_M48T35A)
void rtctest(void)
{

2
common/cmd_bdinfo.c
View File

@ -205,7 +205,7 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
puts ("\nip_addr = ");
print_IPaddr (bd->bi_ip_addr);
#endif
printf ("\nbaudrate = %d bps\n", (ulong)bd->bi_baudrate);
printf ("\nbaudrate = %ld bps\n", (ulong)bd->bi_baudrate);
return 0;
}

9
common/cmd_bootm.c
View File

@ -36,7 +36,7 @@
#include <lmb.h>
#include <asm/byteorder.h>
#if (CONFIG_COMMANDS & CFG_CMD_USB)
#if defined(CONFIG_CMD_USB)
#include <usb.h>
#endif
@ -217,7 +217,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
*/
iflag = disable_interrupts();
#if (CONFIG_COMMANDS & CFG_CMD_USB)
#if defined(CONFIG_CMD_USB)
/*
* turn off USB to prevent the host controller from writing to the
* SDRAM while Linux is booting. This could happen (at least for OHCI
@ -251,10 +251,9 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
memmove_wd ((void *)load_start,
(void *)os_data, os_len, CHUNKSZ);
load_end = load_start + os_len;
puts("OK\n");
}
load_end = load_start + os_len;
puts("OK\n");
break;
case IH_COMP_GZIP:
printf (" Uncompressing %s ... ", type_name);

4
common/cmd_flash.c
View File

@ -342,7 +342,7 @@ int do_flerase (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
puts ("Bad sector specification\n");
return 1;
}
printf ("Erase Flash Sectors %d-%d in Bank # %d ",
printf ("Erase Flash Sectors %d-%d in Bank # %zu ",
sect_first, sect_last, (info-flash_info)+1);
rcode = flash_erase(info, sect_first, sect_last);
return rcode;
@ -534,7 +534,7 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
puts ("Bad sector specification\n");
return 1;
}
printf("%sProtect Flash Sectors %d-%d in Bank # %d\n",
printf("%sProtect Flash Sectors %d-%d in Bank # %zu\n",
p ? "" : "Un-", sect_first, sect_last,
(info-flash_info)+1);
for (i = sect_first; i <= sect_last; i++) {

50
common/cmd_ide.c
View File

@ -161,8 +161,6 @@ static uchar ide_wait (int dev, ulong t);
#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
void inline ide_outb(int dev, int port, unsigned char val);
unsigned char inline ide_inb(int dev, int port);
static void input_data(int dev, ulong *sect_buf, int words);
static void output_data(int dev, ulong *sect_buf, int words);
static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
@ -298,7 +296,7 @@ int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
ulong addr = simple_strtoul(argv[2], NULL, 16);
ulong cnt = simple_strtoul(argv[4], NULL, 16);
ulong n;
#ifdef CFG_64BIT_STRTOUL
#ifdef CFG_64BIT_LBA
lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
printf ("\nIDE read: device %d block # %qd, count %ld ... ",
@ -327,7 +325,7 @@ int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
ulong addr = simple_strtoul(argv[2], NULL, 16);
ulong cnt = simple_strtoul(argv[4], NULL, 16);
ulong n;
#ifdef CFG_64BIT_STRTOUL
#ifdef CFG_64BIT_LBA
lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
printf ("\nIDE write: device %d block # %qd, count %ld ... ",
@ -523,6 +521,28 @@ int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/* ------------------------------------------------------------------------- */
void inline
__ide_outb(int dev, int port, unsigned char val)
{
debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
dev, port, val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
outb(val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
}
void inline ide_outb (int dev, int port, unsigned char val)
__attribute__((weak, alias("__ide_outb")));
unsigned char inline
__ide_inb(int dev, int port)
{
uchar val;
val = inb((ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
dev, port, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)), val);
return val;
}
unsigned char inline ide_inb(int dev, int port)
__attribute__((weak, alias("__ide_inb")));
void ide_init (void)
{
@ -817,28 +837,6 @@ set_pcmcia_timing (int pmode)
/* ------------------------------------------------------------------------- */
void inline
__ide_outb(int dev, int port, unsigned char val)
{
debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
dev, port, val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
outb(val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
}
void inline ide_outb (int dev, int port, unsigned char val)
__attribute__((weak, alias("__ide_outb")));
unsigned char inline
__ide_inb(int dev, int port)
{
uchar val;
val = inb((ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
dev, port, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)), val);
return val;
}
unsigned char inline ide_inb(int dev, int port)
__attribute__((weak, alias("__ide_inb")));
#ifdef __PPC__
# ifdef CONFIG_AMIGAONEG3SE
static void

6
common/cmd_mfsl.c
View File

@ -183,7 +183,7 @@ int do_frd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
return 1;
}
printf ("%01x: 0x%08lx - %s %s read\n", fslnum, num,
printf ("%01x: 0x%08x - %s %s read\n", fslnum, num,
blocking < 2 ? "non blocking" : "blocking",
((blocking == 1) || (blocking == 3)) ? "control" : "data" );
return 0;
@ -341,7 +341,7 @@ int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
return 1;
}
printf ("%01x: 0x%08lx - %s %s write\n", fslnum, num,
printf ("%01x: 0x%08x - %s %s write\n", fslnum, num,
blocking < 2 ? "non blocking" : "blocking",
((blocking == 1) || (blocking == 3)) ? "control" : "data" );
return 0;
@ -382,7 +382,7 @@ int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
puts ("Unsupported register\n");
return 1;
}
printf (": 0x%08lx\n", val);
printf (": 0x%08x\n", val);
return 0;
}

21
common/dlmalloc.c
View File

@ -1457,7 +1457,7 @@ typedef struct malloc_chunk* mbinptr;
indexing, maintain locality, and avoid some initialization tests.
*/
#define top (bin_at(0)->fd) /* The topmost chunk */
#define top (av_[2]) /* The topmost chunk */
#define last_remainder (bin_at(1)) /* remainder from last split */
@ -1552,13 +1552,14 @@ void malloc_bin_reloc (void)
#define BINBLOCKWIDTH 4 /* bins per block */
#define binblocks (bin_at(0)->size) /* bitvector of nonempty blocks */
#define binblocks_r ((INTERNAL_SIZE_T)av_[1]) /* bitvector of nonempty blocks */
#define binblocks_w (av_[1])
/* bin<->block macros */
#define idx2binblock(ix) ((unsigned)1 << (ix / BINBLOCKWIDTH))
#define mark_binblock(ii) (binblocks |= idx2binblock(ii))
#define clear_binblock(ii) (binblocks &= ~(idx2binblock(ii)))
#define mark_binblock(ii) (binblocks_w = (mbinptr)(binblocks_r | idx2binblock(ii)))
#define clear_binblock(ii) (binblocks_w = (mbinptr)(binblocks_r & ~(idx2binblock(ii))))
@ -2250,17 +2251,17 @@ Void_t* mALLOc(bytes) size_t bytes;
search for best fitting chunk by scanning bins in blockwidth units.
*/
if ( (block = idx2binblock(idx)) <= binblocks)
if ( (block = idx2binblock(idx)) <= binblocks_r)
{
/* Get to the first marked block */
if ( (block & binblocks) == 0)
if ( (block & binblocks_r) == 0)
{
/* force to an even block boundary */
idx = (idx & ~(BINBLOCKWIDTH - 1)) + BINBLOCKWIDTH;
block <<= 1;
while ((block & binblocks) == 0)
while ((block & binblocks_r) == 0)
{
idx += BINBLOCKWIDTH;
block <<= 1;
@ -2315,7 +2316,7 @@ Void_t* mALLOc(bytes) size_t bytes;
{
if ((startidx & (BINBLOCKWIDTH - 1)) == 0)
{
binblocks &= ~block;
av_[1] = (mbinptr)(binblocks_r & ~block);
break;
}
--startidx;
@ -2324,9 +2325,9 @@ Void_t* mALLOc(bytes) size_t bytes;
/* Get to the next possibly nonempty block */
if ( (block <<= 1) <= binblocks && (block != 0) )
if ( (block <<= 1) <= binblocks_r && (block != 0) )
{
while ((block & binblocks) == 0)
while ((block & binblocks_r) == 0)
{
idx += BINBLOCKWIDTH;
block <<= 1;

19
common/lcd.c
View File

@ -678,6 +678,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
/* Set color map */
for (i=0; i<colors; ++i) {
bmp_color_table_entry_t cte = bmp->color_table[i];
#if !defined(CONFIG_ATMEL_LCD)
ushort colreg =
( ((cte.red) << 8) & 0xf800) |
( ((cte.green) << 3) & 0x07e0) |
@ -691,6 +692,9 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
cmap++;
#elif defined(CONFIG_MPC823)
cmap--;
#endif
#else /* CONFIG_ATMEL_LCD */
lcd_setcolreg(i, cte.red, cte.green, cte.blue);
#endif
}
}
@ -727,7 +731,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
for (i = 0; i < height; ++i) {
WATCHDOG_RESET();
for (j = 0; j < width ; j++)
#if defined(CONFIG_PXA250)
#if defined(CONFIG_PXA250) || defined(CONFIG_ATMEL_LCD)
*(fb++) = *(bmap++);
#elif defined(CONFIG_MPC823) || defined(CONFIG_MCC200)
*(fb++)=255-*(bmap++);
@ -740,6 +744,9 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
}
#endif
#ifdef CONFIG_VIDEO_BMP_GZIP
extern bmp_image_t *gunzip_bmp(unsigned long addr, unsigned long *lenp);
#endif
static void *lcd_logo (void)
{
@ -761,6 +768,16 @@ static void *lcd_logo (void)
addr = simple_strtoul(s, NULL, 16);
do_splash = 0;
#ifdef CONFIG_VIDEO_BMP_GZIP
bmp_image_t *bmp = (bmp_image_t *)addr;
unsigned long len;
if (!((bmp->header.signature[0]=='B') &&
(bmp->header.signature[1]=='M'))) {
addr = (ulong)gunzip_bmp(addr, &len);
}
#endif
if (lcd_display_bitmap (addr, 0, 0) == 0) {
return ((void *)lcd_base);
}

4
common/main.c
View File

@ -116,7 +116,7 @@ static __inline__ int abortboot(int bootdelay)
u_int i;
# ifdef CONFIG_AUTOBOOT_PROMPT
printf(CONFIG_AUTOBOOT_PROMPT, bootdelay);
printf(CONFIG_AUTOBOOT_PROMPT);
# endif
# ifdef CONFIG_AUTOBOOT_DELAY_STR
@ -212,7 +212,7 @@ static __inline__ int abortboot(int bootdelay)
int abort = 0;
#ifdef CONFIG_MENUPROMPT
printf(CONFIG_MENUPROMPT, bootdelay);
printf(CONFIG_MENUPROMPT);
#else
printf("Hit any key to stop autoboot: %2d ", bootdelay);
#endif

2
cpu/microblaze/interrupts.c
View File

@ -203,7 +203,7 @@ int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
for (i = 0; i < CFG_INTC_0_NUM; i++) {
if (act->handler != (interrupt_handler_t*) def_hdlr) {
printf ("%02d %08lx %08lx %d\n", i,
printf ("%02d %08x %08x %d\n", i,
(int)act->handler, (int)act->arg, act->count);
}
act++;

2
cpu/mips/au1x00_serial.c
View File

@ -76,7 +76,7 @@ void serial_setbrg (void)
sd = (*sys_powerctrl & 0x03) + 2;
/* calulate 2x baudrate and round */
divisorx2 = ((CFG_HZ/(sd * 16 * CONFIG_BAUDRATE)));
divisorx2 = ((CFG_MIPS_TIMER_FREQ/(sd * 16 * CONFIG_BAUDRATE)));
if (divisorx2 & 0x01)
divisorx2 = divisorx2 + 1;

47
cpu/mpc8260/speed.c
View File

@ -162,6 +162,30 @@ int get_clocks (void)
gd->cpu_clk = clkin;
}
#ifdef CONFIG_PCI
gd->pci_clk = clkin;
if (sccr & SCCR_PCI_MODE) {
uint pci_div;
uint pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT;
if (sccr & SCCR_PCI_MODCK) {
pci_div = 2;
if (pcidf == 9) {
pci_div *= 5;
} else if (pcidf == 0xB) {
pci_div *= 6;
} else {
pci_div *= (pcidf + 1);
}
} else {
pci_div = pcidf + 1;
}
gd->pci_clk = (gd->cpm_clk * 2) / pci_div;
}
#endif
return (0);
}
@ -220,26 +244,9 @@ int prt_8260_clks (void)
printf (" - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n",
gd->cpu_clk, gd->cpm_clk, gd->bus_clk);
if (sccr & SCCR_PCI_MODE) {
uint pci_div;
uint pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT;
if (sccr & SCCR_PCI_MODCK) {
pci_div = 2;
if (pcidf == 9) {
pci_div *= 5;
} else if (pcidf == 0xB) {
pci_div *= 6;
} else {
pci_div *= (pcidf + 1);
}
} else {
pci_div = pcidf + 1;
}
printf (" - pci_clk %10ld\n", (gd->cpm_clk * 2) / pci_div);
}
#ifdef CONFIG_PCI
printf (" - pci_clk %10ld\n", gd->pci_clk);
#endif
putc ('\n');
return (0);

1
cpu/nios2/interrupts.c
View File

@ -27,6 +27,7 @@
#include <nios2.h>
#include <nios2-io.h>
#include <asm/types.h>
#include <asm/io.h>
#include <asm/ptrace.h>
#include <common.h>

2
cpu/nios2/sysid.c
View File

@ -40,7 +40,7 @@ void display_sysid (void)
stamp = readl (&sysid->timestamp);
localtime_r (&stamp, &t);
asctime_r (&t, asc);
printf ("SYSID : %08x, %s", readl (&sysid->id), asc);
printf ("SYSID : %08lx, %s", readl (&sysid->id), asc);
}

24
cpu/ppc4xx/44x_spd_ddr2.c
View File

@ -1159,50 +1159,50 @@ static void program_codt(unsigned long *dimm_populated,
if (dimm_type == SDRAM_DDR2) {
codt |= SDRAM_CODT_DQS_1_8_V_DDR2;
if ((total_dimm == 1) && (firstSlot == TRUE)) {
if (total_rank == 1) {
if (total_rank == 1) { /* PUUU */
codt |= CALC_ODT_R(0);
modt0 = CALC_ODT_W(0);
modt1 = 0x00000000;
modt2 = 0x00000000;
modt3 = 0x00000000;
}
if (total_rank == 2) {
if (total_rank == 2) { /* PPUU */
codt |= CALC_ODT_R(0) | CALC_ODT_R(1);
modt0 = CALC_ODT_W(0);
modt1 = CALC_ODT_W(0);
modt0 = CALC_ODT_W(0) | CALC_ODT_W(1);
modt1 = 0x00000000;
modt2 = 0x00000000;
modt3 = 0x00000000;
}
} else if ((total_dimm == 1) && (firstSlot != TRUE)) {
if (total_rank == 1) {
if (total_rank == 1) { /* UUPU */
codt |= CALC_ODT_R(2);
modt0 = 0x00000000;
modt1 = 0x00000000;
modt2 = CALC_ODT_W(2);
modt3 = 0x00000000;
}
if (total_rank == 2) {
if (total_rank == 2) { /* UUPP */
codt |= CALC_ODT_R(2) | CALC_ODT_R(3);
modt0 = 0x00000000;
modt1 = 0x00000000;
modt2 = CALC_ODT_W(2);
modt3 = CALC_ODT_W(2);
modt2 = CALC_ODT_W(2) | CALC_ODT_W(3);
modt3 = 0x00000000;
}
}
if (total_dimm == 2) {
if (total_rank == 2) {
if (total_rank == 2) { /* PUPU */
codt |= CALC_ODT_R(0) | CALC_ODT_R(2);
modt0 = CALC_ODT_RW(2);
modt1 = 0x00000000;
modt2 = CALC_ODT_RW(0);
modt3 = 0x00000000;
}
if (total_rank == 4) {
if (total_rank == 4) { /* PPPP */
codt |= CALC_ODT_R(0) | CALC_ODT_R(1) |
CALC_ODT_R(2) | CALC_ODT_R(3);
modt0 = CALC_ODT_RW(2);
modt0 = CALC_ODT_RW(2) | CALC_ODT_RW(3);
modt1 = 0x00000000;
modt2 = CALC_ODT_RW(0);
modt2 = CALC_ODT_RW(0) | CALC_ODT_RW(1);
modt3 = 0x00000000;
}
}

5
cpu/pxa/mmc.c
View File

@ -559,11 +559,6 @@ mmc_init(int verbose)
set_GPIO_mode(GPIO8_MMCCS0_MD);
#endif
CKEN |= CKEN12_MMC; /* enable MMC unit clock */
#if defined(CONFIG_ADSVIX)
/* turn on the power */
GPCR(114) = GPIO_bit(114);
udelay(1000);
#endif
MMC_CLKRT = MMC_CLKRT_0_3125MHZ;
MMC_RESTO = MMC_RES_TO_MAX;

15
doc/README.autoboot
View File

@ -114,10 +114,17 @@ What they do
CONFIG_AUTOBOOT_PROMPT is displayed before the boot delay
selected by CONFIG_BOOTDELAY starts. If it is not defined
there is no output indicating that autoboot is in progress.
If "%d" is included, it is replaced by the number of seconds
remaining before autoboot will start, but it does not count
down the seconds. "autoboot in %d seconds\n" is a reasonable
prompt.
Note that CONFIG_AUTOBOOT_PROMPT is used as the (only)
argument to a printf() call, so it may contain '%' format
specifications, provided that it also includes, sepearated by
commas exactly like in a printf statement, the required
arguments. It is the responsibility of the user to select only
such arguments that are valid in the given context. A
reasonable prompt could be defined as
#define CONFIG_AUTOBOOT_PROMPT \
"autoboot in %d seconds\n",bootdelay
If CONFIG_AUTOBOOT_DELAY_STR or "bootdelaykey" is specified
and this string is received from console input before

2
doc/README.qemu_mips
View File

@ -15,4 +15,4 @@ create image:
# dd of=flash bs=1k count=4k if=/dev/zero
# dd of=flash bs=1k conv=notrunc if=u-boot.bin
start it:
# qemu-system-mips -pflash flash -monitor null -nographic
# qemu-system-mips -M mips -pflash flash -monitor null -nographic

18
drivers/i2c/fsl_i2c.c
View File

@ -143,12 +143,15 @@ void
i2c_init(int speed, int slaveadd)
{
struct fsl_i2c *dev;
unsigned int temp;
dev = (struct fsl_i2c *) (CFG_IMMR + CFG_I2C_OFFSET);
writeb(0, &dev->cr); /* stop I2C controller */
udelay(5); /* let it shutdown in peace */
i2c_bus_speed[0] = set_i2c_bus_speed(dev, gd->i2c1_clk, speed);
temp = set_i2c_bus_speed(dev, gd->i2c1_clk, speed);
if (gd->flags & GD_FLG_RELOC)
i2c_bus_speed[0] = temp;
writeb(slaveadd << 1, &dev->adr); /* write slave address */
writeb(0x0, &dev->sr); /* clear status register */
writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */
@ -158,7 +161,9 @@ i2c_init(int speed, int slaveadd)
writeb(0, &dev->cr); /* stop I2C controller */
udelay(5); /* let it shutdown in peace */
i2c_bus_speed[1] = set_i2c_bus_speed(dev, gd->i2c2_clk, speed);
temp = set_i2c_bus_speed(dev, gd->i2c2_clk, speed);
if (gd->flags & GD_FLG_RELOC)
i2c_bus_speed[1] = temp;
writeb(slaveadd << 1, &dev->adr); /* write slave address */
writeb(0x0, &dev->sr); /* clear status register */
writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */
@ -168,12 +173,11 @@ i2c_init(int speed, int slaveadd)
static __inline__ int
i2c_wait4bus(void)
{
ulong timeval = get_timer(0);
unsigned long long timeval = get_ticks();
while (readb(&i2c_dev[i2c_bus_num]->sr) & I2C_SR_MBB) {
if (get_timer(timeval) > I2C_TIMEOUT) {
if ((get_ticks() - timeval) > usec2ticks(I2C_TIMEOUT))
return -1;
}
}
return 0;
@ -183,7 +187,7 @@ static __inline__ int
i2c_wait(int write)
{
u32 csr;
ulong timeval = get_timer(0);
unsigned long long timeval = get_ticks();
do {
csr = readb(&i2c_dev[i2c_bus_num]->sr);
@ -208,7 +212,7 @@ i2c_wait(int write)
}
return 0;
} while (get_timer (timeval) < I2C_TIMEOUT);
} while ((get_ticks() - timeval) < usec2ticks(I2C_TIMEOUT));
debug("i2c_wait: timed out\n");
return -1;

16
drivers/mmc/atmel_mci.c
View File

@ -135,10 +135,10 @@ mmc_cmd(unsigned long cmd, unsigned long arg,
status = mmci_readl(SR);
} while (!(status & MMCI_BIT(CMDRDY)));
pr_debug("mmc: status 0x%08lx\n", status);
pr_debug("mmc: status 0x%08x\n", status);
if (status & error_flags) {
printf("mmc: command %lu failed (status: 0x%08lx)\n",
printf("mmc: command %lu failed (status: 0x%08x)\n",
cmd, status);
return -EIO;
}
@ -245,7 +245,7 @@ out:
read_error:
mmc_cmd(MMC_CMD_SEND_STATUS, mmc_rca << 16, &card_status, R1 | NCR);
printf("mmc: bread failed, status = %08x, card status = %08x\n",
printf("mmc: bread failed, status = %08x, card status = %08lx\n",
status, card_status);
goto out;
}
@ -284,13 +284,13 @@ static void sd_parse_cid(struct mmc_cid *cid, unsigned long *resp)
static void mmc_dump_cid(const struct mmc_cid *cid)
{
printf("Manufacturer ID: %02lX\n", cid->mid);
printf("OEM/Application ID: %04lX\n", cid->oid);
printf("Manufacturer ID: %02X\n", cid->mid);
printf("OEM/Application ID: %04X\n", cid->oid);
printf("Product name: %s\n", cid->pnm);
printf("Product Revision: %lu.%lu\n",
printf("Product Revision: %u.%u\n",
cid->prv >> 4, cid->prv & 0x0f);
printf("Product Serial Number: %lu\n", cid->psn);
printf("Manufacturing Date: %02lu/%02lu\n",
printf("Manufacturing Date: %02u/%02u\n",
cid->mdt >> 4, cid->mdt & 0x0f);
}
@ -501,7 +501,7 @@ int mmc_init(int verbose)
mmc_blkdev.part_type = PART_TYPE_DOS;
mmc_blkdev.block_read = mmc_bread;
sprintf((char *)mmc_blkdev.vendor,
"Man %02x%04x Snr %08x",
"Man %02x%04x Snr %08lx",
cid.mid, cid.oid, cid.psn);
strncpy((char *)mmc_blkdev.product, cid.pnm,
sizeof(mmc_blkdev.product));

5
drivers/mtd/cfi_flash.c
View File

@ -306,6 +306,9 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
int i;
int cword_offset;
int cp_offset;
#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
u32 cmd_le = cpu_to_le32(cmd);
#endif
uchar val;
uchar *cp = (uchar *) cmdbuf;
@ -313,7 +316,7 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
cword_offset = (info->portwidth-i)%info->chipwidth;
#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
cp_offset = info->portwidth - i;
val = *((uchar*)&cmd + cword_offset);
val = *((uchar*)&cmd_le + cword_offset);
#else
cp_offset = i - 1;
val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);

6
drivers/mtd/spi/atmel.c
View File

@ -205,7 +205,7 @@ static int dataflash_write_at45(struct spi_flash *flash,
byte_addr = 0;
}
debug("SF: AT45: Successfully programmed %u bytes @ 0x%x\n",
debug("SF: AT45: Successfully programmed %zu bytes @ 0x%x\n",
len, offset);
ret = 0;
@ -268,7 +268,7 @@ int dataflash_erase_at45(struct spi_flash *flash, u32 offset, size_t len)
page_addr++;
}
debug("SF: AT45: Successfully erased %u bytes @ 0x%x\n",
debug("SF: AT45: Successfully erased %zu bytes @ 0x%x\n",
len, offset);
ret = 0;
@ -351,7 +351,7 @@ struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode)
* params->blocks_per_sector
* params->nr_sectors;
debug("SF: Detected %s with page size %u, total %u bytes\n",
debug("SF: Detected %s with page size %lu, total %u bytes\n",
params->name, page_size, asf->flash.size);
return &asf->flash;

13
drivers/net/e1000.c
View File

@ -513,9 +513,11 @@ e1000_read_mac_addr(struct eth_device *nic)
nic->enetaddr[5] += 1;
}
#ifdef CONFIG_E1000_FALLBACK_MAC
if ( *(u32*)(nic->enetaddr) == 0 || *(u32*)(nic->enetaddr) == ~0 )
for ( i=0; i < NODE_ADDRESS_SIZE; i++ )
nic->enetaddr[i] = (CONFIG_E1000_FALLBACK_MAC >> (8*(5-i))) & 0xff;
if ( *(u32*)(nic->enetaddr) == 0 || *(u32*)(nic->enetaddr) == ~0 ) {
unsigned char fb_mac[NODE_ADDRESS_SIZE] = CONFIG_E1000_FALLBACK_MAC;
memcpy (nic->enetaddr, fb_mac, NODE_ADDRESS_SIZE);
}
#endif
#else
/*
@ -531,10 +533,9 @@ e1000_read_mac_addr(struct eth_device *nic)
DEBUGFUNC();
s = getenv ("ethaddr");
if (s == NULL){
if (s == NULL) {
return -E1000_ERR_EEPROM;
}
else{
} else {
for(ii = 0; ii < 6; ii++) {
nic->enetaddr[ii] = s ? simple_strtoul (s, &e, 16) : 0;
if (s){

12
drivers/serial/Makefile
View File

@ -25,18 +25,18 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libserial.a
COBJS-y += atmel_usart.o
COBJS-y += mcfuart.o
COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o
COBJS-$(CONFIG_MCFUART) += mcfuart.o
COBJS-y += ns9750_serial.o
COBJS-y += ns16550.o
COBJS-y += s3c4510b_uart.o
COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o
COBJS-y += serial.o
COBJS-y += serial_max3100.o
COBJS-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o
COBJS-y += serial_pl010.o
COBJS-y += serial_pl011.o
COBJS-y += serial_xuartlite.o
COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
COBJS-y += serial_sh.o
COBJS-y += usbtty.o
COBJS-$(CONFIG_USB_TTY) += usbtty.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)

3
drivers/serial/atmel_usart.c
View File

@ -17,7 +17,6 @@
*/
#include <common.h>
#ifdef CONFIG_ATMEL_USART
#include <asm/io.h>
#include <asm/arch/clk.h>
#include <asm/arch/memory-map.h>
@ -96,5 +95,3 @@ int serial_tstc(void)
{
return (usart3_readl(CSR) & USART3_BIT(RXRDY)) != 0;
}
#endif /* CONFIG_ATMEL_USART */

3
drivers/serial/mcfuart.c
View File

@ -29,8 +29,6 @@
#include <common.h>
#ifdef CONFIG_MCFUART
#include <asm/immap.h>
#include <asm/uart.h>
@ -130,4 +128,3 @@ void serial_setbrg(void)
uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED;
}
#endif /* CONFIG_MCFUART */

4
drivers/serial/s3c4510b_uart.c
View File

@ -45,8 +45,6 @@
#include <common.h>
#ifdef CONFIG_DRIVER_S3C4510_UART
#include <asm/hardware.h>
#include "s3c4510b_uart.h"
@ -212,5 +210,3 @@ void serial_puts (const char *s)
uart->m_ctrl.bf.sendBreak = 0;
}
#endif

4
drivers/serial/serial_max3100.c
View File

@ -26,8 +26,6 @@
#include <common.h>
#include <watchdog.h>
#ifdef CONFIG_MAX3100_SERIAL
DECLARE_GLOBAL_DATA_PTR;
/**************************************************************/
@ -298,5 +296,3 @@ int serial_tstc(void)
void serial_setbrg(void)
{
}
#endif

18
drivers/serial/serial_xuartlite.c
View File

@ -27,8 +27,6 @@
#include <config.h>
#include <asm/io.h>
#ifdef CONFIG_XILINX_UARTLITE
#define RX_FIFO_OFFSET 0 /* receive FIFO, read only */
#define TX_FIFO_OFFSET 4 /* transmit FIFO, write only */
#define STATUS_REG_OFFSET 8 /* status register, read only */
@ -56,8 +54,13 @@ void serial_putc(const char c)
{
if (c == '\n')
serial_putc('\r');
<<<<<<< .merge_file_kaofiJ
while (in_be32((void *)UARTLITE_STATUS) & SR_TX_FIFO_FULL);
out_be32((void *)UARTLITE_TX_FIFO, (unsigned char) (c & 0xff));
=======
while (in_be32((u32 *) UARTLITE_STATUS) & SR_TX_FIFO_FULL);
out_be32((u32 *) UARTLITE_TX_FIFO, (unsigned char) (c & 0xff));
>>>>>>> .merge_file_zSz9BG
}
void serial_puts(const char * s)
@ -69,13 +72,20 @@ void serial_puts(const char * s)
int serial_getc(void)
{
<<<<<<< .merge_file_kaofiJ
while (!(in_be32((void *)UARTLITE_STATUS) & SR_RX_FIFO_VALID_DATA));
return in_be32((void *)UARTLITE_RX_FIFO) & 0xff;
=======
while (!(in_be32((u32 *) UARTLITE_STATUS) & SR_RX_FIFO_VALID_DATA));
return in_be32((u32 *) UARTLITE_RX_FIFO) & 0xff;
>>>>>>> .merge_file_zSz9BG
}
int serial_tstc(void)
{
<<<<<<< .merge_file_kaofiJ
return (in_be32((void *)UARTLITE_STATUS) & SR_RX_FIFO_VALID_DATA);
=======
return (in_be32((u32 *) UARTLITE_STATUS) & SR_RX_FIFO_VALID_DATA);
>>>>>>> .merge_file_zSz9BG
}
#endif /* CONFIG_MICROBLZE */

5
drivers/serial/usbtty.c
View File

@ -23,8 +23,6 @@
#include <common.h>
#ifdef CONFIG_USB_TTY
#include <circbuf.h>
#include <devices.h>
#include "usbtty.h"
@ -1007,6 +1005,3 @@ void usbtty_poll (void)
udc_irq();
}
#endif

2
drivers/usb/usbdcore.c
View File

@ -552,7 +552,7 @@ struct urb *usbd_alloc_urb (struct usb_device_instance *device,
struct urb *urb;
if (!(urb = (struct urb *) malloc (sizeof (struct urb)))) {
usberr (" F A T A L: malloc(%u) FAILED!!!!",
usberr (" F A T A L: malloc(%zu) FAILED!!!!",
sizeof (struct urb));
return NULL;
}

4
drivers/video/atmel_lcdfb.c
View File

@ -100,7 +100,11 @@ void lcd_ctrl_init(void *lcdbase)
value << ATMEL_LCDC_CLKVAL_OFFSET);
/* Initialize control register 2 */
#ifdef CONFIG_AVR32
value = ATMEL_LCDC_MEMOR_BIG | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE;
#else
value = ATMEL_LCDC_MEMOR_LITTLE | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE;
#endif
if (panel_info.vl_tft)
value |= ATMEL_LCDC_DISTYPE_TFT;

1
include/api_public.h
View File

@ -126,6 +126,7 @@ typedef unsigned long lbastart_t;
#define DT_STOR_SCSI 0x0020
#define DT_STOR_USB 0x0040
#define DT_STOR_MMC 0x0080
#define DT_STOR_SATA 0x0100
#define DEV_STA_CLOSED 0x0000 /* invalid, closed */
#define DEV_STA_OPEN 0x0001 /* open i.e. active */

4
include/asm-arm/arch-at91rm9200/AT91RM9200.h
View File

@ -25,6 +25,7 @@
#ifndef AT91RM9200_H
#define AT91RM9200_H
#ifndef __ASSEMBLY__
typedef volatile unsigned int AT91_REG; /* Hardware register definition */
/*****************************************************************************/
@ -780,4 +781,5 @@ typedef struct _AT91S_PDC
#define AT91C_PIOB_ODR ((AT91_REG *) 0xFFFFF614) /* (PIOB) Output Disable Registerr */
#define AT91C_PIOB_PDSR ((AT91_REG *) 0xFFFFF63C) /* (PIOB) Pin Data Status Register */
#endif
#endif /* __ASSEMBLY__ */
#endif /* AT91RM9200_H */

2
include/asm-avr32/io.h
View File

@ -22,6 +22,8 @@
#ifndef __ASM_AVR32_IO_H
#define __ASM_AVR32_IO_H
#include <asm/types.h>
#ifdef __KERNEL__
/*

6
include/asm-avr32/sysreg.h
View File

@ -273,7 +273,9 @@
| SYSREG_BF(name,value))
/* Register access macros */
#define sysreg_read(reg) __builtin_mfsr(SYSREG_##reg)
#define sysreg_write(reg, value) __builtin_mtsr(SYSREG_##reg, value)
#define sysreg_read(reg) \
((unsigned long)__builtin_mfsr(SYSREG_##reg))
#define sysreg_write(reg, value) \
__builtin_mtsr(SYSREG_##reg, value)
#endif /* __ASM_AVR32_SYSREG_H__ */

3
include/asm-nios2/types.h
View File

@ -52,6 +52,9 @@ typedef unsigned long long u64;
/* Dma addresses are 32-bits wide. */
typedef u32 dma_addr_t;
typedef unsigned long phys_addr_t;
typedef unsigned long phys_size_t;
#endif /* __KERNEL__ */
#endif /* __ASM_NIOS2_TYPES_H */

9
include/asm-ppc/fsl_lbc.h
View File

@ -298,4 +298,13 @@
#define LCRR_CLKDIV_4 0x00000004
#define LCRR_CLKDIV_8 0x00000008
/* LTEDR - Transfer Error Check Disable Register
*/
#define LTEDR_BMD 0x80000000 /* Bus monitor disable */
#define LTEDR_PARD 0x20000000 /* Parity error checking disabled */
#define LTEDR_WPD 0x04000000 /* Write protect error checking diable */
#define LTEDR_WARA 0x00800000 /* Write-after-read-atomic error checking diable */
#define LTEDR_RAWA 0x00400000 /* Read-after-write-atomic error checking disable */
#define LTEDR_CSD 0x00080000 /* Chip select error checking disable */
#endif /* __ASM_PPC_FSL_LBC_H */

3
include/asm-ppc/global_data.h
View File

@ -51,6 +51,9 @@ typedef struct global_data {
unsigned long cpm_clk;
unsigned long scc_clk;
unsigned long brg_clk;
#ifdef CONFIG_PCI
unsigned long pci_clk;
#endif
#endif
unsigned long mem_clk;
#if defined(CONFIG_MPC83XX)

2
include/command.h
View File

@ -27,6 +27,8 @@
#ifndef __COMMAND_H
#define __COMMAND_H
#include <config.h>
#ifndef NULL
#define NULL 0
#endif

2
include/configs/ADS860.h
View File

@ -51,7 +51,7 @@
/* This is picked up again in fads.h */
#define FADS_COMMANDS_ALREADY_DEFINED
#include "fads.h"
#include "../../board/fads/fads.h"
#define CFG_PC_IDE_RESET ((ushort)0x0008) /* PC 12 */

3
include/configs/APC405.h
View File

@ -193,7 +193,8 @@
/* If a long serial cable is connected but */
/* other end is dead, garbage will be read */
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d seconds\n"
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#undef CONFIG_AUTOBOOT_DELAY_STR
#define CONFIG_AUTOBOOT_STOP_STR " "

2
include/configs/Adder.h
View File

@ -131,7 +131,7 @@
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
#define CFG_MONITOR_BASE TEXT_BASE
#define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 KB for Monitor */
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 KB for Monitor */
#ifdef CONFIG_BZIP2
#define CFG_MALLOC_LEN (2500 << 10) /* Reserve ~2.5 MB for malloc() */
#else

3
include/configs/AmigaOneG3SE.h
View File

@ -371,7 +371,8 @@
#define CONFIG_BOOTDELAY 5 /* Boot automatically after five seconds */
#define CONFIG_PREBOOT ""
#define CONFIG_BOOTCOMMAND "fdcboot; diskboot"
#define CONFIG_MENUPROMPT "Press any key to interrupt autoboot: %2d "
#define CONFIG_MENUPROMPT \
"Press any key to interrupt autoboot: %2d ", bootdelay
#define CONFIG_MENUKEY ' '
#define CONFIG_MENUCOMMAND "menu"
/* #define CONFIG_AUTOBOOT_KEYED */

5
include/configs/CPCI405DT.h
View File

@ -152,8 +152,9 @@
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
/* Only interrupt boot if special string is typed */
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds\n"
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT \
"Autobooting in %d seconds\n", bootdelay
#undef CONFIG_AUTOBOOT_DELAY_STR
#undef CONFIG_AUTOBOOT_STOP_STR /* defined via environment var */
#define CONFIG_AUTOBOOT_STOP_STR2 "esdesd" /* esd special for esd access*/

5
include/configs/DU440.h
View File

@ -345,8 +345,9 @@ int du440_phy_addr(int devnum);
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d seconds\n"
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
#define CONFIG_AUTOBOOT_STOP_STR " "

2
include/configs/FADS860T.h
View File

@ -38,7 +38,7 @@
#define CONFIG_DRAM_50MHZ 1
#define CONFIG_SDRAM_50MHZ 1
#include "fads.h"
#include "../../board/fads/fads.h"
#ifdef USE_REAL_FLASH_VALUES
/*

5
include/configs/GTH.h
View File

@ -62,8 +62,9 @@
/* Only interrupt boot if space is pressed */
/* If a long serial cable is connected but */
/* other end is dead, garbage will be read */
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT "Press space to abort autoboot in %d second\n"
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT \
"Press space to abort autoboot in %d second\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
#define CONFIG_AUTOBOOT_STOP_STR " "

3
include/configs/KUP4K.h
View File

@ -488,7 +488,8 @@
#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */
#if 0
#define CONFIG_AUTOBOOT_PROMPT "Boote in %d Sekunden - stop mit \"2\"\n"
#define CONFIG_AUTOBOOT_PROMPT \
"Boote in %d Sekunden - stop mit \"2\"\n", bootdelay
#endif
#define CONFIG_AUTOBOOT_STOP_STR "." /* easy to stop for now */
#define CONFIG_SILENT_CONSOLE 1

3
include/configs/KUP4X.h
View File

@ -454,7 +454,8 @@
#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */
#if 0
#define CONFIG_AUTOBOOT_PROMPT "Boote in %d Sekunden - stop mit \"2\"\n"
#define CONFIG_AUTOBOOT_PROMPT \
"Boote in %d Sekunden - stop mit \"2\"\n", bootdelay
#endif
#define CONFIG_AUTOBOOT_STOP_STR "." /* easy to stop for now */
#define CONFIG_SILENT_CONSOLE 1

2
include/configs/MPC86xADS.h
View File

@ -41,7 +41,7 @@
#define CONFIG_DRAM_50MHZ 1
#define CONFIG_SDRAM_50MHZ 1
#include "fads.h"
#include "../../board/fads/fads.h"
#define CFG_OR5_PRELIM 0xFFFF8110 /* 64Kbyte address space */
#define CFG_BR5_PRELIM (CFG_PHYDEV_ADDR | BR_PS_8 | BR_V)

2
include/configs/MPC885ADS.h
View File

@ -27,7 +27,7 @@
#define CONFIG_SDRAM_50MHZ 1
#include "fads.h"
#include "../../board/fads/fads.h"
#define CFG_OR5_PRELIM 0xFFFF8110 /* 64Kbyte address space */
#define CFG_BR5_PRELIM (CFG_PHYDEV_ADDR | BR_PS_8 | BR_V)

6
include/configs/MVBC_P.h
View File

@ -40,7 +40,7 @@
#define CONFIG_MISC_INIT_R 1
#define CFG_CACHELINE_SIZE 32
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#ifdef (CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5
#endif
@ -255,7 +255,7 @@
#define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_E1000
#define CONFIG_E1000_FALLBACK_MAC 0xb6b445ebfbc0
#define CONFIG_E1000_FALLBACK_MAC { 0xb6, 0xb4, 0x45, 0xeb, 0xfb, 0xc0 }
#undef CONFIG_MPC5xxx_FEC
#undef CONFIG_PHY_ADDR
#define CONFIG_NETDEV eth0
@ -268,7 +268,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#undef CFG_LONGHELP
#define CFG_PROMPT "=> "
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#ifdef (CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024
#else
#define CFG_CBSIZE 256

7
include/configs/MVBLUE.h
View File

@ -59,17 +59,18 @@
#define CONFIG_CLOCKS_IN_MHZ 1
#define CONFIG_BOARD_TYPES 1
#define CONFIG_BOARD_TYPES 1
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOT_RETRY_TIME -1
#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds (stop with 's')...\n"
#define CONFIG_AUTOBOOT_PROMPT \
"autoboot in %d seconds (stop with 's')...\n", bootdelay
#define CONFIG_AUTOBOOT_STOP_STR "s"
#define CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_RESET_TO_RETRY 60

5
include/configs/NC650.h
View File

@ -65,9 +65,10 @@
#define CFG_MEASURE_CPUCLK
#define CFG_8XX_XIN CONFIG_8xx_OSCLK
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d seconds...\n"
#define CONFIG_AUTOBOOT_PROMPT \
"\nEnter password - autoboot in %d seconds...\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "ids"
#define CONFIG_BOOT_RETRY_TIME 900
#define CONFIG_BOOT_RETRY_MIN 30

5
include/configs/PLU405.h
View File

@ -154,8 +154,9 @@
/* Only interrupt boot if space is pressed */
/* If a long serial cable is connected but */
/* other end is dead, garbage will be read */
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d seconds\n"
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#undef CONFIG_AUTOBOOT_DELAY_STR
#define CONFIG_AUTOBOOT_STOP_STR " "

3
include/configs/PMC440.h
View File

@ -409,7 +409,8 @@
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d seconds\n"
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#undef CONFIG_AUTOBOOT_DELAY_STR
#define CONFIG_AUTOBOOT_STOP_STR " "

3
include/configs/RPXlite_DW.h
View File

@ -68,7 +68,8 @@
#ifdef DEPLOYMENT
#define CONFIG_BOOT_RETRY_TIME -1
#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds (stop with 'st')...\n"
#define CONFIG_AUTOBOOT_PROMPT \
"autoboot in %d seconds (stop with 'st')...\n", bootdelay
#define CONFIG_AUTOBOOT_STOP_STR "st"
#define CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_RESET_TO_RETRY 1

2
include/configs/SXNI855T.h
View File

@ -465,7 +465,7 @@
#if 1
#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */
#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n"
#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "delayabit"
#define CONFIG_AUTOBOOT_STOP_STR " " /* easy to stop for now */
#endif

365
include/configs/adsvix.h
View File

@ -1,365 +0,0 @@
/*
* (C) Copyright 2004
* Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
*
* (C) Copyright 2002
* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* Configuation settings for the LUBBOCK board.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_PXA27X 1 /* This is an PXA27x CPU */
#define CONFIG_ADSVIX 1 /* on a Adsvix Board */
#define CONFIG_MMC 1
#define BOARD_LATE_INIT 1
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
#define RTC
/*
* Size of malloc() pool
*/
#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
/*
* Hardware drivers
*/
/*
* select serial console configuration
*/
#define CONFIG_FFUART 1 /* we use FFUART on ADSVIX */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 38400
#define CONFIG_DOS_PARTITION 1
/*
* BOOTP options
*/
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
/*
* Command line configuration.
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_FAT
#define CONFIG_CMD_IDE
#define CONFIG_CMD_MMC
#define CONFIG_CMD_PCMCIA
#undef CONFIG_CMD_NET
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_BOOTDELAY 3
#define CONFIG_SERVERIP 192.168.1.99
#define CONFIG_BOOTCOMMAND "run boot_flash"
#define CONFIG_BOOTARGS "console=ttyS0,38400 ramdisk_size=12288"\
" rw root=/dev/ram initrd=0xa0800000,5m"
#define CONFIG_EXTRA_ENV_SETTINGS \
"program_boot_cf=" \
"mw.b 0xa0010000 0xff 0x20000; " \
"if pinit on && " \
"ide reset && " \
"fatload ide 0 0xa0010000 u-boot.bin; " \
"then " \
"protect off 0x0 0x1ffff; " \
"erase 0x0 0x1ffff; " \
"cp.b 0xa0010000 0x0 0x20000; " \
"fi\0" \
"program_uzImage_cf=" \
"mw.b 0xa0010000 0xff 0x180000; " \
"if pinit on && " \
"ide reset && " \
"fatload ide 0 0xa0010000 uzImage; " \
"then " \
"protect off 0x40000 0x1bffff; " \
"erase 0x40000 0x1bffff; " \
"cp.b 0xa0010000 0x40000 0x180000; " \
"fi\0" \
"program_ramdisk_cf=" \
"mw.b 0xa0010000 0xff 0x500000; " \
"if pinit on && " \
"ide reset && " \
"fatload ide 0 0xa0010000 ramdisk.gz; " \
"then " \
"protect off 0x1c0000 0x6bffff; " \
"erase 0x1c0000 0x6bffff; " \
"cp.b 0xa0010000 0x1c0000 0x500000; " \
"fi\0" \
"boot_cf=" \
"if pinit on && " \
"ide reset && " \
"fatload ide 0 0xa0030000 uzImage && " \
"fatload ide 0 0xa0800000 ramdisk.gz; " \
"then " \
"bootm 0xa0030000; " \
"fi\0" \
"program_boot_mmc=" \
"mw.b 0xa0010000 0xff 0x20000; " \
"if mmcinit && " \
"fatload mmc 0 0xa0010000 u-boot.bin; " \
"then " \
"protect off 0x0 0x1ffff; " \
"erase 0x0 0x1ffff; " \
"cp.b 0xa0010000 0x0 0x20000; " \
"fi\0" \
"program_uzImage_mmc=" \
"mw.b 0xa0010000 0xff 0x180000; " \
"if mmcinit && " \
"fatload mmc 0 0xa0010000 uzImage; " \
"then " \
"protect off 0x40000 0x1bffff; " \
"erase 0x40000 0x1bffff; " \
"cp.b 0xa0010000 0x40000 0x180000; " \
"fi\0" \
"program_ramdisk_mmc=" \
"mw.b 0xa0010000 0xff 0x500000; " \
"if mmcinit && " \
"fatload mmc 0 0xa0010000 ramdisk.gz; " \
"then " \
"protect off 0x1c0000 0x6bffff; " \
"erase 0x1c0000 0x6bffff; " \
"cp.b 0xa0010000 0x1c0000 0x500000; " \
"fi\0" \
"boot_mmc=" \
"if mmcinit && " \
"fatload mmc 0 0xa0030000 uzImage && " \
"fatload mmc 0 0xa0800000 ramdisk.gz; " \
"then " \
"bootm 0xa0030000; " \
"fi\0" \
"boot_flash=" \
"cp.b 0x1c0000 0xa0800000 0x500000; " \
"bootm 0x40000\0" \
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
/* #define CONFIG_INITRD_TAG 1 */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*
* Miscellaneous configurable options
*/
#define CFG_HUSH_PARSER 1
#define CFG_PROMPT_HUSH_PS2 "> "
#define CFG_LONGHELP /* undef to save memory */
#ifdef CFG_HUSH_PARSER
#define CFG_PROMPT "$ " /* Monitor Command Prompt */
#else
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
#endif
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_DEVICE_NULLDEV 1
#define CFG_MEMTEST_START 0xa0400000 /* memtest works on */
#define CFG_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CFG_LOAD_ADDR 0xa1000000 /* default load address */
#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
#define CFG_CPUSPEED 0x207 /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */
/* valid baudrates */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CFG_MMC_BASE 0xF0000000
/*
* Stack sizes
*
* The stack sizes are set up in start.S using the settings below
*/
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
#endif
/*
* Physical Memory Map
*/
#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */
#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */
#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */
#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */
#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */
#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
#define CFG_DRAM_BASE 0xa0000000
#define CFG_DRAM_SIZE 0x04000000
#define CFG_FLASH_BASE PHYS_FLASH_1
/*
* GPIO settings
*/
#define CFG_GPSR0_VAL 0x00018004
#define CFG_GPSR1_VAL 0x004F0080
#define CFG_GPSR2_VAL 0x13EFC000
#define CFG_GPSR3_VAL 0x0006E032
#define CFG_GPCR0_VAL 0x084AFE1A
#define CFG_GPCR1_VAL 0x003003F2
#define CFG_GPCR2_VAL 0x0C014000
#define CFG_GPCR3_VAL 0x00000C00
#define CFG_GPDR0_VAL 0xCBC3BFFC
#define CFG_GPDR1_VAL 0x00FFABF3
#define CFG_GPDR2_VAL 0x1EEFFC00
#define CFG_GPDR3_VAL 0x0187EC32
#define CFG_GAFR0_L_VAL 0x84400000
#define CFG_GAFR0_U_VAL 0xA51A8010
#define CFG_GAFR1_L_VAL 0x699A955A
#define CFG_GAFR1_U_VAL 0x0005A0AA
#define CFG_GAFR2_L_VAL 0x40000000
#define CFG_GAFR2_U_VAL 0x0109A400
#define CFG_GAFR3_L_VAL 0x54000000
#define CFG_GAFR3_U_VAL 0x00001409
#define CFG_PSSR_VAL 0x20
/*
* Clock settings
*/
#define CFG_CKEN 0x00400200
#define CFG_CCCR 0x02000290 /* 520Mhz */
/* #define CFG_CCCR 0x02000210 416 Mhz */
/*
* Memory settings
*/
#define CFG_MSC0_VAL 0x23F2B3DB
#define CFG_MSC1_VAL 0x0000CCD1
#define CFG_MSC2_VAL 0x0000B884
#define CFG_MDCNFG_VAL 0x08000AC8
#define CFG_MDREFR_VAL 0x0000001E
#define CFG_MDMRS_VAL 0x00000000
#define CFG_FLYCNFG_VAL 0x00010001
#define CFG_SXCNFG_VAL 0x40044004
/*
* PCMCIA and CF Interfaces
*/
#define CFG_MECR_VAL 0x00000002
#define CFG_MCMEM0_VAL 0x00004204
#define CFG_MCMEM1_VAL 0x00000000
#define CFG_MCATT0_VAL 0x00010504
#define CFG_MCATT1_VAL 0x00000000
#define CFG_MCIO0_VAL 0x00008407
#define CFG_MCIO1_VAL 0x00000000
#define CONFIG_PXA_PCMCIA 1
#define CONFIG_PXA_IDE 1
#define CONFIG_PCMCIA_SLOT_A 1
/* just to keep build system happy */
#define CFG_PCMCIA_MEM_ADDR 0x28000000
#define CFG_PCMCIA_MEM_SIZE 0x04000000
#define CFG_IDE_MAXBUS 1
/* max. 1 IDE bus */
#define CFG_IDE_MAXDEVICE 1
/* max. 1 drive per IDE bus */
#define CFG_ATA_IDE0_OFFSET 0x0000
#define CFG_ATA_BASE_ADDR 0x20000000
/* Offset for data I/O */
#define CFG_ATA_DATA_OFFSET 0x1f0
/* Offset for normal register accesses */
#define CFG_ATA_REG_OFFSET 0x1f0
/* Offset for alternate registers */
#define CFG_ATA_ALT_OFFSET 0x3f0
/*
* FLASH and environment organization
*/
#define CFG_FLASH_CFI
#define CFG_FLASH_CFI_DRIVER 1
#define CFG_MONITOR_BASE 0
#define CFG_MONITOR_LEN 0x20000
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CFG_MAX_FLASH_SECT 4 + 255 /* max number of sectors on one chip */
/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */
/* write flash less slowly */
#define CFG_FLASH_USE_BUFFER_WRITE 1
/* Flash environment locations */
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_MONITOR_LEN) /* Addr of Environment Sector */
#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment */
#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */
#endif /* __CONFIG_H */

8
include/configs/apollon.h
View File

@ -103,14 +103,6 @@
*/
#define CONFIG_SERIAL1 1 /* UART1 on H4 */
/*
* I2C configuration
*/
#define CONFIG_HARD_I2C
#define CFG_I2C_SPEED 100000
#define CFG_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP24XX_I2C
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1

12
include/configs/at91rm9200dk.h
View File

@ -112,16 +112,11 @@
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_MII
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_AUTOSCRIPT
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_MISC
#undef CONFIG_CMD_LOADS
#define CFG_NAND_LEGACY
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
@ -137,6 +132,7 @@
#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)

4
include/configs/atngw100.h
View File

@ -82,8 +82,8 @@
#define CONFIG_BOOTDELAY 1
#define CONFIG_AUTOBOOT 1
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n"
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
#define CONFIG_AUTOBOOT_STOP_STR " "

4
include/configs/atstk1002.h
View File

@ -110,8 +110,8 @@
#define CONFIG_BOOTDELAY 1
#define CONFIG_AUTOBOOT 1
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n"
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
#define CONFIG_AUTOBOOT_STOP_STR " "

4
include/configs/atstk1003.h
View File

@ -110,8 +110,8 @@
#define CONFIG_BOOTDELAY 1
#define CONFIG_AUTOBOOT 1
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n"
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
#define CONFIG_AUTOBOOT_STOP_STR " "

4
include/configs/atstk1004.h
View File

@ -110,8 +110,8 @@
#define CONFIG_BOOTDELAY 1
#define CONFIG_AUTOBOOT 1
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n"
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
#define CONFIG_AUTOBOOT_STOP_STR " "

4
include/configs/atstk1006.h
View File

@ -110,8 +110,8 @@
#define CONFIG_BOOTDELAY 1
#define CONFIG_AUTOBOOT 1
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n"
#define CONFIG_AUTOBOOT_PROMPT \
"Press SPACE to abort autoboot in %d seconds\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
#define CONFIG_AUTOBOOT_STOP_STR " "

13
include/configs/csb637.h
View File

@ -114,17 +114,11 @@
*/
#include <config_cmd_default.h>
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_PING
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_AUTOSCRIPT
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_MISC
#undef CONFIG_CMD_LOADS
#ifdef NAND_SUPPORT_HAS_BEEN_FIXED /* NAND support is broken / unimplemented */
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
@ -140,6 +134,7 @@
#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
@ -155,6 +150,8 @@
#define NAND_CTL_CLRCLE(nandptr)
#define NAND_CTL_SETCLE(nandptr)
#endif /* NAND_SUPPORT_HAS_BEEN_FIXED */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM 0x20000000
#define PHYS_SDRAM_SIZE 0x4000000 /* 64 megs */

5
include/configs/gth2.h
View File

@ -54,8 +54,9 @@
/* Only interrupt boot if space is pressed */
/* If a long serial cable is connected but */
/* other end is dead, garbage will be read */
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT "Press space to abort autoboot in %d second\n"
#define CONFIG_AUTOBOOT_KEYED 1
#define CONFIG_AUTOBOOT_PROMPT \
"Press space to abort autoboot in %d second\n", bootdelay
#define CONFIG_AUTOBOOT_DELAY_STR "d"
#define CONFIG_AUTOBOOT_STOP_STR " "

3
include/configs/gw8260.h
View File

@ -279,7 +279,8 @@
* To stop use: " "
*/
#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, press \" \" to stop\n"
#define CONFIG_AUTOBOOT_PROMPT \
"Autobooting in %d seconds, press \" \" to stop\n", bootdelay
#define CONFIG_AUTOBOOT_STOP_STR " "
#undef CONFIG_AUTOBOOT_DELAY_STR
#define DEBUG_BOOTKEYS 0

2
include/configs/hymod.h
View File

@ -224,7 +224,7 @@
*/
#define CONFIG_AUTOBOOT_KEYED
#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \
"press <SPACE> to stop\n"
"press <SPACE> to stop\n", bootdelay
#define CONFIG_AUTOBOOT_STOP_STR " "
#undef CONFIG_AUTOBOOT_DELAY_STR
#define DEBUG_BOOTKEYS 0

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