sf: probe: Add support for erase sector selection flag
SECT_4K, SECT_32K and SECT_64K opeartions are performed to to specific flash by adding a SECT* flag on respective spi_flash_params.flag param. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
This commit is contained in:
Jagannadha Sutradharudu Teki
parent
54024c1566
commit
f4f51a8ff8
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@ -153,17 +153,13 @@ int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
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u8 cmd[4];
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int ret = -1;
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erase_size = flash->sector_size;
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erase_size = flash->erase_size;
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if (offset % erase_size || len % erase_size) {
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debug("SF: Erase offset/length not multiple of erase size\n");
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return -1;
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}
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if (erase_size == 4096)
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cmd[0] = CMD_ERASE_4K;
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else
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cmd[0] = CMD_ERASE_64K;
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cmd[0] = flash->erase_cmd;
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while (len) {
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#ifdef CONFIG_SPI_FLASH_BAR
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u8 bank_sel;
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@ -39,21 +39,21 @@ struct spi_flash_params {
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static const struct spi_flash_params spi_flash_params_table[] = {
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#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
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{"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, 0},
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{"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, 0},
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{"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, 0},
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{"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, 0},
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{"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, 0},
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{"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, 0},
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{"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, 0},
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{"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K},
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{"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K},
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{"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K},
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{"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K},
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{"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K},
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{"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K},
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{"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K},
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#endif
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#ifdef CONFIG_SPI_FLASH_EON /* EON */
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{"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0},
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{"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0},
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#endif
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#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
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{"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, 0},
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{"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, 0},
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{"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K},
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{"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K},
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#endif
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#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
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{"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0},
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@ -86,50 +86,50 @@ static const struct spi_flash_params spi_flash_params_table[] = {
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{"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0},
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{"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0},
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{"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0},
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{"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, 0},
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{"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, 0},
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{"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, 0},
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{"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, 0},
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{"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, 0},
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{"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, 0},
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{"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, 0},
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{"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, 0},
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{"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, 0},
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{"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, 0},
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{"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, 0},
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{"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, 0},
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{"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, SECT_4K},
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{"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, SECT_4K},
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{"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, SECT_4K},
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{"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, SECT_4K},
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{"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, SECT_4K},
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{"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, SECT_4K},
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{"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, SECT_4K},
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{"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, SECT_4K},
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{"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, SECT_4K},
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{"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, SECT_4K},
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{"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, SECT_4K},
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{"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, SECT_4K},
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#endif
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#ifdef CONFIG_SPI_FLASH_SST /* SST */
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{"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SST_WP},
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{"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SST_WP},
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{"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SST_WP},
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{"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SST_WP},
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{"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, 0},
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{"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SST_WP},
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{"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SST_WP},
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{"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SST_WP},
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{"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SST_WP},
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{"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SST_WP},
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{"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WP},
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{"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WP},
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{"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WP},
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{"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WP},
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{"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K},
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{"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WP},
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{"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WP},
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{"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WP},
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{"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WP},
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{"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WP},
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#endif
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#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
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{"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0},
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{"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0},
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{"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0},
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{"W25X40", 0xef3013, 0x0, 64 * 1024, 8, 0},
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{"W25X16", 0xef3015, 0x0, 64 * 1024, 32, 0},
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{"W25X32", 0xef3016, 0x0, 64 * 1024, 64, 0},
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{"W25X64", 0xef3017, 0x0, 64 * 1024, 128, 0},
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{"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, 0},
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{"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, 0},
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{"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, 0},
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{"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, 0},
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{"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, 0},
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{"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, 0},
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{"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, 0},
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{"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, 0},
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{"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, 0},
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{"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, 0},
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{"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, 0},
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{"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K},
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{"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K},
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{"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K},
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{"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K},
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{"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, SECT_4K},
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{"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, SECT_4K},
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{"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, SECT_4K},
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{"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, SECT_4K},
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{"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, SECT_4K},
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{"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, SECT_4K},
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{"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, SECT_4K},
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{"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, SECT_4K},
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{"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, SECT_4K},
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{"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, SECT_4K},
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{"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, SECT_4K},
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#endif
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/*
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* Note:
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@ -203,6 +203,18 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
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flash->sector_size = params->sector_size;
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flash->size = flash->sector_size * params->nr_sectors;
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/* Compute erase sector and command */
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if (params->flags & SECT_4K) {
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flash->erase_cmd = CMD_ERASE_4K;
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flash->erase_size = 4096;
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} else if (params->flags & SECT_32K) {
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flash->erase_cmd = CMD_ERASE_32K;
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flash->erase_size = 32768;
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} else {
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flash->erase_cmd = CMD_ERASE_64K;
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flash->erase_size = flash->sector_size;
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}
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/* Flash powers up read-only, so clear BP# bits */
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#if defined(CONFIG_SPI_FLASH_ATMEL) || \
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defined(CONFIG_SPI_FLASH_MACRONIX) || \
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@ -17,6 +17,10 @@
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#include <linux/types.h>
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#include <linux/compiler.h>
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/* SECT flags */
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#define SECT_4K (1 << 1)
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#define SECT_32K (1 << 2)
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/* SST specific macros */
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#ifdef CONFIG_SPI_FLASH_SST
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# define SST_WP 0x01 /* Supports AAI word program */
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@ -33,8 +37,10 @@ struct spi_flash {
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u32 size;
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/* Write (page) size */
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u32 page_size;
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/* Erase (sector) size */
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/* Sector size */
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u32 sector_size;
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/* Erase size */
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u32 erase_size;
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#ifdef CONFIG_SPI_FLASH_BAR
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/* Bank read cmd */
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u8 bank_read_cmd;
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@ -45,6 +51,8 @@ struct spi_flash {
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#endif
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/* Poll cmd - for flash erase/program */
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u8 poll_cmd;
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/* Erase cmd 4K, 32K, 64K */
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u8 erase_cmd;
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void *memory_map; /* Address of read-only SPI flash access */
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int (*read)(struct spi_flash *flash, u32 offset,
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