tegra: video: Move all fdt-decoding into a single function
Join the two functions which decode the device tree and put them in the ofdata_to_platdata() method. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Simon Glass
Tom Warren
parent
bfda03770c
commit
f5acf91f6f
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@ -57,7 +57,6 @@ struct tegra_lcd_priv {
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unsigned long timer_next; /* Time we can move onto next stage */
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unsigned long timer_next; /* Time we can move onto next stage */
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int width; /* width in pixels */
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int width; /* width in pixels */
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int height; /* height in pixels */
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int height; /* height in pixels */
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int bpp; /* number of bits per pixel */
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/*
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/*
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* log2 of number of bpp, in general, unless it bpp is 24 in which
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* log2 of number of bpp, in general, unless it bpp is 24 in which
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@ -69,7 +68,6 @@ struct tegra_lcd_priv {
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unsigned pixel_clock; /* Pixel clock in Hz */
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unsigned pixel_clock; /* Pixel clock in Hz */
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uint horiz_timing[FDT_LCD_TIMING_COUNT]; /* Horizontal timing */
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uint horiz_timing[FDT_LCD_TIMING_COUNT]; /* Horizontal timing */
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uint vert_timing[FDT_LCD_TIMING_COUNT]; /* Vertical timing */
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uint vert_timing[FDT_LCD_TIMING_COUNT]; /* Vertical timing */
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int panel_node; /* node offset of panel information */
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int pwm_channel; /* PWM channel to use for backlight */
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int pwm_channel; /* PWM channel to use for backlight */
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enum lcd_cache_t cache_type;
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enum lcd_cache_t cache_type;
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@ -317,109 +315,6 @@ static void debug_timing(const char *name, unsigned int timing[])
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#endif
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#endif
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}
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}
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/**
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* Decode panel information from the fdt, according to a standard binding
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*
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* @param blob fdt blob
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* @param node offset of fdt node to read from
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* @param priv structure to store fdt config into
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* @return 0 if ok, -ve on error
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*/
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static int tegra_decode_panel(const void *blob, int node,
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struct tegra_lcd_priv *priv)
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{
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int front, back, ref;
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priv->width = fdtdec_get_int(blob, node, "xres", -1);
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priv->height = fdtdec_get_int(blob, node, "yres", -1);
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priv->pixel_clock = fdtdec_get_int(blob, node, "clock", 0);
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if (!priv->pixel_clock || priv->width == -1 || priv->height == -1) {
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debug("%s: Pixel parameters missing\n", __func__);
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return -FDT_ERR_NOTFOUND;
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}
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back = fdtdec_get_int(blob, node, "left-margin", -1);
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front = fdtdec_get_int(blob, node, "right-margin", -1);
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ref = fdtdec_get_int(blob, node, "hsync-len", -1);
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if ((back | front | ref) == -1) {
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debug("%s: Horizontal parameters missing\n", __func__);
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return -FDT_ERR_NOTFOUND;
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}
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/* Use a ref-to-sync of 1 always, and take this from the front porch */
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priv->horiz_timing[FDT_LCD_TIMING_REF_TO_SYNC] = 1;
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priv->horiz_timing[FDT_LCD_TIMING_SYNC_WIDTH] = ref;
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priv->horiz_timing[FDT_LCD_TIMING_BACK_PORCH] = back;
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priv->horiz_timing[FDT_LCD_TIMING_FRONT_PORCH] = front -
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priv->horiz_timing[FDT_LCD_TIMING_REF_TO_SYNC];
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debug_timing("horiz", priv->horiz_timing);
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back = fdtdec_get_int(blob, node, "upper-margin", -1);
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front = fdtdec_get_int(blob, node, "lower-margin", -1);
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ref = fdtdec_get_int(blob, node, "vsync-len", -1);
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if ((back | front | ref) == -1) {
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debug("%s: Vertical parameters missing\n", __func__);
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return -FDT_ERR_NOTFOUND;
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}
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priv->vert_timing[FDT_LCD_TIMING_REF_TO_SYNC] = 1;
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priv->vert_timing[FDT_LCD_TIMING_SYNC_WIDTH] = ref;
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priv->vert_timing[FDT_LCD_TIMING_BACK_PORCH] = back;
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priv->vert_timing[FDT_LCD_TIMING_FRONT_PORCH] = front -
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priv->vert_timing[FDT_LCD_TIMING_REF_TO_SYNC];
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debug_timing("vert", priv->vert_timing);
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return 0;
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}
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/**
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* Decode the display controller information from the fdt.
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*
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* @param blob fdt blob
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* @param priv structure to store fdt priv into
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* @return 0 if ok, -ve on error
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*/
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static int tegra_display_decode_config(const void *blob, int node,
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struct tegra_lcd_priv *priv)
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{
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int rgb;
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int bpp, bit;
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priv->disp = (struct disp_ctlr *)fdtdec_get_addr(blob, node, "reg");
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if (!priv->disp) {
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debug("%s: No display controller address\n", __func__);
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return -1;
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}
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rgb = fdt_subnode_offset(blob, node, "rgb");
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priv->panel_node = fdtdec_lookup_phandle(blob, rgb, "nvidia,panel");
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if (priv->panel_node < 0) {
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debug("%s: Cannot find panel information\n", __func__);
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return -1;
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}
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if (tegra_decode_panel(blob, priv->panel_node, priv)) {
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debug("%s: Failed to decode panel information\n", __func__);
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return -1;
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}
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bpp = fdtdec_get_int(blob, priv->panel_node, "nvidia,bits-per-pixel",
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-1);
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bit = ffs(bpp) - 1;
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if (bpp == (1 << bit))
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priv->log2_bpp = bit;
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else
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priv->log2_bpp = bpp;
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if (bpp == -1) {
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debug("%s: Pixel bpp parameters missing\n", __func__);
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return -FDT_ERR_NOTFOUND;
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}
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priv->bpp = bpp;
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return 0;
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}
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/**
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/**
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* Register a new display based on device tree configuration.
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* Register a new display based on device tree configuration.
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*
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*
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@ -466,51 +361,6 @@ static int tegra_display_probe(const void *blob, struct tegra_lcd_priv *priv,
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return 0;
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return 0;
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}
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}
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/**
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* Decode the panel information from the fdt.
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*
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* @param blob fdt blob
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* @param priv structure to store fdt config into
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* @return 0 if ok, -ve on error
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*/
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static int fdt_decode_lcd(const void *blob, struct tegra_lcd_priv *priv)
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{
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int display_node;
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display_node = priv->panel_node;
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if (display_node < 0) {
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debug("%s: No panel configuration available\n", __func__);
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return -1;
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}
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priv->pwm_channel = pwm_request(blob, display_node, "nvidia,pwm");
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if (priv->pwm_channel < 0) {
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debug("%s: Unable to request PWM channel\n", __func__);
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return -1;
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}
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priv->cache_type = fdtdec_get_int(blob, display_node,
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"nvidia,cache-type",
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FDT_LCD_CACHE_WRITE_BACK_FLUSH);
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/* These GPIOs are all optional */
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gpio_request_by_name_nodev(blob, display_node,
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"nvidia,backlight-enable-gpios", 0,
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&priv->backlight_en, GPIOD_IS_OUT);
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gpio_request_by_name_nodev(blob, display_node,
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"nvidia,lvds-shutdown-gpios", 0,
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&priv->lvds_shutdown, GPIOD_IS_OUT);
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gpio_request_by_name_nodev(blob, display_node,
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"nvidia,backlight-vdd-gpios", 0,
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&priv->backlight_vdd, GPIOD_IS_OUT);
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gpio_request_by_name_nodev(blob, display_node,
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"nvidia,panel-vdd-gpios", 0,
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&priv->panel_vdd, GPIOD_IS_OUT);
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return fdtdec_get_int_array(blob, display_node, "nvidia,panel-timings",
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priv->panel_timings, FDT_LCD_TIMINGS);
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}
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/**
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/**
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* Handle the next stage of device init
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* Handle the next stage of device init
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*/
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*/
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@ -624,15 +474,6 @@ static int tegra_lcd_probe(struct udevice *dev)
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const void *blob = gd->fdt_blob;
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const void *blob = gd->fdt_blob;
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int type = DCACHE_OFF;
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int type = DCACHE_OFF;
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if (tegra_display_decode_config(blob, dev->of_offset, priv))
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return -1;
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/* get panel details */
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if (fdt_decode_lcd(blob, priv)) {
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printf("No valid LCD information in device tree\n");
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return -1;
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}
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/* Initialize the Tegra display controller */
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/* Initialize the Tegra display controller */
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if (tegra_display_probe(blob, priv, (void *)plat->base)) {
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if (tegra_display_probe(blob, priv, (void *)plat->base)) {
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printf("%s: Failed to probe display driver\n", __func__);
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printf("%s: Failed to probe display driver\n", __func__);
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@ -660,6 +501,110 @@ static int tegra_lcd_probe(struct udevice *dev)
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return 0;
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return 0;
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}
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}
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static int tegra_lcd_ofdata_to_platdata(struct udevice *dev)
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{
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struct tegra_lcd_priv *priv = dev_get_priv(dev);
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const void *blob = gd->fdt_blob;
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int node = dev->of_offset;
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int front, back, ref;
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int panel_node;
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int rgb;
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int bpp, bit;
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priv->disp = (struct disp_ctlr *)dev_get_addr(dev);
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if (!priv->disp) {
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debug("%s: No display controller address\n", __func__);
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return -EINVAL;
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}
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rgb = fdt_subnode_offset(blob, node, "rgb");
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panel_node = fdtdec_lookup_phandle(blob, rgb, "nvidia,panel");
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if (panel_node < 0) {
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debug("%s: Cannot find panel information\n", __func__);
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return -EINVAL;
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}
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priv->width = fdtdec_get_int(blob, panel_node, "xres", -1);
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priv->height = fdtdec_get_int(blob, panel_node, "yres", -1);
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priv->pixel_clock = fdtdec_get_int(blob, panel_node, "clock", 0);
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if (!priv->pixel_clock || priv->width == -1 || priv->height == -1) {
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debug("%s: Pixel parameters missing\n", __func__);
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return -EINVAL;
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}
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back = fdtdec_get_int(blob, panel_node, "left-margin", -1);
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front = fdtdec_get_int(blob, panel_node, "right-margin", -1);
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ref = fdtdec_get_int(blob, panel_node, "hsync-len", -1);
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if ((back | front | ref) == -1) {
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debug("%s: Horizontal parameters missing\n", __func__);
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return -EINVAL;
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}
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/* Use a ref-to-sync of 1 always, and take this from the front porch */
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priv->horiz_timing[FDT_LCD_TIMING_REF_TO_SYNC] = 1;
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priv->horiz_timing[FDT_LCD_TIMING_SYNC_WIDTH] = ref;
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priv->horiz_timing[FDT_LCD_TIMING_BACK_PORCH] = back;
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priv->horiz_timing[FDT_LCD_TIMING_FRONT_PORCH] = front -
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priv->horiz_timing[FDT_LCD_TIMING_REF_TO_SYNC];
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debug_timing("horiz", priv->horiz_timing);
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back = fdtdec_get_int(blob, panel_node, "upper-margin", -1);
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front = fdtdec_get_int(blob, panel_node, "lower-margin", -1);
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ref = fdtdec_get_int(blob, panel_node, "vsync-len", -1);
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if ((back | front | ref) == -1) {
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debug("%s: Vertical parameters missing\n", __func__);
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return -EINVAL;
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}
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priv->vert_timing[FDT_LCD_TIMING_REF_TO_SYNC] = 1;
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priv->vert_timing[FDT_LCD_TIMING_SYNC_WIDTH] = ref;
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priv->vert_timing[FDT_LCD_TIMING_BACK_PORCH] = back;
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priv->vert_timing[FDT_LCD_TIMING_FRONT_PORCH] = front -
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priv->vert_timing[FDT_LCD_TIMING_REF_TO_SYNC];
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debug_timing("vert", priv->vert_timing);
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bpp = fdtdec_get_int(blob, panel_node, "nvidia,bits-per-pixel", -1);
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bit = ffs(bpp) - 1;
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if (bpp == (1 << bit))
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priv->log2_bpp = bit;
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else
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priv->log2_bpp = bpp;
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if (bpp == -1) {
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debug("%s: Pixel bpp parameters missing\n", __func__);
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return -EINVAL;
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}
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priv->pwm_channel = pwm_request(blob, panel_node, "nvidia,pwm");
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if (priv->pwm_channel < 0) {
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debug("%s: Unable to request PWM channel\n", __func__);
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return -EINVAL;
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}
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priv->cache_type = fdtdec_get_int(blob, panel_node, "nvidia,cache-type",
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FDT_LCD_CACHE_WRITE_BACK_FLUSH);
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/* These GPIOs are all optional */
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gpio_request_by_name_nodev(blob, panel_node,
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"nvidia,backlight-enable-gpios", 0,
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&priv->backlight_en, GPIOD_IS_OUT);
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gpio_request_by_name_nodev(blob, panel_node,
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"nvidia,lvds-shutdown-gpios", 0,
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&priv->lvds_shutdown, GPIOD_IS_OUT);
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gpio_request_by_name_nodev(blob, panel_node,
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"nvidia,backlight-vdd-gpios", 0,
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&priv->backlight_vdd, GPIOD_IS_OUT);
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gpio_request_by_name_nodev(blob, panel_node,
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"nvidia,panel-vdd-gpios", 0,
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&priv->panel_vdd, GPIOD_IS_OUT);
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if (fdtdec_get_int_array(blob, panel_node, "nvidia,panel-timings",
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priv->panel_timings, FDT_LCD_TIMINGS))
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return -EINVAL;
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return 0;
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}
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static int tegra_lcd_bind(struct udevice *dev)
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static int tegra_lcd_bind(struct udevice *dev)
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{
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{
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struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
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struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
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@ -685,5 +630,6 @@ U_BOOT_DRIVER(tegra_lcd) = {
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.ops = &tegra_lcd_ops,
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.ops = &tegra_lcd_ops,
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.bind = tegra_lcd_bind,
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.bind = tegra_lcd_bind,
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.probe = tegra_lcd_probe,
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.probe = tegra_lcd_probe,
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.ofdata_to_platdata = tegra_lcd_ofdata_to_platdata,
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.priv_auto_alloc_size = sizeof(struct tegra_lcd_priv),
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.priv_auto_alloc_size = sizeof(struct tegra_lcd_priv),
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};
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};
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