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hancock: ethernet support

This commit is contained in:
Rene Straub 2018-06-18 16:19:16 +02:00
parent 9d93827bdb
commit f69a6aff24
2 changed files with 171 additions and 29 deletions
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186
board/nm/hancock/board.c
View File

@ -16,6 +16,7 @@
#include <asm/arch/cpu.h> #include <asm/arch/cpu.h>
#include <asm/arch/hardware.h> #include <asm/arch/hardware.h>
#include <asm/arch/omap.h> #include <asm/arch/omap.h>
#include <asm/arch/mux.h>
#include <asm/arch/ddr_defs.h> #include <asm/arch/ddr_defs.h>
#include <asm/arch/clock.h> #include <asm/arch/clock.h>
#include <asm/arch/clk_synthesizer.h> #include <asm/arch/clk_synthesizer.h>
@ -38,6 +39,7 @@
#include "../common/board_descriptor.h" #include "../common/board_descriptor.h"
#include "board.h" #include "board.h"
#include "da9063.h" #include "da9063.h"
#include "sja1105.h"
#include "fileaccess.h" #include "fileaccess.h"
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -141,6 +143,22 @@ static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
static BD_Context bdctx[3]; /* The descriptor contexts */ static BD_Context bdctx[3]; /* The descriptor contexts */
#if !defined(CONFIG_SPL_BUILD)
/* SPI1 */
static struct module_pin_mux spi1_pin_mux[] = {
{OFFSET(ecap0_in_pwm0_out), (MODE(4) | PULLUDEN | PULLDOWN_EN | RXACTIVE)}, /* (C18) spi1_clk */
{OFFSET(uart0_rtsn), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (E17) spi1_mosi */
{OFFSET(uart0_ctsn), (MODE(4) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (E18) spi1_miso */
{OFFSET(uart0_txd), (MODE(1) | PULLUDEN | PULLUP_EN)}, /* (E16) spi1_cs1 */
{-1}
#if 0
{OFFSET(uart0_rxd), (MODE(1) | PULLUDEN | PULLUP_EN)}, /* (E15) spi1_cs0 */
#endif
};
static struct spi_slave *spi = 0;
#endif
static void request_and_set_gpio(int gpio, const char *name, int value) static void request_and_set_gpio(int gpio, const char *name, int value)
{ {
@ -287,7 +305,7 @@ struct serial_device *default_serial_console(void)
/* TODO: Remove later */ /* TODO: Remove later */
enable_uart2_pin_mux(); enable_uart2_pin_mux();
return &eserial3_device; return &eserial3_device;
#if 0
if (spl_boot_device() == BOOT_DEVICE_UART) { if (spl_boot_device() == BOOT_DEVICE_UART) {
/* SPL Boot -> UART0 (later used for SPI) */ /* SPL Boot -> UART0 (later used for SPI) */
enable_uart0_pin_mux(); enable_uart0_pin_mux();
@ -298,6 +316,7 @@ struct serial_device *default_serial_console(void)
enable_uart2_pin_mux(); enable_uart2_pin_mux();
return &eserial3_device; return &eserial3_device;
} }
#endif
} }
#ifndef CONFIG_SKIP_LOWLEVEL_INIT #ifndef CONFIG_SKIP_LOWLEVEL_INIT
@ -499,6 +518,50 @@ static void init_gnss(void)
REQUEST_AND_SET_GPIO(GPIO_RST_GNSS); REQUEST_AND_SET_GPIO(GPIO_RST_GNSS);
} }
static void init_ethernet_switch(void)
{
uint32_t val;
if (spi == 0) {
configure_module_pin_mux(spi1_pin_mux);
spi_init();
spi = spi_setup_slave(CONFIG_SJA1105_SPI_BUS /*bus*/,
CONFIG_SJA1105_SPI_CS /*cs*/,
1000000 /*max_hz*/,
SPI_MODE_1 /*spi_mode*/);
/* spi_set_wordlen(spi,32);*/
}
spi_claim_bus(spi);
/* TODO: Remove debug printout later on */
val = sja1105_read_reg(spi, 0x000000);
printf("Device ID: %08x\n", val);
val = sja1105_read_reg(spi, 0x000001);
printf("Status Reg: %08x\n", val);
sja1105_static_init(spi, 0 /*dummy*/);
val = sja1105_read_reg(spi, 0x000001);
printf("Status Reg: %08x\n", val);
/* TODO: Check valid config bit */
/* Configure clocks */
sja1105_dynamic_init(spi);
val = sja1105_read_reg(spi, 0x000001);
printf("Status Reg: %08x\n", val);
/* Enable pull down on RX_ER etc. */
sja1105_write_reg(spi, 0x100809, 0x03020313);
#if 0
val = sja1105_read_reg(spi, 0x100809);
printf("CFG_PAD_MII4_RX Reg: %08x\n", val);
#endif
spi_release_bus(spi);
}
#endif /* !defined(CONFIG_SPL_BUILD) */ #endif /* !defined(CONFIG_SPL_BUILD) */
@ -571,6 +634,7 @@ void set_console(void)
#endif #endif
} }
#if 0
static void set_devicetree_name(void) static void set_devicetree_name(void)
{ {
char devicetreename[64]; char devicetreename[64];
@ -664,7 +728,7 @@ static void check_reset_button(void)
if (!get_button_state()) if (!get_button_state())
break; break;
udelay(100*1000); /* 100ms */ 2 udelay(100*1000); /* 100ms */
counter += 100; counter += 100;
if (counter == 2000) { if (counter == 2000) {
@ -709,6 +773,8 @@ static void check_reset_button(void)
/* setenv("consoledev", "ttyS1"); */ /* setenv("consoledev", "ttyS1"); */
} }
} }
#endif
#endif /* !defined(CONFIG_SPL_BUILD) */ #endif /* !defined(CONFIG_SPL_BUILD) */
@ -740,8 +806,6 @@ int board_late_init(void)
init_gsm(); init_gsm();
init_gnss(); init_gnss();
printf("Console: %d\n", CONFIG_CONS_INDEX);
/* TODO: Change for battery operation */ /* TODO: Change for battery operation */
/* Enable charging of RTC backup capacitor (1mA, 3.1V) */ /* Enable charging of RTC backup capacitor (1mA, 3.1V) */
/*(void)da9063_set_reg(PMIC_REG_BBAT_CONT, 0xCF);*/ /*(void)da9063_set_reg(PMIC_REG_BBAT_CONT, 0xCF);*/
@ -758,6 +822,10 @@ int board_late_init(void)
/* /*
check_fct(); check_fct();
*/ */
init_ethernet_switch();
#endif #endif
return 0; return 0;
@ -780,7 +848,7 @@ static struct cpsw_slave_data cpsw_slaves[] = {
.slave_reg_ofs = 0x208, .slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80, .sliver_reg_ofs = 0xd80,
.phy_if = PHY_INTERFACE_MODE_RMII, .phy_if = PHY_INTERFACE_MODE_RMII,
.phy_addr = 0 .phy_addr = 1
} }
}; };
@ -841,7 +909,6 @@ int board_eth_init(bd_t *bis)
#if !defined(CONFIG_SPL_BUILD) #if !defined(CONFIG_SPL_BUILD)
#ifdef CONFIG_DRIVER_TI_CPSW #ifdef CONFIG_DRIVER_TI_CPSW
cpsw_data.mdio_div = 0x3E; cpsw_data.mdio_div = 0x3E;
bd_get_mac(0, mac_addr0, sizeof(mac_addr0)); bd_get_mac(0, mac_addr0, sizeof(mac_addr0));
@ -886,25 +953,10 @@ int board_fit_config_name_match(const char *name)
#if !defined(CONFIG_SPL_BUILD) #if !defined(CONFIG_SPL_BUILD)
#include <asm/arch/mux.h>
/* SPI1 */
static struct module_pin_mux spi1_pin_mux[] = {
{OFFSET(ecap0_in_pwm0_out), (MODE(4) | PULLUDEN | PULLDOWN_EN)}, /* (C18) spi1_clk */
{OFFSET(uart0_rtsn), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (E17) spi1_mosi */
{OFFSET(uart0_ctsn), (MODE(4) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (E18) spi1_miso */
{OFFSET(uart0_txd), (MODE(1) | PULLUDEN | PULLUP_EN)}, /* (E16) spi1_cs1 */
{-1}
#if 0
{OFFSET(uart0_rxd), (MODE(1) | PULLUDEN | PULLUP_EN)}, /* (E15) spi1_cs0 */
#endif
};
static struct spi_slave *spi = 0;
static int do_spitest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) static int do_spitest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{ {
const uint8_t data[] = { 0xFF, 0xAA, 0x00 }; /* const uint8_t data[] = { 0xFF, 0xAA, 0x00 };*/
const uint8_t data[] = { 0xAA, 0x55, 0xAA, 0x55, 0x00, 0xFF };
int rc; int rc;
printf("SPI test\n"); printf("SPI test\n");
@ -941,5 +993,93 @@ U_BOOT_CMD(
"" ""
); );
static int do_sjastart(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uint32_t val;
if (spi == 0) {
configure_module_pin_mux(spi1_pin_mux);
spi_init();
spi = spi_setup_slave(CONFIG_SJA1105_SPI_BUS /*bus*/,
CONFIG_SJA1105_SPI_CS /*cs*/,
1000000 /*max_hz*/,
SPI_MODE_1 /*spi_mode*/);
/* spi_set_wordlen(spi,32);*/
}
spi_claim_bus(spi);
val = sja1105_read_reg(spi, 0x000000);
printf("Device ID: %08x\n", val);
val = sja1105_read_reg(spi, 0x000001);
printf("Status Reg: %08x\n", val);
sja1105_static_init(spi, 0 /*dummy*/);
val = sja1105_read_reg(spi, 0x000001);
printf("Status Reg: %08x\n", val);
sja1105_dynamic_init(spi);
val = sja1105_read_reg(spi, 0x000001);
printf("Status Reg: %08x\n", val);
spi_release_bus(spi);
return 0;
}
U_BOOT_CMD(
sjastart, 1, 1, do_sjastart,
"start and configure ETH switch",
""
);
static int do_sjainfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uint32_t p3_mac_stat;
uint32_t p3_txf;
uint32_t p3_rxf;
uint32_t p4_mac_stat;
uint32_t p4_rxf;
uint32_t p4_txf;
uint32_t conf_pad4_1;
uint32_t conf_pad4_2;
spi_claim_bus(spi);
p3_mac_stat = sja1105_read_reg(spi, 0x00206);
p3_rxf = sja1105_read_reg(spi, 0x00436);
p3_txf = sja1105_read_reg(spi, 0x00432);
p4_mac_stat = sja1105_read_reg(spi, 0x00208);
p4_rxf = sja1105_read_reg(spi, 0x00446);
p4_txf = sja1105_read_reg(spi, 0x00442);
conf_pad4_1 = sja1105_read_reg(spi, 0x100809);
sja1105_write_reg(spi, 0x100809, 0x03020313);
conf_pad4_2 = sja1105_read_reg(spi, 0x100809);
spi_release_bus(spi);
printf("port mac stat rx tx\n");
printf("3 (PHY): %08x %d %d\n", p3_mac_stat, p3_rxf, p3_txf);
printf("4 (CPU): %08x %d %d\n", p4_mac_stat, p4_rxf, p4_txf);
printf("pad: %08x\n", conf_pad4_1);
printf("pad: %08x\n", conf_pad4_2);
return 0;
}
U_BOOT_CMD(
sjainfo, 1, 1, do_sjainfo,
"display eth switch information",
""
);
#endif #endif

14
board/nm/hancock/sja1105.c
View File

@ -15,7 +15,7 @@
#define SJA_OPCODE_WRITE 0x80 #define SJA_OPCODE_WRITE 0x80
#define SJA_OPCODE_READ 0x00 #define SJA_OPCODE_READ 0x00
/*#define SJA_READ_CNT(x) (((x) &0x3F) << 1)*/ /*#define SJA_READ_CNT(x) (((x) & 0x3F) << 1)*/
/* /*
@ -71,7 +71,7 @@ int sja1105_read_reg(struct spi_slave *spislave, uint32_t adress)
{ {
uint8_t dataspi[8]; uint8_t dataspi[8];
uint8_t datain[8]; uint8_t datain[8];
int rc; /* int rc; */
int return_value; int return_value;
/* OPCODE: READ, READ CNT = 1 */ /* OPCODE: READ, READ CNT = 1 */
@ -87,10 +87,9 @@ int sja1105_read_reg(struct spi_slave *spislave, uint32_t adress)
/* printf("%02x %02x %02x %02x\n", dataspi[0], dataspi[1], dataspi[2], dataspi[3]); */ /* printf("%02x %02x %02x %02x\n", dataspi[0], dataspi[1], dataspi[2], dataspi[3]); */
memset(datain, 0xaa, 8); memset(datain, 0xaa, 8);
(void)spi_xfer(spislave, 8*sizeof(dataspi) /*bitlen*/, dataspi, datain /*din*/, SPI_XFER_BEGIN | SPI_XFER_END /*flags*/);
rc = spi_xfer(spislave, 8*sizeof(dataspi) /*bitlen*/, dataspi, datain /*din*/, SPI_XFER_BEGIN | SPI_XFER_END /*flags*/);
printf("sja1105_read_reg %d\n", rc);
/* /*
printf("sja1105_read_reg %d\n", rc);
printf("%02x %02x %02x %02x\n", datain[0], datain[1], datain[2], datain[3]); printf("%02x %02x %02x %02x\n", datain[0], datain[1], datain[2], datain[3]);
printf("%02x %02x %02x %02x\n", datain[4], datain[5], datain[6], datain[7]); printf("%02x %02x %02x %02x\n", datain[4], datain[5], datain[6], datain[7]);
*/ */
@ -143,7 +142,10 @@ void sja1105_dynamic_init(struct spi_slave *spislave)
rc = sja1105_write_reg(spislave, 0x10000F, 0x0A000001); //Disable IDIV4 rc = sja1105_write_reg(spislave, 0x10000F, 0x0A000001); //Disable IDIV4
rc = sja1105_write_reg(spislave, 0x100031, 0x08000800); //Setting CLKSRC of RMII_REF_CLK_4 to TX_CLK_4 rc = sja1105_write_reg(spislave, 0x100031, 0x08000800); //Setting CLKSRC of RMII_REF_CLK_4 to TX_CLK_4
printf("%d\n", rc); /* TODO: remove */
(void)rc;
/* printf("%d\n", rc); */
} }