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arm: dts: k3-j721e-r5-common-proc-board: Set parent clock for clock ID 342 

This virtual clock mux configuration enables the use of dynamic frequency
scaling on A72 clock ID 202 by setting up the required register.

Signed-off-by: Apurva Nandan <a-nandan@ti.com>
This commit is contained in:
Apurva Nandan 2023-06-06 16:39:54 +05:30 committed by Udit Kumar
parent 543e735fe4
commit f93c09b49f
1 changed files with 2 additions and 1 deletions
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3
arch/arm/dts/k3-j721e-r5-common-proc-board.dts
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@ -30,7 +30,8 @@
<&k3_pds 4 TI_SCI_PD_EXCLUSIVE>; <&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 202 0>; resets = <&k3_reset 202 0>;
clocks = <&k3_clks 61 1>; clocks = <&k3_clks 61 1>;
assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>; assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>, <&k3_clks 342 0>;
assigned-clock-parents= <0>, <0>, <&k3_clks 342 2>;
assigned-clock-rates = <2000000000>, <200000000>; assigned-clock-rates = <2000000000>, <200000000>;
ti,sci = <&dmsc>; ti,sci = <&dmsc>;
ti,sci-proc-id = <32>; ti,sci-proc-id = <32>;