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riscv: Rename cpu/qemu to cpu/generic 

The QEMU CPU support under arch/riscv is pretty much generic
and works fine for SiFive Unleashed as well. In fact, there
will be quite a few RISC-V SOCs for which QEMU CPU support
will work fine.

This patch renames cpu/qemu to cpu/generic to indicate the
above fact. If there are SOC specific errata workarounds
required in cpu/generic then those can be done at runtime
in cpu/generic based on CPU vendor specific DT compatible
string.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Anup Patel 2019-02-25 08:14:10 +00:00 committed by Andes
parent 7c8d210b91
commit fdff1f96a6
6 changed files with 4 additions and 4 deletions
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2
arch/riscv/Kconfig
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@ -22,7 +22,7 @@ source "board/emulation/qemu-riscv/Kconfig"
# platform-specific options below # platform-specific options below
source "arch/riscv/cpu/ax25/Kconfig" source "arch/riscv/cpu/ax25/Kconfig"
source "arch/riscv/cpu/qemu/Kconfig" source "arch/riscv/cpu/generic/Kconfig"
# architecture-specific options below # architecture-specific options below

2
arch/riscv/cpu/qemu/Kconfig → arch/riscv/cpu/generic/Kconfig
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@ -2,7 +2,7 @@
# #
# Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com> # Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
config QEMU_RISCV config GENERIC_RISCV
bool bool
select ARCH_EARLY_INIT_R select ARCH_EARLY_INIT_R
imply CPU imply CPU

0
arch/riscv/cpu/qemu/Makefile → arch/riscv/cpu/generic/Makefile
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0
arch/riscv/cpu/qemu/cpu.c → arch/riscv/cpu/generic/cpu.c
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0
arch/riscv/cpu/qemu/dram.c → arch/riscv/cpu/generic/dram.c
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4
board/emulation/qemu-riscv/Kconfig
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@ -7,7 +7,7 @@ config SYS_VENDOR
default "emulation" default "emulation"
config SYS_CPU config SYS_CPU
default "qemu" default "generic"
config SYS_CONFIG_NAME config SYS_CONFIG_NAME
default "qemu-riscv" default "qemu-riscv"
@ -18,7 +18,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select QEMU_RISCV select GENERIC_RISCV
imply SYS_NS16550 imply SYS_NS16550
imply VIRTIO_MMIO imply VIRTIO_MMIO
imply VIRTIO_NET imply VIRTIO_NET