- DFU: MTD: fix for lock support

- reset: stm32: fix bank bank and offset computation
 - enable UNZIP config in several stm32mp defconfig
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Merge tag 'u-boot-stm32-20210528' of https://source.denx.de/u-boot/custodians/u-boot-stm

- DFU: MTD: fix for lock support
- reset: stm32: fix bank bank and offset computation
- enable UNZIP config in several stm32mp defconfig

arch/arm/dts/stm32mp157c-odyssey-som.dtsi

@@ -258,6 +258,10 @@
 	status = "okay";
 };
 
+&rng1 {
+	status = "okay";
+};
+
 &sdmmc2 {
 	pinctrl-names = "default", "opendrain", "sleep";
 	pinctrl-0 = <&sdmmc2_b4_pins_a>;

board/dhelectronics/dh_stm32mp1/MAINTAINERS

@@ -1,5 +1,6 @@
 DH_STM32MP1_PDK2 BOARD
 M:	Marek Vasut <marex@denx.de>
+L:	u-boot@dh-electronics.com
 S:	Maintained
 F:	arch/arm/dts/stm32mp15xx-dhcom*
 F:	board/dhelectronics/dh_stm32mp1/

board/dhelectronics/dh_stm32mp1/board.c

@@ -86,6 +86,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define KS_CCR_EEPROM	BIT(9)
 #define KS_BE0		BIT(12)
 #define KS_BE1		BIT(13)
+#define KS_CIDER	0xC0
+#define CIDER_ID	0x8870
 
 int setup_mac_address(void)
 {
@@ -123,11 +125,18 @@ int setup_mac_address(void)
 	 * is present. If EEPROM is present, it must contain valid
 	 * MAC address.
 	 */
-	u32 reg, ccr;
+	u32 reg, cider, ccr;
 	reg = fdt_get_base_address(gd->fdt_blob, off);
 	if (!reg)
 		goto out_set_ethaddr;
 
+	writew(KS_BE0 | KS_BE1 | KS_CIDER, reg + 2);
+	cider = readw(reg);
+	if ((cider & 0xfff0) != CIDER_ID) {
+		skip_eth1 = true;
+		goto out_set_ethaddr;
+	}
+
 	writew(KS_BE0 | KS_BE1 | KS_CCR, reg + 2);
 	ccr = readw(reg);
 	if (ccr & KS_CCR_EEPROM) {

configs/stm32mp15_basic_defconfig

@@ -38,6 +38,7 @@ CONFIG_CMD_ERASEENV=y
 CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_UNZIP=y
 CONFIG_CMD_ADC=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y

configs/stm32mp15_dhcom_basic_defconfig

@@ -36,6 +36,7 @@ CONFIG_SYS_PROMPT="STM32MP> "
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_UNZIP=y
 CONFIG_CMD_ADC=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y

configs/stm32mp15_dhcor_basic_defconfig

@@ -34,6 +34,7 @@ CONFIG_SYS_PROMPT="STM32MP> "
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_UNZIP=y
 CONFIG_CMD_ADC=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y

configs/stm32mp15_trusted_defconfig

@@ -21,6 +21,7 @@ CONFIG_CMD_ERASEENV=y
 CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_UNZIP=y
 CONFIG_CMD_ADC=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y

drivers/dfu/dfu_mtd.c

@@ -150,7 +150,9 @@ static int mtd_block_op(enum dfu_op op, struct dfu_entity *dfu,
 		/* Write done, lock again */
 		debug("Locking the mtd device\n");
 		ret = mtd_lock(mtd, lock_ofs, lock_len);
-		if (ret && ret != -EOPNOTSUPP)
+		if (ret == -EOPNOTSUPP)
+			ret = 0;
+		else if (ret)
 			printf("MTD device lock failed\n");
 	}
 	return ret;

drivers/reset/stm32-reset.c

@@ -40,8 +40,8 @@ static int stm32_reset_free(struct reset_ctl *reset_ctl)
 static int stm32_reset_assert(struct reset_ctl *reset_ctl)
 {
 	struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
-	int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
+	int bank = (reset_ctl->id / (sizeof(u32) * BITS_PER_BYTE)) * 4;
-	int offset = reset_ctl->id % BITS_PER_LONG;
+	int offset = reset_ctl->id % (sizeof(u32) * BITS_PER_BYTE);
 
 	dev_dbg(reset_ctl->dev, "reset id = %ld bank = %d offset = %d)\n",
 		reset_ctl->id, bank, offset);
@@ -61,8 +61,8 @@ static int stm32_reset_assert(struct reset_ctl *reset_ctl)
 static int stm32_reset_deassert(struct reset_ctl *reset_ctl)
 {
 	struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev);
-	int bank = (reset_ctl->id / BITS_PER_LONG) * 4;
+	int bank = (reset_ctl->id / (sizeof(u32) * BITS_PER_BYTE)) * 4;
-	int offset = reset_ctl->id % BITS_PER_LONG;
+	int offset = reset_ctl->id % (sizeof(u32) * BITS_PER_BYTE);
 
 	dev_dbg(reset_ctl->dev, "reset id = %ld bank = %d offset = %d)\n",
 		reset_ctl->id, bank, offset);