riscv: dts: add dts for unmatched rev1
The difference between unmatched rev3 and rev1 is DDR timing, the rev3 uses 1866 MT/s for 16GiB, and rev1 uses 2133 MT/s for 8GiB. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
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				|  | @ -5,7 +5,7 @@ dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb | |||
| dtb-$(CONFIG_TARGET_QEMU_VIRT) += qemu-virt.dtb | ||||
| dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb | ||||
| dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb | ||||
| dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb | ||||
| dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb hifive-unmatched-a00-rev1.dtb | ||||
| dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb | ||||
| 
 | ||||
| targets += $(dtb-y) | ||||
|  |  | |||
										
											
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							|  | @ -0,0 +1,7 @@ | |||
| // SPDX-License-Identifier: (GPL-2.0 OR MIT) | ||||
| /* | ||||
|  * Copyright (C) 2021 SiFive, Inc | ||||
|  */ | ||||
| 
 | ||||
| #include "hifive-unmatched-a00-u-boot.dtsi" | ||||
| #include "fu740-hifive-unmatched-a00-ddr-rev1.dtsi" | ||||
|  | @ -0,0 +1,4 @@ | |||
| // SPDX-License-Identifier: GPL-2.0+ | ||||
| /* Copyright (c) 2021 SiFive, Inc */ | ||||
| 
 | ||||
| #include "hifive-unmatched-a00.dts" | ||||
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