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Author SHA1 Message Date
Ye Li 5e3da4cf8e MLK-20116-1 imx7ulp: Update iomux pins header file for Rev B0 chip 
i.MX7ULP B0 silicon has below updates in iomux

  - GPIO function input buffer enable (IBE)/output buffer enable (OBE) is
    now controlled by RGPIO module. IOMUXC IBE/OBE is used as an override.
  - LPUART2_TX (I/O) to PTB12 (ALT4)
  - LPUART2_RX (I) to PTB13 (ALT4)
  - USB0_ID (I) to PTC13 (ALT11), PTC18 (ALT11) and PTC19 (ALT10)
  - VIU_DE (I) to PTC18 (ALT12), PTC19 (ALT12) and PTE5 (ALT12)
  - RTC_CLKOUT (O) to PTB5 (ALT11) and PTB14 (ALT11)
  - SEC_VIO_B (I) to PTB4 (ALT11)
  - Added new Input Selection Registers
      PSMI1_USB0_ID Address: 0x40ac_0338 To select USB_ID input pad/source
      PSMI1_VIU_DE Address: 0x40ac_033c To select VIU_DE input pad/source

Copy the imx7ulp-pinfunc.h from latest kernel dts
(commit 18cdeadfe1967ea33d3bdfc7ccead6d6d06a98a6), and update
the mx7ulp-pins.h accordingly.

Signed-off-by: Ye Li <ye.li@nxp.com>
 2018-11-02 20:50:07 -05:00
Peng Fan fa2f20d3c0 arm: dts: add i.MX7ULP dtsi file 
Add i.MX7ULP dtsi file.
Add clock and pinfun header files.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
 2017-03-17 09:27:08 +01:00