The HABv4 implementation in ROM checks if HAB major version
in IVT header is 4.x.
The current implementation in hab.c code is only validating
HAB v4.0 and HAB v4.1 and may be incompatible with newer
HABv4 versions.
Modify verify_ivt_header() function to align with HABv4
implementation in ROM code.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 33f51b401dffa393274a28f9d49a87af3eb02fe0)
When booting in low power or dual boot modes the M4 binary is
authenticated by the M4 ROM code.
Add an option in hab_status command so users can retrieve M4 HAB
failure and warning events.
=> hab_status m4
Secure boot disabled
HAB Configuration: 0xf0, HAB State: 0x66
No HAB Events Found!
Add command documentation in mx6_mx7_secure_boot.txt guide.
As HAB M4 API cannot be called from A7 core the code is parsing
the M4 HAB persistent memory region. The HAB persistent memory
stores HAB events, public keys and others HAB related information.
The HAB persistent memory region addresses and sizes can be found
in AN12263 "HABv4 RVT Guidelines and Recommendations".
Reviewed-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
(cherry picked from commit 0efff16579fabcf57acb9c8857afac8fb58de355)
Update SCFW API to v1.3 at below commit. A new API sc_pm_set_boot_parm
is added.
commit c5ef21f894de0ac8329f0fe540331a272fcd1461
Author: Chuck Cannon <chuck.cannon@nxp.com>
Date: Tue Feb 26 15:36:53 2019 -0600
SCF-352: Add more to SECO test.
Signed-off-by: Chuck Cannon <chuck.cannon@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit e79209e4174054bb328bae441bf8ab3c1312ee4e)
Update to latest SCFW API with below commit. Add version API and
remove some resource ids.
commit 004247e14afc74a21d65569415c4b2e35bfaabc3
Author: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Date: Thu Feb 14 14:55:12 2019 -0800
SCF-341 Fix bug in setting large slice clock divider
Incorrect mask was applied when clearing out the bits in the
DSC large slice divider.
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 745f2e597613e96f1ac630e842faafdc060ee029)
We use a glue layer to link the low level MU driver and virtual drivers.
This glue layer is named to virtual service (iMX VService). Virtual service
provides unified interfaces for setup connection with M4, get message buffer
and send/receive message, etc.
Multiple virtual drivers (i2c, gpio, etc)
|
iMX Vservice
|
imx_mu_m4 driver
For each virtual device, by default, the Vservice uses the device node property
"fsl,vservice-mu" to specify the MU node handler. A override function is also provided,
so te ARCH level can define its rule. We will use the override function for dynamically
select MU on 8QM/QXP.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 4d872794cae55ffb654a55646bbf231e8d864e13)
Sync the SCFW API to latest commit below:
commit 0721a2af721fca45e9d7e9b673b669ffab9aca7f
Author: Glen Wienecke <glen.wienecke@nxp.com>
Date: Sun Feb 10 19:16:56 2019 -0600
SCF-296: Partition reboot should not reset FSPI/OCRAM if in use
- Update ss_rsrc_reset to return BUSY error if FSPI/OCRAM in use
- Update pm_update_ridx to skip power transition if FSPI/OCRAM in use
- For user_mode update requests, reflect mode achieved after pm_update_ridx
- Add PM SVC call to get active mode (user_mode not accurate during transitions)
- Undo some MISRA updates that changed ss_rsrc_reset to void function
Signed-off-by: Glen Wienecke <glen.wienecke@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Update SCFW API to below commit which has deprecated APIs with
misc_seco prefix.
commit 30b8f67097d65c6e22f218b106aeafdc636aece3
Author: Chuck Cannon <chuck.cannon@nxp.com>
Date: Fri Jan 25 15:24:55 2019 -0600
SCF-60: MISRA fixes.
Signed-off-by: Chuck Cannon <chuck.cannon@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Update SCFW API from below SCFW commit which provides
the API to get seco events
commit 50355d4b11b089be8fc1bc13afa7da001b081a44
Author: Chuck Cannon <chuck.cannon@nxp.com>
Date: Mon Jan 14 12:30:42 2019 -0600
SCF-275: Fix monitor error on command 'event'.
Signed-off-by: Chuck Cannon <chuck.cannon@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Rename the gd flag GD_FLG_ARCH_MX6_USB_BOOT to GD_FLG_ARCH_IMX_USB_BOOT,
and move it to mach-imx/sys_proto.h since we will also use it on mx7.
Signed-off-by: Ye Li <ye.li@nxp.com>
Update API files generated from latest SCFW commit:
commit b5dbcf59157cf758da2b96c395e3f4cb2674437f
Author: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Date: Sat Oct 27 02:04:47 2018 -0500
SCF-248 Fix Linux boot fail on iMX8QX
Signed-off-by: Ye Li <ye.li@nxp.com>
iMX8MM family has several variant parts below.
Add CPU type and relevant updates
i.MX 8M Mini Quad Full featured, 4x A53
i.MX 8M Mini QuadLite No VPU, 4x A53
i.MX 8M Mini Dual Full featured, 2x A53
i.MX 8M Mini DualLite No VPU, 2x A53
i.MX 8M Mini Solo Full featured, 1x A53
i.MX 8M Mini SoloLite No VPU, 1x A53
Signed-off-by: Ye Li <ye.li@nxp.com>
Since commit 8891410c72 ("MLK-19848 mx6dq: Fix chip version issue for
rev1.3") it's not possible to call the HAB API functions on i.MX6DQ
SoC Rev 1.3:
Authenticate image from DDR location 0x12000000...
undefined instruction
pc : [<412c00dc>] lr : [<8ff560bc>]
reloc pc : [<c8b6d0dc>] lr : [<178030bc>]
sp : 8ef444a8 ip : 126e8068 fp : 8ff59aa8
r10: 8ffd51e4 r9 : 8ef50eb0 r8 : 006e8000
r7 : 00000000 r6 : 126ea01f r5 : 0000002b r4 : 126e8000
r3 : 412c00dd r2 : 00000001 r1 : 00000001 r0 : 00000063
Flags: nzCv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
resetting ...
The hab.h code is defining the HAB API base address according to the
old SoC revision number, thus failing when calling the HAB API
authenticate_image() function.
Fix this issue by using mx6dq rev 1.3 instead of mx6dq rev 1.5.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Add i.MX6ULZ support. the i.MX6ULZ is SW compatible
with i.MX6ULL. so most code of i.MX6ULL can be reused
by i.MX6ULZ.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
iMX8MQ has two variant versions: iMX8MD and iMX8MQLite. Add dummy CPU ID
for these two, and check the fuses to get correct versions.
Signed-off-by: Ye Li <ye.li@nxp.com>
Update SOC code to support U-Boot in a XEN VM. Currently
we only support to boot android using uboot in a VM,
so there is hardcode that using MMC1_BOOT boot.
There are a few small fixes included.
For the mmu configuration, the mem map is used from xen
guest VM and our iomem space in vm cfg file.
The VM use a different MU, so use a wrap for SC_IPC_CH.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 533087bc1bce0c35fead0956b0613971862c280f)
The imx8mm has changed the address of rvt_hab, use new address for imx8mm.
Also enable fuse driver in SPL and update registers maps.
The authentication procedure is same as imx8mq. In u-boot, the authentication
uses SIP call to trap ATF to run HAB authenticate.
Need to work with ATF commit:
(commit 7a4d6f90e999ed413d520310cc199901b52b7a04)
Users need to add CONFIG_SECURE_BOOT=y to imx8mm_evk_defconfig to enable
the feature.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 1118c9960c22c80a452181c6857fd1df86fe05ae)
Add cpu revision for i.MX8MM
Add helper function
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 5fdfc7d73157a5eb9254b43f65edd1bb5f13fd16)
i.MX8MM has a PE property, it does not have LVTTL
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 96169c1f2de1ac90a244166ab5bb6c874cdfd6bd)
In i.MX8QXP & i.MX8QM MU0 is used as the boot container MU.
This is taken by ATF so change the MU that is used for SCFW API
to MU1.
Signed-off-by: Teo Hall <teo.hall@nxp.com>
(cherry picked from commit d5aa444f3e83550e934d09982c76ea74e53fbedf)
Adding Display support for splash screen.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 8733549494dfa18d9317d76a8fabad8b41e6dcf6)
enable the GPMI NAND driver for i.MX8, the major changes
- register defination for i.mx8
- Makefile change for misc.c
- DMA structure must be 32bit address
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit 474c4270108551647c7064a23abdc2e11d7f37ab)
Add common functions for LVDS/DC setup, video framebuffer init/disable,
LVDS to HDMI card settings, etc. Refactor it from video_imxdpuv1.c.
1. Add power, clocks, PLL relevant setup for LVDS and DC.
2. Configure the LVDS and its PHY settings for the display format and pixel link.
3. Setup the LVDS to HDMI card.
4. Implement the video_hw_init by calling DC driver API to output data to
specified display panel.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 9317f7ea4d976335a633f7056bbac1f77b01247a)
Add cpu, power, and clocks functions for support i.MX8QM and i.MX8QXP SoCs.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Add the MU (message unit) driver and IPC functions for communicating with SCFW.
Add CONFIG_HAVE_SC_FIRMWARE for enabling the IPC feature and holding the
IP channel in global data.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Using the latest SCFW-API based on commit from SCFW master branch
"
commit 433c7fb773e3a5853e2744ff1f958bb225cd338a
Author: Chuck Cannon <chuck.cannon@nxp.com>
Date: Tue Apr 17 16:09:56 2018 -0500
Only default start CPUs for EMUL, SIMU, and test builds.
Signed-off-by: Chuck Cannon <chuck.cannon@nxp.com>
"
Signed-off-by: Ye Li <ye.li@nxp.com>
Update the gpmi/apbh_dma/bch drivers and relevant registers for i.MX8M.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 6cb839cabb42b81e37214e00448fc5dac89fd1f1)
There are some changes to support ARM64 i.MX8M platform in this patches:
1. The hab_rvt base and function vectors are different as i.MX6/7
2. Need to bypass an workaround for i.MX6 to fix problem in MMU.
3. The x18 register needed save & restore before calling any HAB API. According
to ARM procedure call spec, the x18 is caller saved when it is used as
temporary register. So calling HAB API may scratch this register, and
cause crash once accessing the gd pointer.
On ARMv7, the r9 is callee saved when it is used as variable register. So
no need to save & restore it.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 5f6ef97a9d13361895180df7014f4e4fb48a5875)
The i.MX6SL EVK needs this driver in android fastboot support. Add
this driver to u-boot.
To use the driver, user must define:
CONFIG_MXC_KPD Enable the driver
CONFIG_MXC_KEYMAPPING Key mapping matrix
CONFIG_MXC_KPD_COLMAX The column size of key mapping matrix
CONFIG_MXC_KPD_ROWMAX The row size of the key mapping matrix
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 5096e572667ff41217deb4ba9b1bd15e93fa6b59)
(cherry picked from commit e84160eaf5c057da45a227039c6f8a7911f43a82)
This patch is a porting of
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_4.1.15_1.0.0_ga&id=e4dacc44d22e9474ec456cb330df525cd805ea38
"
i.MX6QP and i.MX7D BCH module integrated a new feature to detect the
bitflip number for erased NAND page. So for these two platform, set the
erase threshold to gf/2 and if bitflip detected, GPMI driver will
correct the data to all 0xFF.
Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q
with the one for i.MX6QP.
"
In this patch, i.MX6UL is added and threshold changed to use ecc_strength.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 489929be0221bb7d4c46bb5bc6083650b78f73e0)
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 37d7f9614aa357f270312d7ceaab0f7006dc5aea)
Align to imx_v2015.04, dynamic setting mmcdev and mmcroot.
Then when boot linux, we can have correct "root=/dev/mmcblk[x]p2"
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit b46b99a901eb194e81fc4836ee2259ad8857f4d3)
(cherry picked from commit 6f6a828fbe7478efd5932c302e6368877107bbca)
Add vadc power up/down function.
When gis enable in uboot, the CSI0 input mux select setting
to vadc module, clean the bit when gis disabled
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Update the board_video_skip to use CONFIG_VIDEO_MXS for LCD display support.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit d6d0265b09e66c576ab4c01841166415f834a1ff)
(cherry picked from commit 8fa188c1466e6a74536f1b46fff88bf9b08b0d78)
Enable pcie support in uboot on imx6sx sd boards
- enable_pcie_clock should be call before ssp_en is set,
since that ssp_en control the phy_ref clk gate, turn on
it after the source of the pcie clks are stable.
- add debug info
- add rx_eq of gpr12 on imx6sx
- there are random link down issue on imx6sx. It's
pcie ep reset issue.
solution:reset ep, then retry link can fix it.
(cherry picked from commit ec78595a24b5ff1020baa97b6d6e79a3a3326307)
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 81fd30250110d72992758f08b66c07306126892b)
The pads name bind with CONFIG_MX6Q and CONFIG_6DL should start with MX6_PAD
not MX6Q_PAD and MX6DL_PAD. Otherwise we will get build break.
Signed-off-by: Ye Li <ye.li@nxp.com>
The i.MX6D is a variant of i.MX6Q. The only difference is the core number.
So we can select CONFIG_MX6Q to reduce duplicated codes and remove duplicated
usages of CONFIG_MX6D.
Signed-off-by: Ye Li <ye.li@nxp.com>
commit ed286bc80e ("imx: hab: Check if CSF is valid before authenticating
image") makes use of "__packed" as a prefix to the "struct hab_hdr"
declaration.
With my compiler "gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)" we
get:
./arch/arm/include/asm/mach-imx/hab.h:42:25: error: expected ‘=’, ‘,’, ‘;’,
‘asm’ or ‘__attribute__’ before ‘{’ token
struct __packed hab_hdr {
Fix this problem by including <linux/compiler.h>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Currently the following devices are using a different definition for ROM
Vector Table addresses:
- i.MX6DQP = All rev
- i.MX6DQ >= rev 1.5
- i.MX6SDL >= rev 1.2
There is no need to create a new RVT macros since the only update were the
RVT base address. Remove HAB_RVT_*_NEW macros and define a new RVT base
address.
More details about RVT base address can be found on processors Reference
Manual and in the following documents:
EB803: i.MX 6Dual/6Quad Applications Processor Silicon Revision 1.2 to 1.3
Comparison
EB804: i.MX 6Solo/6DualLite Application Processor Silicon Revision 1.1
to 1.2/1.3 Comparison
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Write, Check and Set MID commands have been deprecated from the Code
Signing Tool (CST) v2.3.3 and will not be implemented in newer versions
of HAB, hence the following features are no longer available:
- Write Data
- Clear Mask
- Set Mask
- Check All Clear
- Check All Set
- Check Any Clear
- Check Any Set
- Set MID
The inappropriate use of Write Data command may lead to an incorrect
authentication boot flow. Since no specific application has been identified
that requires the use of any of these features, it is highly recommended to
add this check.
Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
For proper authentication the HAB code must check if the CSF is valid.
Users must call the csf_is_valid() function to parse the CSF prior to
authenticating any additional images. The function will return a failure
if any of the following invalid conditions are met:
- CSF pointer is NULL
- CSF Header does not exist
- CSF does not lie within the image bounds
- CSF command length zero
Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
We should take the MX6DP and MX6QP options in consideration
in the I2C_PADS_INFO macro.
Based on a patch by Pierluigi Passaro <pierluigi.p@variscite.com>
Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
We should take the MX6DP and MX6QP options in consideration
when defining imx_iomux_v3_setup_pad().
Based on a patch by Pierluigi Passaro <pierluigi.p@variscite.com>
Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Include i.MX8M in lcdif register layout map.
Also included i.MX7ULP in this patch, since share same with i.MX8M.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Breno Lima
Leonard Crestez
Ye Li
Bai Ping
Teo Hall
Peng Fan
Han Xu
Bryan O'Donoghue
Utkarsh Gupta
Eran Matityahu