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3 Commits

Author SHA1 Message Date
Masahiro Yamada 0bd20207ab ARM: uniphier: disable cache in SPL of PH1-LD20 
The Boot ROM has enabled D-cache and MMU setting DDR memory area
as Normal Memory in its page table.  Disable D-cache and MMU
before jumping to U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
 2016-05-26 00:35:26 +09:00
Masahiro Yamada 5eb4150e84 ARM: uniphier: allow to use System Bus for ROM boot mode of PH1-LD20 
The System Bus is not available by default on the ROM boot mode of
PH1-LD20.  To use devices connected to the System Bus, such as the
Micro Support Card, it is necessary to set up pin-muxing and some
System Bus Controller register.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
 2016-05-01 01:09:18 +09:00
Masahiro Yamada 9d0c2ceb35 ARM: uniphier: add PH1-LD20 SoC support 
This is the first ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
 2016-04-24 09:54:08 +09:00