In the cdns3 usb driver, the clock name looked for is "ref". Therefore, fix
the clock-names property in usb0 instance for proper initialization of
cdns3 usb gadget driver.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Additions have been made to the non-HS defconfig without the same
being made to the HS defconfig, sync them.
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Store the start and end of the OS image that is loaded in images
structure. This is similar to what we do in booti.
Signed-off-by: Andrew F. Davis <afd@ti.com>
If DM image is not built-in to the fit, its size is going to be zero.
In this case, do not attempt to authenticate it.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
On J7200 processor board MCU_SAFETY_ERROR signal is routed to PMIC for
ESM error handling. The PMIC resets the board on receipt of the signal.
Enable the support for the board by adding ESM PMIC node.
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Main domain ESM support is needed to configure main domain watchdog
interrupts to generate ESM pin events. On J7200 boards ESM error pin
output is propagated to PMIC to generate reset.
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Initialize both ESM and ESM_PMIC support if available for the board.
If support is not available for either, a warning is printed out.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Sync up the high secure config against the latest general purpose
config. This re-enables booting up a j721e HS evm board.
Signed-off-by: Tero Kristo <kristo@kernel.org>
"DM_FLAG_REMOVE_WITH_PD_ON" should be set in driver flags in order for
the SERDES configurations to be retained to the kernel without resetting
SERDES driver. Set "DM_FLAG_REMOVE_WITH_PD_ON" in j721e-wiz driver.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
J721E EVM used to store env on eMMC, since EVM and EAIK uses same
defconfig and there is no eMMC on EAIK, we need to keep env in an
interface which available on both EVM and EAIK. So, save env in FAT
partition of MMC SD Card.
Enable defconfigs relevant for storing env on FAT partion of MMC.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
S28HS512T on TI EAIK has sector size of 256KB, so update OSPI partition
to align on 256KB sector size. Since the sector size for MT35XU512ABA
on EVM is 128KB, partitions will remain aligned for EVM.
Also, now since the sector size is 256KB ospi.env.backup will collide
with ospi.sysfw, so move ospi.env.backup to the padding space (0x7C0000)
before ospi.rootfs partition.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
Now that single defconfig can be used for booting J721E EVM and
EAIK, default device tree will not work for selecting dtb for
kernel. Update the findfdt env to select right dtb based on
board_name env variable.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
Add k3-j721e-eaik dtb along with other dtbs inside DTB FIT image.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. This will help to use same
defconfig for both EVM and EAIK.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
J721E EdgeAI Kit (EAIK) is a low cost, small form factor board designed
for TIâs J721E SoC. TIâs J721E SoC comprises of dual core A72, high
performance vision accelerators, video codec accelerators, latest C71x
and C66x DSP, high bandwidth real-time IPs for capture and display,
GPU, dedicated safety island and security accelerators. The SoC is
power optimized to provide best in class performance for perception,
sensor fusion, localization, path planning tasks in robotics,
industrial and automotive applications.
See J721E Technical Reference Manual (SPRUIL1B, REVISED DECEMBER 2020)
for more details about J721E SoC: http://www.ti.com/lit/pdf/spruil1
J721E EAIK supports the following interfaces:
* 4 GB LPDDR4 RAM
* x1 Gigabit Ethernet interface
* x1 USB 3.0 Type-C port
* x3 USB 3.0 Type-A ports
* x1 UHS-1 capable µSD card slot
* x1 PCIe M.2 E Key with x1 USB2.0, x1 MCASP, x1 MMC, x1 UART
* x1 PCIe M.2 M Key
* 512 Mbit OSPI flash
* x4 UART through UART-USB bridge
* x4 CAN-FD interface
* x1 DP interface
* x1 HDMI interface
* x2 CSI2 Camera interface (RPi and TI Camera connector)
* 40-pin Raspberry Pi compatible GPIO header
* Compact TI 20-Pin connector for JTAG debug
* Interface for remote automation. Includes:
* power measurement and reset control
* boot mode change
Add A72 specific dts for J721E-EAIK.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
Board ID I2C EEPROM will be probed before SYSFW is available.
So drop the power-domains property for wakup_i2c0 on which
board ID EEPROM is connected.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
Enable support for selecting DTB from FIT within SPL based on the
board name read from EEPROM. This will help to use single defconfig
for both EVM and EAIK.
Also print FDT model name and board name read from EEPROM on SPL debug
console. This is useful to verify that right dtb is loaded in each boot
stage.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
Update the board_fit_config_name_match() to choose the right dtb
based on the board name read from EEPROM.
Also restrict multpile EEPROM reads by verifying if EEPROM is already
read.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
j721e-eaik doesn't have any daughter cards, so disable daughter
card probing inside board_late_init() and spl_board_init() for
j721e-eaik.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
Update setup_board_eeprom_env() to choose the right board name
for j721e-eaik.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
J721E EVM has EEPROM populated at 0x50. J721E EAIK has EEPROM populated at
next address 0x51 in order to be compatible with RBPi. So start looking
for TI specific EEPROM at 0x50, if not found look for EEPROM at 0x51.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
board_late_init(), setup_board_eeprom_env() and setup_serial() is
called only under CONFIG_BOARD_LATE_INIT, so guard these functions
with the same.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
Buck regulator 1, 2 and 3 of TPS6594132 on j721e-eaik is in 3 Phase
confguration, in-order to support this, add configuring 3 Phase buck
in tps65941 while driver probing.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
Since TPS659412 and TPS659413 are both software compatible,
add a compatible string for the same inside tps65941.c.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
Enable support for show_board_info() in SPL build.
Signed-off-by: Amarnath MB <amarnath.mb@ti.com>
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Lokesh Vutla <lokesjhvutla@ti.com>
The k3-ddrss RAM driver generates the following build warning due to a
missing printk argument specifier in a dev_dbg. Fix this by printing
the actual bypass frequency.
drivers/ram/k3-ddrss/k3-ddrss.c:279:4: warning: too many arguments for format [-Wformat-extra-args]
279 | "ddr freq0 not populated, using bypass frequency.\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Fixes: d7ca60b875 ("ram: k3-ddrss: Allow use of dt provided initial frequency")
Signed-off-by: Suman Anna <s-anna@ti.com>
While calculating the length of the property value to be replaced with,
also include the "\0" character. This makes the length of the new property
value "host" to be 5 and not 4.
Fixes: d0d92256cb ("arm: mach-k3: am642_init: Fix the length of new property value in fdt_find_and_setprop()")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
HS400 speed mode is now supported in J7200 SoC[1]. Therefore add
mmc-hs400-1_8v tag in sdhci0 device tree node.
Also update the delay values for various speed modes supported, based on
the revised january 2021 J7200 datasheet[2].
[1] - section 12.3.6.1.1 MMCSD Features, in
https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf,
(SPRUIU1A – JULY 2020 – REVISED JANUARY 2021)
[2] - https://www.ti.com/lit/ds/symlink/dra821u.pdf,
(SPRSP57B – APRIL 2020 – REVISED JANUARY 2021)
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Read the strobe select value from the device tree property ti,strobe-sel,
required for HS400 speed mode
Fixes: a20008eabd ("mmc: am654_sdhci: Add Support for configuring PHY in J721e")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Add voltage and thermal management (VTM) node. The efuse values for the
OPPs are stored under the VTM, and is needed for AVS class 0 support.
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
TI J7200 EVM has lp876441 pmic that is similar to tps65941. Add support
for same with existing driver with new compatible.
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
In cdns_sierra/torrent_phy_probe(), after reading the phy instance
sub-nodes from device tree node, the instances are stored in a random order
in the phys array, of struct cdns_sierra/torrent_phy. However, in
phy_get_drvdata(), the phy instance is fetched assuming that the phy
instances are ordered according to lane number. This leads to incorrect
instance getting assigned for a given phy id.
Fix this by returning the instance that has the lane number equal to phy
id, in phy_get_drvdata().
Fixes: 87fa9820fd ("phy: cadence: Add driver for Sierra PHY")
Fixes: 9e49edcbfb ("phy: cadence: Add driver for Torrent SERDES")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
The `struct udevice *` reference is needed for either of the
K3_LOAD_SYSFW, K3_AM64_DDRSS config guards. Adding the missing
K3_AM64_DDRSS guard.
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Add ICSSG2 EMAC support. DT nodes are fetch from kernel 5.10
Add U-Boot specific properties are kept under
k3-am654-base-board-u-boot.dtsi
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
k3-am654-idk.dts is a dts file and should not be included in an overlay.
Fix it by including right overlay - k3-am654-sr1.dts.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The AM65x family of SoCs has two Silicon Revisions - SR1.0 and SR2.0.
The current dtsi and dts files all define the nodes to represent and/or
use the AM65x SR2.0. Add a new overlay file 'k3-am654-sr1.dts' to specify
the delta differences between the two Silicon revisions. This overlay
should be applied on top of the actual AM65x board dts files.
The AM65x SR2.0 SoCs have a revised ICSSG IP that is based off the
subsequent IP revision used on J721E SoCs. The ICSSG IP on AM65x SR2.0
SoCs have two new custom auxiliary PRU cores called Transmit PRUs
(Tx_PRUs) in addition to the existing PRUs and RTUs, but these are
not present on AM65x SR1.0 SoCs. The Tx_PRU nodes are added and enabled
by default in the base k3-am65-main.dtsi file, but these are absent on
SR1.0, so mark them disabled specifically.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Aswath Govindraju
Praneeth Bajjuri
Andrew F. Davis
Tero Kristo
Gowtham Tammana
Tero Kristo
Kishon Vijay Abraham I
Amarnath MB
Suman Anna
Lokesh Vutla