Kick the CAAM JR3 before kicking the SMMU, so SMMU error
won't affect CAAM functions.
Test: build and boot on imx8qxp_mek.
Change-Id: Iaa9a6084f226f81a087aac1eced93e8785861113
Signed-off-by: Ji Luo <ji.luo@nxp.com>
The CAAM driver in u-boot will use JR0 by default, but for
imx8q, both JR0 and JR1 are assigned to SECO and A core
should never access them.
Power on the JR3 in this patchset and use it to complete
the CAAM operations for imx8q.
Test: CAAM self test cases pass for imx8q.
Change-Id: Ie3d77d1f2910e7f4c257c797c12b5c8a30ad936a
Signed-off-by: Ji Luo <ji.luo@nxp.com>
Only the ROM on RevA will pass over some info into OCRAM. U-boot gets
the info to determine whether it is eMMC fastboot.
Thus, change that codes only for RevA, otherwise if we protect
the OCRAM used by SPL on RevB, u-boot will fail to access it.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
When doing partition reboot, the boot image won't be reloaded by ROM,
it is just CPU reset to boot entry. The SW has to keep the boot image
inside the RAM unchanged. It includes both the TEXT section and DATA
section.
For SPL, the problem is DATA section will be updated at runtime, so in
next partition reboot the data is not same as the initial value from
cold boot. If any code depends on the initial value, then it will have
problem.
This patch introduces a mechanism to recover the data section for partition
reboot. It adds a new section in image for saving data section. When from cold
boot, the data section will be saved to that new section at SPL early phase.
When from partition reboot, the data section will be restored from the new section.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
To support partition reboot, the u-boot has to enable clocks by LPCG.
The LPCG will reset to default value only when the subsystem is totally
power off and reset. However, the resources in one subsystem may belong
to different partitions, so the partition reboot may not reboot the entire
subsystem.
Powers, clocks/lpcg, GPR, IP may not reset depends on various cases and
HW design. Thus, AP software has to ensure everything is reset by SW
itself to support such above cases.
Signed-off-by: Ye Li <ye.li@nxp.com>
If OP-TEE is loaded by ATF, u-boot will add
optee device tree node in th edtb so that
Linux can loads OP-TEE driver.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Update mem map table for xen uboot.
xen console and some magic pages needs to be mappe as normal memory.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Flynn xu <flynn.xu@nxp.com>
camera sometime can't been open once run M4 image.
ISI-CH0 probe funtion is not called when meet issue.
The root cause is:
M4 image set assign resource SC_R_ISI_CH0 into m4 partition
when open camera in m4 side.
Uboot will call update_fdt_with_owned_resources to check the pd
in current dts node. it will call sc_rm_is_resource_owned to
check the pd whether in other partition, If yes, it will delete
the dts node. uboot delete isi_0 node whose pd is SC_R_ISI_CH0.
Change-Id: I4e2afbed2c55caad0a9f804fa8d85511c3bfea38
Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
When Trusty OS allocates the mem region from 0xfe0000000-0xffffffff, the get_effective_memsize
does not return correct memory size. There is a check in get_effective_memsize to find the memreg
where the u-boot is running, and return the size of that memreg as the result of get_effective_memsize.
When using aligned start, the value is 0x80200000 since it is 2MB aligned. Thus the finding of memreg
will fail and return the PHYS_SDRAM_1_SIZE because u-boot text base is 0x80020000.
This cause u-boot relocating to the high memory where has been occupied by Trusty OS.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The API to get the value of environment variable is not
correct, use correct API. This fix the build errors like
below:
arch/arm/mach-imx/built-in.o: In function `mmc_get_env_dev':
uboot-imx/arch/arm/mach-imx/imx8/cpu.c:840:
undefined reference to `get_env_ulong
Test: Build pass for imx8qm/imx8qxp.
Change-Id: I4fa65d1cd808ec6a737c419b278fce9cce2b1e7b
Signed-off-by: Luo Ji <ji.luo@nxp.com>
uuu can write to any position of mmc
sdps: boot -f ../mkimage_imx8dv/imx-mkimage/iMX8QX/flash.bin
FB: ucmd setenv fastboot_dev mmc
FB: ucmd setenv mmcdev ${emmc_dev}
FB: ucmd mmc dev ${emmc_dev}
FB: flash -raw2sparse all xx.sdcard
Signed-off-by: Frank Li <Frank.Li@nxp.com>
(cherry picked from commit ca96e0bd1aea1996904b0a71fb1d74c3f5176929)
Conflicts:
arch/arm/cpu/armv8/imx8/cpu.c
drivers/usb/gadget/f_fastboot.c
include/configs/imx8qxp_mek.h
Update SOC code to support U-Boot in a XEN VM. Currently
we only support to boot android using uboot in a VM,
so there is hardcode that using MMC1_BOOT boot.
There are a few small fixes included.
For the mmu configuration, the mem map is used from xen
guest VM and our iomem space in vm cfg file.
The VM use a different MU, so use a wrap for SC_IPC_CH.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 533087bc1bce0c35fead0956b0613971862c280f)
Since M4 will arrange some eDMA channels to its partition, the A core
can't use them. We have to remove these eDMA channels from DTB dynamically.
Different like other resources, disabling the eDMA channels require to modify
the edma nodes by removing relevant registers, interrupts configurations, and
adjust dma channels number.
This patch searches the edma nodes from kernel DTB, checks the channels by
binding their registers base address with their resource IDs. Then update
the reg, interrupts, interrupt-names and dma-channels properties.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by : Robin Gong <yibin.gong@nxp.com>
Porting the FSL android fastboot features from imx u-boot v2017.03 to
support all SoCs: imx6/imx7/imx7ulp/imx8/imx8m
Signed-off-by: Ye Li <ye.li@nxp.com>
We clean USBOTG register USBCMD if it is used in serial download mode.
When XRDC blocking is enabled, we can't write this register directly,
must enable the OTG power, otherwise the kernel will get SError
exception in mfgtool.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit cf2143dc97b2a8f21b828c7386c59ee965d981f2)
When CONFIG_ARCH_MISC_INIT is disabled, the static function
acquire_buildinfo is defined but not used. Fix this build warning.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit cc9e00c090b9e99fe5793381b5798f75e745eefd)
SCFW has provided the sc_misc_seco_build_info to get seco FW commit,
so use it in u-boot to print out the commit.
For A0 chip and unsupported SCFW build, the SECO commit is always 0.
BuildInfo:
- SCFW 433c7fb7, SECO-FW 041c9f92, IMX-MKIMAGE 8b15026b, ATF 5e238f9
- U-Boot 2017.03-00899-gdbd3637-dirty
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit a67dab1d01e81b226e14a65b595ba00e12c1f176)
Make sure that all devices that are powered up by uboot
are powered down before bringing up kernel.
Else the subsystem/device will never be powered down by SCFW even though
from the kernel's point of view it should be powered down.
Benefiting from power domain driver, We have implemented the function "power_off_pd_devices"
to power off all active devices. No need to explicitly power off them in board_quiesce_devices.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Add common functions for LVDS/DC setup, video framebuffer init/disable,
LVDS to HDMI card settings, etc. Refactor it from video_imxdpuv1.c.
1. Add power, clocks, PLL relevant setup for LVDS and DC.
2. Configure the LVDS and its PHY settings for the display format and pixel link.
3. Setup the LVDS to HDMI card.
4. Implement the video_hw_init by calling DC driver API to output data to
specified display panel.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 9317f7ea4d976335a633f7056bbac1f77b01247a)
Since we have many software running on QM/QXP, it is better to print their
commit ids in u-boot to know their versions.
This patch enables the CONFIG_ARCH_MISC_INIT. In arch_misc_init to gets the
commit ids for SCFW and ATF via their APIs and get the commit for imx-mkimage
at the end of u-boot.bin loading address.
Once the commit ids are acquired, show them in console like:
BuildInfo:
- SCFW f0cb8b8e, IMX-MKIMAGE cc994971, ATF 0
- U-Boot 2017.03-00031-g0596078-dirty
and set them to environment variables like:
commit_atf=0a9efa7
commit_mkimage=cc994971
commit_scfw=45c567e8
If old software are running which does not support provide commit it, the patch
use 0 instead.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
We met u-boot hang when booting from eMMC fastboot on QM/QXP boards.
The hang happens on u-boot accessing USB2 PHY for checking USB boot.
The root cause is when putting AP image (u-boot-atf.bin) in first container,
the USB2 PHY reset bit won’t be set in CONN SS by SCFW, because this SS has been
powered on by SC ROM.
In normal boot case, we won't meet such issue. Because we put u-boot-atf.bin in second
container and AP ROM will boot up for loading this binary. When AP ROM completes the
loading, it calls “misc_boot_status” API to power off the boot device and also power
off the CONN SS. Then when u-boot enables any the module in CONN, the CONN SS will power
on again by SCFW and set the USB2 PHY reset bit.
Since the clock settings are different in SC ROM and SCFW, so it is suggested to power off
CONN SS when booting is completed. In this patch, we check the g_ap_mu field in pass over
structure which is used to pass into from SC ROM to AP ROM. This field is set only when AP
image is included in the second container. If this field is not set, we suppose the booting
only uses SC ROM, then u-boot calls "misc_boot_status" at early stage to power off
boot device.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 67bb87f16e3742d6fab0b7837ffdb8bbed1245d1)
This is better done through dts.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
This is deprecated in favor of the generic iommus binding but xen only
supports this older version.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Using the SMMU for some devices (like dpu) requires a streamid to be
assigned to multiple resources.
Determining the resource ids for a device is a problem that occurs in
multiple contexts. So far uboot deals with this by parsing the
power-domain node which is insufficient here.
Add a new devicetree property called fsl,sc_rsrc_id which lists the
resource ids associated by a certain device.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Use streamids specified in dtb because they need to match anyway. This
removes the need to rebuild uboot for stream id assignments.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Before starting the kernel, need to check if the enabled nodes (resources) in FDT
are owned by current partition. If it is not owned, need to disable it because A core
can't access it.
We use the node's power-domain property to get the PD node which has the SCFW resource
id in its reg property. Then we can check it with SCFW.
Signed-off-by: Ye Li <ye.li@nxp.com>
Since the memory regions assigned to u-boot partition is dynamically set by
ATF and SCD. We have to setup MMU pagetables according to the owned memory
regions, not set it for unassigned memory.
Additional, the memory region 0x0-0x1c000000 is for LSIO subsystem, including OCRAM,
AP ROM, flexspi0 mapped memory and flexspi1 buffer. If we set it to cachable,
the AHB read in flexspi driver will have coherence problem. So we set this memory
region to strongly order to avoid any issue in driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
We assign the DDR memory from 0x88000000 to 0x8FFFFFFF to M4 on QM and QXP.
The M4 can allocate this memory by two ways, in SCD or u-boot.
There are 3 things needed to change in u-boot:
1. Move the u-boot INIT SP address to first 128M memory to avoid conflict with M4 memory.
2. The memory regions may be allocated in SCD or ATF. So we can't staticly set the memory
bank information in u-boot, need to get it from owned memory regions.
3. u-boot addes the memory reserve node to DTB to pass the info to kernel, no matter
the M4 memory is reserved in SCD or u-boot. So kernel won't access M4 reserved memory.
The codes for M4 resources and memory regions allocated by u-boot will be added
later when they are finalized.
Signed-off-by: Ye Li <ye.li@nxp.com>
1. Implement bootaux for the M4 boot on i.MX8QM and QXP. Users need to download
M4 image to any DDR address first. Then use the
"bootaux <M4 download DDR address> [M4 core id]" to boot CM4_0
or CM4_1, the default core id is 0 for CM4_0.
Since current M4 only supports running in TCM. The bootaux will copy
the M4 image from DDR to its TCML.
2. Implment bootaux for HIFI on QXP
command: bootaux 0x81000000 1
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
We setup SMMU in arch_preboot_os to avoid breaking u-boot driver.
Add a kconfig entry CONFIG_IMX_SMMU to enable it.
So far, the USDHC0-USDHC1 and FEC0-FEC1 are added into sid.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 7da6345919ee59a26cf65b4bc29072eea2fc0909)
Add cpu, power, and clocks functions for support i.MX8QM and i.MX8QXP SoCs.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Ji Luo
Ye Li
Silvano di Ninno
Peng Fan
zhang sanshan
Han Xu
Frank Li