u-boot

Commit Graph

Author	SHA1	Message	Date
Simon Glass	e160f7d430	dm: core: Replace of_offset with accessor At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>	2017-02-08 06:12:14 -07:00
Purna Chandra Mandal	e19b900457	spi: pic32_spi: add SPI master driver for PIC32 SoC. This driver implements SPI protocol in master mode to communicate with the SPI device connected on SPI bus. It handles /CS explicitly by controlling respective pin as gpio ('cs-gpios' property in dt node) and uses PIO mode for SPI transaction. It is configurable based on driver-model only. Cc: Jagan Teki <jteki@openedev.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>	2016-06-10 12:31:12 +02:00

Author

SHA1

Message

Date

Simon Glass

e160f7d430

dm: core: Replace of_offset with accessor

At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>

2017-02-08 06:12:14 -07:00

Purna Chandra Mandal

e19b900457

spi: pic32_spi: add SPI master driver for PIC32 SoC.

This driver implements SPI protocol in master mode to communicate
with the SPI device connected on SPI bus. It handles /CS explicitly
by controlling respective pin as gpio ('cs-gpios' property in dt node)
and uses PIO mode for SPI transaction. It is configurable based
on driver-model only.

Cc: Jagan Teki <jteki@openedev.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

2016-06-10 12:31:12 +02:00

2 Commits