u-boot

Commit Graph

Author	SHA1	Message	Date
Thor Thayer	8097aee3ab	ddr: socfpga: Enable ARM64 Non-Secure SDRAM ECC Access The ECC registers in the SDRAM HMC Adapter should always be accessible (both when ECC is enabled and disabled). Currently, the registers are accessible only when ECC is enabled. The ECC Enabled bit is used to determine the status of ECC by later OSes so always allow access. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>	2020-01-07 14:38:34 +01:00
Ley Foon Tan	6a48c34c25	ddr: altera: agilex: Add SDRAM driver for Agilex Add SDRAM driver for Agilex SoC. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>	2020-01-07 14:38:33 +01:00

Author

SHA1

Message

Date

Thor Thayer

8097aee3ab

ddr: socfpga: Enable ARM64 Non-Secure SDRAM ECC Access

The ECC registers in the SDRAM HMC Adapter should always
be accessible (both when ECC is enabled and disabled).
Currently, the registers are accessible only when ECC is enabled.

The ECC Enabled bit is used to determine the status of
ECC by later OSes so always allow access.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>

2020-01-07 14:38:34 +01:00

Ley Foon Tan

6a48c34c25

ddr: altera: agilex: Add SDRAM driver for Agilex

Add SDRAM driver for Agilex SoC.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

2020-01-07 14:38:33 +01:00

2 Commits