Commit Graph

13900 Commits

Author SHA1 Message Date
Lokesh Vutla 7c553a6f93 board: ti: Include sr1 base board as an overlay
Add sr1.0 overlay as part of k3_dtbo_list, so that SPL can apply sr1.0
overlay to U-Boot.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-06-23 22:58:16 -05:00
Suman Anna 3f05c3aa9a board: ti: k2g: Program PadConfig_202 before locking RSTMUX8
The PADCONFIG_202 register (0x02621328) is affected by the locking
of the RSTMUX8 register (0x02620328), and so cannot be configured
in kernel. This has been confirmed as a hardware bug and affects
all K2G SoCs.

Setup the pinmux for this pin before locking the RSTMUX8 register
to allow the ICSS1 PRU1 Ethernet PHY port to work properly. The
workaround was added only for the K2G-ICE board to configure the
pins needed for the PRUSS Ethernet usecase.

Signed-off-by: Suman Anna <s-anna@ti.com>
2021-06-23 22:52:29 -05:00
Keerthy fa8cb94c7e board: ti: j721e: evm: Update board_name to reflect the right SoM
Update board_name to reflect the right SoM

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
2021-06-06 23:41:49 -05:00
Keerthy 8e2aade7ae board: ti: j721e: evm: Add board detection for PM1 and PM2 SoMs
Add PM1 & PM2 SoM detection support.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
2021-06-06 23:41:49 -05:00
Lokesh Vutla 8cf23ced16 board: ti: am64x: Add support for detecting multiple device trees
Update the board_fit_config_name_match() to choose the right dtb.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-14 00:06:14 -05:00
Lokesh Vutla 86af205fc3 board: ti: am64x: Enable support for reading EEPROM in R5 SPL
Include the relevant configs to enable support for reading EEPROM in
R5SPL.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-14 00:06:14 -05:00
Lokesh Vutla d3ffde02c3 board: ti: am64x: Enable support for reading EEPROM at next alternate address
AM64 EVM has EEPROM populated at 0x50. Am64 SK has EEPROM populated at
next address 0x51 in order to be compatible with RBPi.
So start looking for TI specific EEPROM at 0x50, if not found look for
EEPROM at 0x51.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-14 00:06:14 -05:00
Lokesh Vutla c09f66901a board: ti: am64x: Guard functions with right #ifdef to avoid build warnings
setup_board_eeprom_env() and setup_serial() is called only under
CONFIG_BOARD_LATE_INIT, so guard these functions with the same.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-14 00:06:14 -05:00
Suman Anna 94a99712b5 board: ti: am65x: Use different overlay for IDK with SR1.0 EVM
The ICSSG IP is different between the two AM65x Silicon Revisions SR1.0
and SR2.0, and the ICSSG Ethernet nodes will look different between the
two versions. The Linux kernel uses a separate overlay file for the IDK
board between the two variants. Introduce a runtime check to use a
different overlay for IDK daughter card specifically for SR1.0 silicon.

Code is based on logic from an older patch from Roger Quadros.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
2021-04-29 21:46:19 -05:00
Suman Anna 50d1fed083 board: ti: am65x: Apply an overlay for boards using SR1.0 silicon
The AM65x EVM board can use either the newer SR2.0 or an older SR1.0
SoC. The default board dts file is used for SR2.0 silicons, and the
differences between the two silicon revision variants are handled
through a board-specific overlay file, k3-am654-base-board-sr1.dtbo.

Add logic to detect the silicon revision and apply this overlay while
booting Linux.

NOTE:
The ICSSG nodes are not yet added to U-Boot, and so there are no separate
overlay files to apply for U-Boot from A53 SPL.

Signed-off-by: Suman Anna <s-anna@ti.com>
2021-04-29 21:46:19 -05:00
Aswath Govindraju 0b88605aa9 board: ti: am64x: Set the core voltage of USB PHY to 0.85V
Set the core voltage of USB PHY in AM64x to 0.85V in spl_board_init().

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-04-16 00:22:16 -05:00
Vignesh Raghavendra e97e27b989 board: ti: am64x: Parse MAC address from board EEPROM
Parse MAC addresses from EEPROM and set them in the env. This is needed
to get MAC address for additional ethernet ports on the EVM.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-04-12 15:57:53 -05:00
Aswath Govindraju 93f02cea39 board: ti: j721e: Add support for probing and configuring Torrent serdes on J7200
Add support for probing and configuring Torrent serdes on J7200.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2021-04-09 11:41:19 -05:00
Aswath Govindraju 79d027134a board: ti: j7200: Add support for probing HyperFlash in A72 SPL
In the boot flow of HyperFlash boot mode, initially the clock rate is set
by ROM and the same is used by R5 and A72 SPLs. By default the status of
HyperFlash DT node is disabled, which implies that w.r.t R5 SPL HyperFlash
is disabled and the clocks assigned to it can now be reassigned.  In
common/spl/spl_nor.c the images are directly loaded into RAM without
setting the clock. In case of R5 SPL, tispl.bin image is first loaded and
then other devices are probed because of which the clock rate set by ROM
for HyperFlash does not change and image loaded is correct. However, by the
time the A72 SPL starts executing, the clock rate assigned to HyperFlash
gets changed. So, if the clock rate is not set again, the reads from
HyperFlash will be corrupted leading to a broken boot.

Fix this by probing the hbmc-am654 driver using
uclass_get_device_by_driver() which sets the default clock rate  before
calling the driver probe, when the state of SW3.1 dip switch on the board
is set to 1. Also, define the function spl_perform_fixups() in case of R5
SPL too, so that status of HyperFlash in tispl.bin image can be set
appropriately for device probe.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-03-30 22:28:36 -05:00
Lokesh Vutla 86aecef857 board: ti: am64x: Make devicetree selection generic
Compare with default device tree for selecting dtb for u-boot.
This will allow to choose right dtb for am64x-evm and am64x-sk.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-03-30 22:26:19 -05:00
Lokesh Vutla 2e75b7a4ea configs: am64x_evm_a53: Enable support for reading eeprom
Enable relevant configs for reading eeprom data and updating env
variables.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-03-30 22:25:31 -05:00
Lokesh Vutla 4bf4aec19b board: ti: am64x: Add support for reading eeprom data
I2C EEPROM data contains the board name and its revision.
Add support for:
- Reading EEPROM data and store a copy at end of SRAM
- Updating env variable with relevant board info
- Printing board info during boot.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-03-30 22:21:06 -05:00
Lokesh Vutla 98b20303fe board: ti: am64x: fix build warning for env
Fix the following build warning:
board/ti/am64x/evm.c:105:6: warning: implicit declaration of
	function ‘env_get’ [-Wimplicit-function-declaration]
  105 |  if (env_get("serial#"))

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-03-30 22:20:53 -05:00
Tero Kristo 6520e5e753 board: ti: j72xx: README: update build instructions and image formats
Update build instructions and image formats based on HSM rearch. A new
DM image is added into the build, which gets executed right after R5
SPL finishes its job.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2021-03-23 19:28:12 -05:00
Lokesh Vutla 4712c22566 common: fit: Update board_fit_image_post_process() to pass fit and node_offset
board_fit_image_post_process() passes only start and size of the image,
but type of the image is not passed. So pass fit and node_offset, to
derive information about image to be processed.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-03-23 17:18:13 -05:00
Dave Gerlach 37ec1d56bc arm: mach-k3: am642: Add support for triggering ddr init from SPL
In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support for
triggering DDR initialization from board_init_f().

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-03-23 17:17:40 -05:00
Dave Gerlach 9f682d3816 drivers: ram: k3-ddrss: Introduce top-level CONFIG_K3_DDRSS
Create a new CONFIG_K3_DDRSS option to select the common parts of the
k3-ddrss driver. Also introduce a choice that depends on the top level
option to select CONFIG_K3_J721E_DDRSS for j721e support, and update
corresponding Kconfig as required.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-03-23 17:17:20 -05:00
Dave Gerlach b5a074f43c board: ti: am64x: Add board support for am64x evm
Add board specific initialization for am64x based boards.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-03-23 16:47:11 -05:00
Jean-Jacques Hiblot 455d82923d configs: am65x_evm_a53: Enable configs for SPL applying overlays to U-Boot
Enable all relevant configs needed for SPL to apply overlays to U-Boot.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-03-22 22:47:28 -05:00
Jean-Jacques Hiblot 4240ec00af board: ti: am65x: detect the daughter cards in the SPL and probe the board driver
Enable SPL_BOARD_INIT. In spl_board_init(), do the detection of the
daughter boards and probe the K3 board driver.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-03-22 22:47:24 -05:00
Jean-Jacques Hiblot 1d1d08d23a board: ti: am65x: store a list of DTBOs needed for the detected daughter boards
This list will be used later by a board driver

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-03-22 22:47:22 -05:00
Lokesh Vutla 6d1730037b board: ti: k2g: Add support for K2G ICE with 1GHz Silicon
commit d2aa5727a5 upstream.

Add board detection support for K2G ICE with FlagChip 1GHz silicon.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-03-16 13:04:01 -05:00
Aswath Govindraju 7b4d977cd7 board: ti: am65x: Set SERDES0 mux to PCIe to use USB 2.0 interface
commit 6f9d41403a upstream.

It has been observed that setting SERDES0 lane mux to USB prevents USB 2.0
operation on USB0. Setting SERDES0 lane mux to non-USB when USB0 is used in
USB 2.0 only mode solves this issue. However, for USB3.0+2.0 operation this
issue is not present.

Implement this workaround by writing 1 to LANE_FUNC_SEL field in
CTRLMMR_SERDES0_CTRL register.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-03-16 13:04:01 -05:00
Lukasz Majewski a062d8e610 xea: spl: Disable pull UP for GPIO0_2{35}
On the imx287 pin GPMI_WRN (GPIO0_25) no PullUP is available that can be
enabled.

To get the same behavior for both boot select pins (i.e. GPIO0_2{35})
disable pull UPs on both.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2021-01-08 08:41:50 -05:00
Tom Rini c2d80bbde8 Merge tag 'ti-v2021.01-rc5' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix I2C speed for Nokia RX51
2021-01-05 16:10:33 -05:00
Pali Rohár a8ef64e4ef Nokia RX-51: Decrease i2c speed to 100000
It looks like that i2c bus lot of times timeout on some units. Prior
migration to CONFIG_DM_I2C i2c speed was set to CONFIG_SYS_OMAP24_I2C_SPEED
value which was 100000. Lower speed fixes timeout problems, so change speed
back to its previous value.

Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes: 8d8c181703 ("Nokia RX-51: Convert to CONFIG_DM_I2C")
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-01-05 20:49:52 +05:30
Marc Ferland 37648b600c arm: dart6ul: read and print SoM info from eeprom on startup
The dart6ul has an i2c eeprom at 0x50 which contains, among other
things, the manufacturing/revision/options info of the SoM. This patch
replaces the current checkboard() implementation with a more
exhaustive one based on the content of the eeprom.

Since this code uses the new driver model, some changes were also
required in the DTS to make the nodes related to i2c available before
relocation.

This code was inspired from the supported u-boot code from Variscite
which can be found here:

https://github.com/varigit/uboot-imx/tree/imx_v2018.03_4.14.78_1.0.0_ga_var02

New output example:

Board: PN: VSM-6UL-705B, Assy: AS1812142257, Date: 2019 Feb 17
       Storage: eMMC, Wifi: yes, DDR: 1024 MiB, Rev: 2.4G

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-12-26 14:56:09 +01:00
Igor Opaniuk f23c706863 toradex: hand over maintainership
Hand over maintainership of Toradex SoMs (that I was responsible of) to
Oleksandr because of my resignation from Toradex, as such I will
have no immediate involvement with these modules and as a result not
able to continue maintaining these boards.

CC: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-26 14:56:09 +01:00
Sebastian Reichel 717bf50f4b board: ge: bx50v3: cleanup phy config
The current PHY rework does the following things:

1. Configure 125MHz clock
2. Setup the TX clock delay (RX is enabled by default),
3. Setup reserved bits to avoid voltage peak

The clock delays are nowadays already configured by the
PHY driver (in ar803x_delay_config). The code for that
can simply be dropped. The clock speed can also be
configured by the PHY driver by adding the device tree
property "qca,clk-out-frequency".

What is left is setting up the undocumented reserved bits
to avoid the voltage peak problem. I slightly improved its
documentation while updating the board's PHY rework code.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-26 14:56:09 +01:00
Sebastian Reichel c44d374bef board: ge: bx50v3: remove confidx magic numbers
Instead of hardcoding index magic numbers in the board code,
also rely on board_fit_config_name_match choosing the right
config for the fitImage containing the kernel.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-26 14:56:09 +01:00
Fabio Estevam 72397c9621 mx6sabresd: Remove unneeded checkboard()
After the conversion to device tree the board information becomes
redundant:

Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board
Board: MX6-SabreSD

Remove the printing of the board information.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-12-26 12:37:07 +01:00
Andy Shevchenko f89e8acbc8 x86: edison: Switch to DM_USB_GADGET
DM is the modern default approach for the drivers in U-Boot.
It also allows to configure code via Device Tree.

Move Intel Edison to use DM_USB_GADGET and drop hard coded values.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:51:24 +08:00
Andy Shevchenko d067fb7636 x86: edison: BINMAN selection is specific to the board
The platforms based on Intel Tangier may have different requirements
how to create bootloader bundle to supply to a device. Currently
the BINMAN approach is for Intel Edison only.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16 13:50:42 +08:00
Biwen Li 164941c2c4 net: pfe_eth: read PFE ESBC header flash with spi_flash_read API
Read PFE ESBC header flash with spi_flash_read API
- logs as follows,
  Net:   SF: Detected s25fs512s with page size 256 Bytes, erase size 256
  KiB, total 64 MiB
  "Synchronous Abort" handler, esr 0x96000210
  elr: 000000008206db44 lr : 0000000082004ea0 (reloc)
  elr: 00000000b7ba6b44 lr : 00000000b7b3dea0
  x0 : 00000000b79407e8 x1 : 0000000040640000
  x2 : 0000000000000050 x3 : 0000000000000000
  x4 : 000000000000000a x5 : 0000000000000050
  x6 : 0000000000000366 x7 : 00000000b7942308
  x8 : 00000000b76407c0 x9 : 0000000000000008
  x10: 0000000000000044 x11: 00000000b7634d1c
  x12: 000000000000004f x13: 0000000000000044
  x14: 00000000b7634d98 x15: 00000000b76407c0
  x16: 0000000000000000 x17: 0000000000000000
  x18: 00000000b7636dd8 x19: 0000000000000000
  x20: 00000000b79407d0 x21: 00000000b79407e8
  x22: 0000000040640000 x23: 00000000b7634e58
  x24: 0000000000000000 x25: 0000000003800000
  x26: 00000000b7bdd000 x27: 0000000000000000
  x28: 0000000000000000 x29: 00000000b7634d10

  Code: d2800003 eb03005f 54000101 d65f03c0 (f8636826)
  Resetting CPU ...

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Madalin Bucur 848a2efd14 board: freescale: powerpc: add support for all RGMII modes
Make sure all RGMII internal delay modes are covered.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Madalin Bucur ccedd4ff8e armv8: ls1043/ls1046aqds: add support for all RGMII modes
Make sure all RGMII internal delay modes are covered.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Priyanka Singh f6cb837721 board: freescale: vid.c: Initialize variable 'i2caddress'
Initialize variable 'i2caddress' in adjust_vdd() to zero

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Biwen Li e343ae7c96 board/freescale/common: fix a bug that failed to read/write eeprom on ls1021atsn
Fix a bug that failed to read/write eeprom on ls1021atsn

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Meenakshi Aggarwal 9ed303dfa9 armv8: lx2162aqds: Add support for LX2162AQDS platform
This patch add base support for LX2162AQDS board.
LX2162AQDS board supports LX2162A family SoCs.
This patch add basic support of platform.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: hui.song <hui.song_1@nxp.com>
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Signed-off-by: Vikas Singh <vikas.singh@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Meenakshi Aggarwal 3a187cff7a armv8: lx2162a: Add Soc changes to support LX2162A
LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.

LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes
interface to support three PCIe gen3 interface.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Fixed whitespace errors]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Tom Rini 2a42de6df1 - Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
 - Enable internal pull-ups for SDMMC1 on DHCOM SoM
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Merge tag 'u-boot-stm32-20201209' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
- Enable internal pull-ups for SDMMC1 on DHCOM SoM
2020-12-09 11:36:41 -05:00
Patrice Chotard 0f8106f8e0 treewide: Update email address Patrick Delaunay and Patrice Chotard
Update Patrick and my email address with the one dedicated to
upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-09 10:57:50 +01:00
Manuel Reis 81d4c4e45c add check for ignored CONFIG_ENV_EXT4_DEVICE_AND_PART definition
Check whether user has explicitly defined device and partition where
environment file will be located before using 'auto' i.e. bootable
partition

Voids the need to set such partition as bootable to work with the
'dev:auto' tuple

Signed-off-by: Manuel Reis <mluis.reis@gmail.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Tom Rini 19ea606109 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-imx 2020-12-08 09:53:03 -05:00
Tom Rini ec79f5ce22 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Simplify DT handling of board variants (Pali)
- Add Luka Perkov to maintainers of Puzzle-M801 (Luka)
- Armada 38x: Enable board specific USB2 high-speed impedance
  threshold configuration (Joshua)
2020-12-07 11:46:12 -05:00