Commit Graph

3020 Commits

Author SHA1 Message Date
Derald D. Woods 8a3556edba omap3: evm: Explicitly use DISTRO_DEFAULTS features at startup
[primary] Check MMC 0:1 for /extlinux/extlinux.conf and boot
[fallback 1] Check MMC 0:1 zImage and run mmcbootz
[fallback 2] Check MMC 0:1 uImage and run mmcboot
[fallback 3] Check NAND partitions and run nandboot

If 'extlinux.conf' is not found on MMC 0, the previous boot behavior is
followed.

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2017-12-04 10:23:53 -05:00
Neil Armstrong c7be3e5a79 ARM: arch-meson: build memory banks using reported memory from registers
As discussed at [1], the Amlogic Meson GX SoCs can embed a BL31 firmware
and a secondary BL32 firmware.
Since mid-2017, the reserved memory address of the BL31 firmware was moved
and grown for security reasons.

But mainline U-Boot and Linux has the old address and size fixed.

These SoCs have a register interface to get the two firmware reserved
memory start and sizes.

This patch adds a dynamic reservation of the memory zones in the device tree bootmem
reserved memory zone used by the kernel in early boot.
To be complete, the memory zones are also added to the EFI reserved zones.

Depends on patchset "Add support for Amlogic GXL Based SBCs" at [2].

[1] http://lists.infradead.org/pipermail/linux-amlogic/2017-October/004860.html
[2] http://lists.infradead.org/pipermail/linux-amlogic/2017-November/005410.html

Changes since v1:
- switched the #if to if(IS_ENABLED()) to compile all code paths
- renamed function to meson_board_add_reserved_memory()
- added a mem.h header with comment
- updated all boards ft_board_setup()

Changes since RFC v2:
- reduced preprocessor load
- kept Odroid-C2 static memory mapping as exception

Changes since RFC v1:
- switch to fdt rsv mem table and efi reserve memory
- replaced in_le32 by readl()

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[trini: Fix warning on khadas-vim over missing <asm/arch/mem.h>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-12-04 10:17:29 -05:00
Neil Armstrong 5ff2ee44ee arm: Add Khadas VIM support based on Meson GXL family
This adds platform code for the Khadas VIM board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.

This initial submission supports UART, MMC/SDCard and Ethernet with the
Internal RMII PHY.

The meson-gxl-s905x-khadas-vim.dts is synchronised from the linux 4.13
stable tree as of 4.13.8.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04 09:59:03 -05:00
Neil Armstrong 96e7b5a174 arm: Add LibreTech CC support based on Meson GXL family
This adds platform code for the Libre Computer CC "Le Potato" board based on a
Meson GXL (S905X) SoC with the Meson GXL configuration.

This initial submission supports UART, MMC/SDCard and Ethernet with the
Internal RMII PHY.

The meson-gxl-s905x-libretech-cc.dts is synchronised from the linux 4.13
stable tree as of 4.13.8.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-12-04 09:59:03 -05:00
Dmitry Korunov 8993056fb3 add support for Raspberry Pi Zero W
Signed-off-by: Dmitry Korunov <dessel.k@gmail.com>
2017-12-04 09:59:02 -05:00
Kever Yang ed7e64e5e8 rockchip: rk3128: add defconfig for evb-rk3128
Enable board config for evb-rk3128.
Serial output and eMMC works in this version.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-30 22:55:27 +01:00
Tom Rini 9804d88630 Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh 2017-11-30 10:39:04 -05:00
Tom Rini 6ea51d2860 Merge git://git.denx.de/u-boot-x86 2017-11-30 10:37:43 -05:00
Marek Vasut ab61e17571 ARM: rmobile: Rework the ULCB CPLD driver
Rework the ULCB CPLD driver and make it into a sysreset driver,
since that is what the ULCB CPLD driver is mostly for.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30 08:54:18 +01:00
Anatolij Gustschin a2c0eed4e0 x86: conga-qeval20-qa3-e3845: Adjust VGA rom address
Adjust VGA rom address to 0xfffb0000 so that u-boot.rom image
can be built again.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
2017-11-30 13:50:17 +08:00
Ben Whitten b2e01ff543 board: laird: add WB50N CPU module
This board is based on the Atmel sama5d3 eval boards.
Supporting the following features:
 - Boot from NAND Flash
 - Ethernet
 - FIT
 - SPL

Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Dan Kephart <dan.kephart@lairdtech.com>
2017-11-29 22:36:59 -05:00
Ben Whitten 5aaef60077 board: laird: add WB45N CPU module
This board is based on the Atmel 9x5 eval board.
Supporting the following features:
 - Boot from NAND Flash
 - Ethernet
 - FIT
 - SPL

Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Dan Kephart <dan.kephart@lairdtech.com>
2017-11-29 22:36:59 -05:00
Ludovic Desroches aaa4ba930c board: atmel: add sama5d2_ptc_ek board
Add the SAMA5D2 PTC EK board and remove the SAMA5D2 PTC ENGI board
which was a prototype.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
2017-11-29 22:30:50 -05:00
Patrice Chotard fe8d4780ff configs: stm32f746-disco: enable MISC/DM_RESET/STM32_RESET and STM32_RCC
This allows to add rcc MFD support to stm32f746-disco board
This rcc MFD driver manages clock and reset for STM32 SoCs family

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2017-11-29 22:30:50 -05:00
Rick Chen c39b79df43 nds32: board: Support ftsdc010 DM.
AG101P/AE3XX enable ftsdc010 dm flow.

Signed-off-by: Rick Chen <rick@andestech.com>
2017-11-30 10:04:25 +08:00
Rick Chen 41bbb8b333 spi: nds_ae3xx: Rename nds_ae3xx_spi as atcspi200_spi
atcspi200 is Andestech spi ip which is embedded in
AE3XX and AE250 platforms. So rename as atcspi200
will be more reasonable to be used in different
platforms.

Signed-off-by: Rick Chen <rick@andestech.com>
2017-11-30 09:44:09 +08:00
Rick Chen fa3e354b2b ae3xx: timer: Rename AE3XX to ATCPIT100
ATCPIT100 is Andestech timer IP which is embeded
in AE3XX and AE250 boards. So rename AE3XX to
ATCPIT100 will be more make sence.

Signed-off-by: rick <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-30 09:38:54 +08:00
Marek Vasut 02e80f0c11 ARM: rmobile: Migrate boards to RCar IIC drivers
Stop using the old ad-hoc SH I2C driver and use the new RCar IIC
driver instead. The SH I2C driver should be deprecated and removed
eventually.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30 02:34:21 +01:00
Marek Vasut d7f0b85269 ARM: rmobile: Use PRR driver on all Gen3 boards
Mark the PRR as u-boot,dm-pre-reloc in all Gen3 board DTs as it is
needed very early and turn on the CONFIG_SYSCON to allow the PRR
driver to bind as a syscon uclass.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30 02:34:21 +01:00
Marek Vasut 796411b08a ARM: rmobile: Enable xHCI on RCar Gen3 boards
Enable the XHCI support on all boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30 02:34:20 +01:00
Marek Vasut 8e8ebd3269 ARM: rmobile: Remove CONFIG_CMD_SDRAM from Salvator-X
This command is useless on Salvator-X as it is reading DRAM info from
SPD. We have no SPD on Salvator-X.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30 02:34:20 +01:00
Marek Vasut fade9f2f16 ARM: rmobile: Enable Micrel KSZ90x1 PHY driver on ULCB
Enable the Micrel KSZ90x1 driver on ULCB, since the board is populated
with KSZ9031 and without this driver, the PHY cannot be operated.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-11-30 02:34:20 +01:00
Tom Rini b06c46de63 Xilinx changes for v2018.1
Zynq:
 - Add support for Syzygy and cc108 boards
 - Add support for mini u-boot configurations (cse)
 - dts updates
 - config/defconfig updates in connection to Kconfig changes
 - Fix psu_init handling
 
 ZynqMP:
 - SPL fixes
 - Remove slcr.c
 - Fixing r5 startup sequence
 - Add support for external pmufw
 - Add support for new ZynqMP chips
 - dts updates
 - Add support for zcu102 rev1.0 board
 
 Drivers:
 - nand: Support external timing setting and board init
 - ahci: Fix wording
 - axi_emac: Wait for bit, non processor mode, readl/write conversion
 - zynq_gem: Fix SGMII/PCS support
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Merge tag 'xilinx-for-v2018.01' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2018.1

Zynq:
- Add support for Syzygy and cc108 boards
- Add support for mini u-boot configurations (cse)
- dts updates
- config/defconfig updates in connection to Kconfig changes
- Fix psu_init handling

ZynqMP:
- SPL fixes
- Remove slcr.c
- Fixing r5 startup sequence
- Add support for external pmufw
- Add support for new ZynqMP chips
- dts updates
- Add support for zcu102 rev1.0 board

Drivers:
- nand: Support external timing setting and board init
- ahci: Fix wording
- axi_emac: Wait for bit, non processor mode, readl/write conversion
- zynq_gem: Fix SGMII/PCS support
2017-11-29 08:26:07 -05:00
Michal Simek 2665fb0336 arm: zynq: Enable debug uart on zc706
Enable debug uart by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-29 08:02:38 +01:00
Masahiro Yamada 53c149c3a5 ARM: uniphier: set CONFIG_LOGLEVEL to 6
Print out KERN_NOTICE or higher level log messages.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29 00:28:59 +09:00
Masahiro Yamada ab5502bf56 ARM: openrd: set CONFIG_LOGLEVEL to 2
These boards are on the boundary of "u-boot-nodtb.bin exceeds file
size limit" error.

Reduce the log-level to save memory footprint.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-11-29 00:28:57 +09:00
Michal Simek 70c42b4ca4 arm64: zynqmp: Add revision to identification string
It is good to see revision in boot log.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28 16:09:23 +01:00
Michal Simek ae9775f822 arm64: zynqmp: Add support for zcu102 1.0 rev
1.0 rev is the latest rev. Describe information in eeprom.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28 16:09:11 +01:00
Michal Simek 96894d3a9e arm64: zynqmp: Enable debug uart for zc1751 dc5
Showing uart earlier.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28 16:09:01 +01:00
Michal Simek dea4d2f01d arm: zynq: Add mini u-boot configuration for zynq
Add configuration files/dtses for mini u-boot configurations which runs
out of OCM.

ram top is calculated from 0 that's why +#define CONFIG_SYS_SDRAM_BASE
0xfffc0000
+#define CONFIG_SYS_SDRAM_SIZE  0x40000
was hardcoded.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-28 16:08:47 +01:00
Michal Simek 809704eb4f arm: zynq: Move ZYNQ_SERIAL to Kconfig
Move cadence/zynq serial driver via Kconfig

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-28 16:08:45 +01:00
Michal Simek 7fad6125e4 arm: zynq: Enable FPGA/FPGA_XILINX via Kconfig
Enabling fpga via Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28 16:08:45 +01:00
Michal Simek bc133e80ae arm: zynq: Add board support for cc108
cc108 board is wiring uart via PL which is good platform for SPL fpga
support.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-28 16:08:40 +01:00
Michal Simek 7111d6ed86 arm: zynq: Enable qspi for zc770_xm013
Enable qspi driver and flashes for this board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28 15:53:08 +01:00
Michal Simek b2ff7fb673 arm: zynq: Enable MACRONIX flash for zc702/zc706/zc770 xm010
Enable MACRONIX flash for boards with QSPI enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28 15:53:08 +01:00
Michal Simek 4c82ab9d29 arm: zynq: Enable debug console on zc770 xm010 by default
Enable debug console.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28 15:53:08 +01:00
Michal Simek 20dff6f153 arm: zynq: Enable bootz command for Xilinx platforms
bootz command is valid way how to boot Linux kernel. Enable it by
default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28 15:53:08 +01:00
Tom McLeod 413ab5b0e1 arm: zynq: Add support for SYZYGY Hub board
Add the Zynq-based SYZYGY Hub board from Opal Kelly. The board
contains a Xilinx Zynq xc7z012s SoC, 1GB DDR3 RAM, and supports
booting from SD.

Signed-off-by: Tom McLeod <tom.mcleod@opalkelly.com>
Cc: Michal Simek <monstr@monstr.eu>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28 15:53:07 +01:00
Tom Rini 7fef459096 spl: TI: Do not default to SPL_FIT_IMAGE_TINY being enabled
This option prevents booting on am335x_evm at least along with most
likely other platforms.

Fixes: 337bbb6297 ("spl: fit: add SPL_FIT_IMAGE_TINY config to reduce code-size")
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-11-27 23:05:11 -05:00
Tom Rini 6e6cf015e7 Merge git://www.denx.de/git/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-11-27 07:22:11 -05:00
Jagan Teki 5451ca4da9 configs: icore-rqs: Enable falcon mode
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27 10:36:40 +01:00
Jagan Teki 52aaddd6f4 i.MX6: engicam: Add imx6q/imx6ul boards for existing boards
Add new board names for existing board support
imx6q - icore and icore_rqs boards
imx6ul - geam6ul and isiot boards

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27 10:36:40 +01:00
Jagan Teki 152038ea18 i.MX6UL: icore: Add SPL_OF_CONTROL support
Add OF_CONTROL support for SPL code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27 10:36:40 +01:00
Jagan Teki 1f6e9bd2a7 i.MX6Q: icore: Add SPL_OF_CONTROL support
Add OF_CONTROL support for SPL code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-11-27 10:36:40 +01:00
Fabio Estevam f086812acd mx6sxsabresd: Use PARTUUID to specify the rootfs location
mx6sxsabresd can run different kernel versions, such as NXP 4.1 or mainline.

Currently the rootfs location is passed via mmcblk number and the
problem with this approach is that the mmcblk number for the SD
card changes depending on the kernel version.

In order to avoid such issue, use the UUID method to specify the
rootfs location.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2017-11-27 10:35:19 +01:00
Philipp Tomsich e5ee24dda2 rockchip: defconfig: puma-rk3399: bypass ADC-based boot_mode check
The boot (and fallback/emergency boot) concept for the RK3399-Q7
differs from Rockchip's reference platforms.

On the RK3399-Q7, some of this functionality is present in the
bootloader itself (and configurable); some is backed in hardware by
the Qseven BIOS_DISABLE signal to invoke the final stages of fallbacks
(i.e. either an external boot bypassing on-module memories or falling
back to the BROM for USB recovery).

In summary: the ADC-based boot_mode check does not apply for the
RK3399-Q7 and we therefore disable it (in this commit) by setting
CONFIG_BOOT_MODE_REG to 0.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-11-26 14:59:38 +01:00
Philipp Tomsich ec4bf3d6bd rockchip: defconfig: lion-rk3368: sync up with SPL changes for ATF
This tracks the SPL changes for ATF for the RK3368-uQ7:
 * renames ATF_SUPPORT to ATF
 * drops CONFIG_SPL_ATF_TEXT_BASE (now dynamically retrieved from
   the .itb file)

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:08 +01:00
Philipp Tomsich cba7b949b4 rockchip: defconfig: puma-rk3399: sync up with SPL changes for ATF
This defconfig update makes use of the new features:
 * CONFIG_ROCKCHIP_SPL_RESERVE_IRAM is now set to 0, as there is no
   overlap between the M0 firmware and the ATF (we load this to DRAM
   and relocate it to its final location within the ATF)
 * tracks the ATF_SUPPORT -> ATF renaming

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:08 +01:00
Philipp Tomsich cd5eae5590 rockchip: defconfig: firefly-rk3399: sync up with SPL changes for ATF
This tracks the SPL changes for ATF for the Firefly:
 * renames ATF_SUPPORT to ATF
 * drops CONFIG_SPL_ATF_TEXT_BASE

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-11-26 00:39:07 +01:00
Tom Rini 5ad1fec6ed TI: am57xx; Remove am57xx_evm_nodt_defconfig
We don't want this build anymore.

Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-11-21 08:03:32 -05:00