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No commits in common. "2016.05-am335x-netmodule" and "2016.05-am335x-netmodule-rfe63209" have entirely different histories.
2016.05-am
...
2016.05-am
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@ -414,14 +414,6 @@ config TARGET_AM335X_NRHW24
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select DM_SERIAL
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select DM_GPIO
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config TARGET_AM335X_HW25
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bool "Support am335x_hw25"
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select CPU_V7
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select SUPPORT_SPL
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select DM
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select DM_SERIAL
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select DM_GPIO
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config TARGET_AM335X_SL50
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bool "Support am335x_sl50"
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select CPU_V7
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@ -923,7 +915,6 @@ source "board/nm/netbird_v2/Kconfig"
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source "board/nm/nrhw20/Kconfig"
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source "board/nm/nmhw21/Kconfig"
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source "board/nm/nrhw24/Kconfig"
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source "board/nm/hw25/Kconfig"
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source "board/olimex/mx23_olinuxino/Kconfig"
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source "board/phytec/pcm051/Kconfig"
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source "board/phytec/pcm052/Kconfig"
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@ -279,26 +279,6 @@ uint32_t bd_get_fpgainfo(void)
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return fpgainfo;
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}
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int bd_get_pd_dio(char *config, size_t len)
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{
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if ( !_get_string(BD_Pd_DIO, 0, config, len) ) {
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debug("%s() no DIO info\n", __func__);
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return -1;
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}
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return 0;
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}
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int bd_get_pd_serial(char *config, size_t len)
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{
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if ( !_get_string(BD_Pd_Serial, 0, config, len) ) {
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debug("%s() no serial port info\n", __func__);
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return -1;
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}
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return 0;
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}
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int bd_get_pd_module(uint32_t slot, char *config, size_t len)
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{
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if ( !_get_string(BD_Pd_Module0 + slot, 0, config, len) ) {
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@ -22,8 +22,6 @@ void bd_get_hw_version(int* ver, int* rev);
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void bd_get_hw_patch(int* patch);
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int bd_get_mac(int index, uint8_t *macaddr, size_t len);
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uint32_t bd_get_fpgainfo(void);
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int bd_get_pd_dio(char *config, size_t len);
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int bd_get_pd_serial(char *config, size_t len);
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int bd_get_pd_module(uint32_t slot, char *config, size_t len);
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int bd_get_sim_config(char* simconfig, size_t len);
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int bd_get_devicetree(char* devicetreename, size_t len);
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@ -16,29 +16,11 @@
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#define CONFIG_PMIC_I2C_ADDR 0x58 /* Pages 0 and 1, Pages 2 and 3 -> 0x59 */
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#define PMIC_REG_STATUS_A 0x01 /* Status of ON_KEY, WAKE, COMP1V2, DVC */
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#define PMIC_REG_STATUS_A_COMP1V2_MASK 0x08
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#define PMIC_REG_FAULT_LOG 0x05 /* PMIC fault log register, holding reset reason */
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#define PMIC_FAULT_TWD_ERROR_MASK 0x01 /* Watchdog timeout detected */
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#define PMIC_FAULT_POR_MASK 0x02 /* Startup from No-Power/RTC/Delivery mode */
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#define PMIC_REG_EVENT_A 0x06
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#define PMIC_REG_EVENT_ONKEY_MASK 0x01
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#define PMIC_REG_EVENT_RTC_ALARM_MASK 0x02
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#define PMIC_REG_EVENT_RTC_TICK_MASK 0x04
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#define PMIC_REG_EVENT_EVENTS_B_MASK 0x20
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#define PMIC_REG_EVENT_B 0x07
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#define PMIC_REG_EVENT_COMP1V2_MASK 0x04
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#define PMIC_REG_IRQ_MASK_A 0x0A
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#define PMIC_REG_IRQ_MASK_B 0x0B
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#define PMIC_REG_IRQ_MASK_C 0x0C
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#define PMIC_REG_IRQ_MASK_D 0x0D
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#define PMIC_REG_CONTROL_A 0x0E /* Control register for power states */
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#define PMIC_REG_CONTROL_D 0x11 /* Control register for blink/watchdog */
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#define PMIC_REG_GPIO14_15 0x1C /* Configuration of GPIO14/15 (mode, wake) */
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#define PMIC_REG_CONTROL_D 0x11 /* Control register for blink/watchdog */
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#define PMIC_REG_GPIO14_15 0x1C /* Configuration of GPIO14/15 (mode, wake) */
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#define PMIC_REG_GPIO_MODE0_7 0x1D /* Control register for GPIOs 0..7 */
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#define PMIC_REG_GPIO_MODE8_15 0x1E /* Control register for GPIOs 8..15 */
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@ -57,7 +39,6 @@
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#define PMIC_LDOx_CONF_MASK 0x80
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#define PMIC_REG_ID_4_3 0x84
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#define PMIC_REG_ID_6_5 0x85
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#define PMIC_REG_BUCK_ILIM_A 0x9A
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#define PMIC_REG_BUCK_ILIM_B 0x9B
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@ -83,9 +64,6 @@
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#define PMIC_REG_TRIM_CLDR 0x120 /* Calendar Trim register, 2's complement, 1.9ppm per bit */
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#define PMIC_GP_ID_0 0x121 /* General purpose ID 0 (R/W) */
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#define PMIC_GP_ID_1 0x122 /* General purpose ID 1 (R/W) */
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#define PMIC_REG_CONFIG_ID 0x184 /* OTP Config ID <ver.rev> */
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@ -1,36 +0,0 @@
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/*
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* ether_crc.c
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*
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* Ethernet CRC computation
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*
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* Copyright (C) 2018-2020 NetModule AG - http://www.netmodule.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include "ether_crc.h"
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uint32_t ether_crc(size_t len, uint8_t const *p)
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{
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uint32_t crc;
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unsigned i;
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crc = ~0;
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while (len--) {
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crc ^= *p++;
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for (i = 0; i < 8; i++)
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crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
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}
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/* an reverse the bits, cuz of way they arrive -- last-first */
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crc = (crc >> 16) | (crc << 16);
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crc = (crc >> 8 & 0x00ff00ff) | (crc << 8 & 0xff00ff00);
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crc = (crc >> 4 & 0x0f0f0f0f) | (crc << 4 & 0xf0f0f0f0);
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crc = (crc >> 2 & 0x33333333) | (crc << 2 & 0xcccccccc);
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crc = (crc >> 1 & 0x55555555) | (crc << 1 & 0xaaaaaaaa);
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return crc;
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}
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@ -1,18 +0,0 @@
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/*
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* ether_crc.h
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*
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* Ethernet CRC computation
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*
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* Copyright (C) 2018-2020 NetModule AG - http://www.netmodule.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef ETHER_CRC_H
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#define ETHER_CRC_H
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extern uint32_t ether_crc(size_t len, uint8_t const *p);
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#endif /* ETHER_CRC_H */
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@ -1,26 +0,0 @@
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if TARGET_AM335X_HW25
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config SYS_BOARD
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default "hw25"
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config SYS_VENDOR
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default "nm"
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config SYS_SOC
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default "am33xx"
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config SYS_CONFIG_NAME
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default "am335x_hw25"
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config CONS_INDEX
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int "UART used for console"
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range 1 6
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default 1
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help
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The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
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in documentation, etc) available to it. Depending on your specific
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board you may want something other than UART0 as for example the IDK
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uses UART3 so enter 4 here.
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endif
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@ -1,13 +0,0 @@
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#
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# Makefile
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#
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# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
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obj-y := mux.o
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endif
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obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o ../common/ether_crc.o fileaccess.o
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File diff suppressed because it is too large
Load Diff
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@ -1,26 +0,0 @@
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/*
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* board.h
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*
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* TI AM335x boards information header
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* We have three pin mux functions that must exist. We must be able to enable
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* uart0, for initial output and i2c2 to read the main EEPROM. We then have a
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* main pinmux function that can be overridden to enable all other pinmux that
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* is required on the board.
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*/
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void enable_uart0_pin_mux(void);
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void enable_board_pin_mux(void);
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#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
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#endif
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@ -1,40 +0,0 @@
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#include <common.h>
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#include <fs.h>
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#define BLOCK_DEVICE "mmc"
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#define OVERLAY_PART "1:3"
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int read_file(const char* filename, char *buf, int size)
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{
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loff_t filesize = 0;
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loff_t len;
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int ret;
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if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
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puts("Error, can not set blk device\n");
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return -1;
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}
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/* Read at most file size bytes */
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if (fs_size(filename, &filesize)) {
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return -1;
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}
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if (filesize < size)
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size = filesize;
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/* For very unclear reasons the block device needs to be set again after the call to fs_size() */
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if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
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puts("Error, can not set blk device\n");
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return -1;
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}
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if ((ret = fs_read(filename, (ulong)buf, 0, size, &len))) {
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printf("Can't read file %s (size %d, len %lld, ret %d)\n", filename, size, len, ret);
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return -1;
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}
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buf[len] = 0;
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return len;
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}
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@ -1,14 +0,0 @@
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/**@file /home/eichenberger/projects/nbhw16/u-boot/board/nm/netbird_v2/fileaccess.h
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* @author eichenberger
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* @version 704
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* @date
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* Created: Tue 06 Jun 2017 02:02:33 PM CEST \n
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* Last Update: Tue 06 Jun 2017 02:02:33 PM CEST
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*/
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#ifndef FILEACCESS_H
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#define FILEACCESS_H
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void fs_set_console(void);
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int read_file(const char* filename, char *buf, int size);
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#endif // FILEACCESS_H
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@ -1,223 +0,0 @@
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/*
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* mux.c
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*
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* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
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* kind, whether express or implied; without even the implied warranty
|
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/mux.h>
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#include <asm/io.h>
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#include "board.h"
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static struct module_pin_mux gpio_pin_mux[] = {
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/*
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* CPU GPIOs
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*
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* (J18) GPIO0_16: RST_PHY~
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* (U10) GPIO0_22: SEL_RS232/RS485~
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* (T10) GPIO0_23: EN_RS485_TERM~
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* (T11) GPIO0_26: IO_OUT1
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* (U12) GPIO0_27: IO_OUT2
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*
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* (T12) GPIO1_12: IO_IN0
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* (T13) GPIO1_13: IO_IN1
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* (T14) GPIO1_14: IO_IN2
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* (T15) GPIO1_15: IO_IN3
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*
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* (T13) GPIO2_0: RST_SDCARD~
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* (L17) GPIO2_18: GSM_PWR_EN
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* (L16) GPIO2_19: RST_GSM
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*
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* (K18) GPIO3_9: WLAN_IRQ
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* (L18) GPIO3_10: WLAN_EN
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* (C12) GPIO3_17: SIM_SEL
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*/
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/* Bank 0 */
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{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gpio0[16] */ /* RST_PHY~ */
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{OFFSET(gpmc_ad8), (MODE(7) | PULLUDDIS)}, /* (U10) gpio0[22] */ /* SEL_RS232/RS485~ */
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{OFFSET(gpmc_ad9), (MODE(7) | PULLUDDIS)}, /* (T10) gpio0[23] */ /* EN_RS485_TERM~ */
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{OFFSET(gpmc_ad10), (MODE(7) | PULLUDDIS)}, /* (T11) gpio0[26] */ /* IO_OUT1 */
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{OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)}, /* (U12) gpio0[27] */ /* IO_OUT2 */
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/* Bank 1 */
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{OFFSET(gpmc_ad12), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (T12) gpio1[12] */ /* IO_IN0 */
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{OFFSET(gpmc_ad13), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (R12) gpio1[13] */ /* IO_IN1 */
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{OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (V13) gpio1[14] */ /* IO_IN2 */
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{OFFSET(gpmc_ad15), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (U13) gpio1[15] */ /* IO_IN3 */
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|
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/* TODO: What about all the unused GPMC pins ? */
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/* Bank 2 */
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{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)}, /* (T13) gpio2[0] */ /* RST_SDCARD~ */
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{OFFSET(mii1_rxd3), (MODE(7) | PULLUDDIS)}, /* (L17) gpio2[18] */ /* GSM_PWR_EN */
|
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{OFFSET(mii1_rxd2), (MODE(7) | PULLUDDIS)}, /* (L16) gpio2[19] */ /* RST_GSM */
|
||||
|
||||
|
||||
#if 0
|
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/* TODO: What is this meant for? */
|
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{OFFSET(lcd_data3), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (R4) gpio2[9] */ /* SYSBOOT_3 */
|
||||
{OFFSET(lcd_data4), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (T1) gpio2[10] */ /* SYSBOOT_4 */
|
||||
|
||||
/* TODO: Check other unued pins from sysboot block */
|
||||
/* Ensure PU/PD does not work against external signal */
|
||||
/*
|
||||
* SYSBOOT 0,1,5,12,13 = Low
|
||||
* SYSBOOT 2 = High
|
||||
*/
|
||||
#endif
|
||||
|
||||
/* Bank 3 */
|
||||
{OFFSET(mii1_txclk), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (K18) gpio3[9] */ /* WLAN_IRQ */
|
||||
{OFFSET(mii1_rxclk), (MODE(7) | PULLUDDIS)}, /* (L18) gpio3[10] */ /* WLAN_EN */
|
||||
{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (C12) gpio3[17] */ /* SIM_SEL */
|
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{-1}
|
||||
};
|
||||
|
||||
/* I2C0 PMIC */
|
||||
static struct module_pin_mux i2c0_pin_mux[] = {
|
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{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (C17) I2C0_SDA */
|
||||
{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (C16) I2C0_SCL */
|
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{-1}
|
||||
};
|
||||
|
||||
/* I2C2 System */
|
||||
static struct module_pin_mux i2c2_pin_mux[] = {
|
||||
{OFFSET(uart1_rtsn), (MODE(3) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (D17) I2C2_SCL */
|
||||
{OFFSET(uart1_ctsn), (MODE(3) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (D18) I2C2_SDA */
|
||||
{-1},
|
||||
};
|
||||
|
||||
/* RMII1: Ethernet */
|
||||
static struct module_pin_mux rmii1_pin_mux[] = {
|
||||
/* RMII */
|
||||
{OFFSET(mii1_crs), MODE(1) | PULLUDDIS | RXACTIVE}, /* (H17) rmii1_crs */
|
||||
{OFFSET(mii1_rxerr), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE}, /* (J15) gpio (rxerr) */
|
||||
{OFFSET(mii1_rxd0), MODE(1) | PULLUDDIS | RXACTIVE}, /* (M16) rmii1_rxd0 */
|
||||
{OFFSET(mii1_rxd1), MODE(1) | PULLUDDIS | RXACTIVE}, /* (L15) rmii1_rxd1 */
|
||||
{OFFSET(mii1_txen), MODE(1) | PULLUDDIS}, /* (J16) rmii1_txen */
|
||||
{OFFSET(mii1_txd0), MODE(1) | PULLUDDIS}, /* (K17) rmii1_txd0 */
|
||||
{OFFSET(mii1_txd1), MODE(1) | PULLUDDIS}, /* (K16) rmii1_txd1 */
|
||||
{OFFSET(rmii1_refclk), MODE(0) | PULLUDDIS | RXACTIVE}, /* (H18) rmii1_refclk */
|
||||
|
||||
/* SMI */
|
||||
{OFFSET(mdio_clk), MODE(0) | PULLUDDIS}, /* (M18) mdio_clk */
|
||||
{OFFSET(mdio_data), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE}, /* (M17) mdio_data */
|
||||
|
||||
/* 25MHz Clock Output */
|
||||
{OFFSET(xdma_event_intr0), MODE(3)}, /* (A15) clkout1 (25 MHz clk for PHY) */
|
||||
{-1}
|
||||
};
|
||||
|
||||
/* RMII2: Ethernet */
|
||||
static struct module_pin_mux rmii2_pin_mux[] = {
|
||||
/* RMII */
|
||||
{OFFSET(gpmc_a9), MODE(3) | PULLUDDIS | RXACTIVE}, /* (U16) rmii2_crs */
|
||||
{OFFSET(gpmc_wpn), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE}, /* (U17) gpio (rxerr) */
|
||||
{OFFSET(gpmc_a11), MODE(3) | PULLUDDIS | RXACTIVE}, /* (V17) rmii2_rxd0 */
|
||||
{OFFSET(gpmc_a10), MODE(3) | PULLUDDIS | RXACTIVE}, /* (T16) rmii2_rxd1 */
|
||||
{OFFSET(gpmc_a0), MODE(3) | PULLUDDIS}, /* (R13) rmii2_txen */
|
||||
{OFFSET(gpmc_a5), MODE(3) | PULLUDDIS}, /* (V15) rmii2_txd0 */
|
||||
{OFFSET(gpmc_a4), MODE(3) | PULLUDDIS}, /* (R14) rmii2_txd1 */
|
||||
{OFFSET(mii1_col), MODE(1) | PULLUDDIS | RXACTIVE}, /* (H16) rmii2_refclk */
|
||||
{-1},
|
||||
};
|
||||
|
||||
/* MMC0: WiFi */
|
||||
static struct module_pin_mux mmc0_sdio_pin_mux[] = {
|
||||
{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G17) MMC0_CLK */
|
||||
{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G18) MMC0_CMD */
|
||||
{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G16) MMC0_DAT0 */
|
||||
{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G15) MMC0_DAT1 */
|
||||
{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (F18) MMC0_DAT2 */
|
||||
{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (F17) MMC0_DAT3 */
|
||||
{-1}
|
||||
};
|
||||
|
||||
/* MMC1: eMMC */
|
||||
static struct module_pin_mux mmc1_emmc_pin_mux[] = {
|
||||
{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U9) MMC1_CLK */
|
||||
{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V9) MMC1_CMD */
|
||||
{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U7) MMC1_DAT0 */
|
||||
{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V7) MMC1_DAT1 */
|
||||
{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R8) MMC1_DAT2 */
|
||||
{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T8) MMC1_DAT3 */
|
||||
{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U8) MMC1_DAT4 */
|
||||
{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V8) MMC1_DAT5 */
|
||||
{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R9) MMC1_DAT6 */
|
||||
{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T9) MMC1_DAT7 */
|
||||
{-1}
|
||||
};
|
||||
|
||||
/* USB_DRVBUS not used -> configure as GPIO */
|
||||
static struct module_pin_mux usb_pin_mux[] = {
|
||||
{OFFSET(usb0_drvvbus), (MODE(7) | PULLUDDIS)}, /* (F16) USB0_DRVVBUS */
|
||||
{OFFSET(usb1_drvvbus), (MODE(7) | PULLUDDIS)}, /* (F15) USB1_DRVVBUS */
|
||||
{-1}
|
||||
};
|
||||
|
||||
/* UART0: User (Debug/Console) */
|
||||
static struct module_pin_mux uart0_pin_mux[] = {
|
||||
{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (E15) UART0_RXD */
|
||||
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (E16) UART0_TXD */
|
||||
{-1},
|
||||
};
|
||||
|
||||
/* UART5: RS232/RS485 */
|
||||
/* CTS is unused - set to GPIO mode */
|
||||
static struct module_pin_mux uart5_pin_mux[] = {
|
||||
{OFFSET(lcd_data9), (MODE(4) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U2) UART5_RXD */
|
||||
{OFFSET(lcd_data8), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (U1) UART5_TXD */
|
||||
{OFFSET(lcd_data14), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (V4) uart5_ctsn */
|
||||
{OFFSET(lcd_data15), (MODE(6) | PULLUDEN | PULLUP_EN)}, /* (T5) uart5_rtsn */
|
||||
{-1}
|
||||
};
|
||||
|
||||
static struct module_pin_mux unused_pin_mux[] = {
|
||||
/* SYSBOOT6, 7, 10, 11: Not used pulldown active, receiver disabled */
|
||||
{OFFSET(lcd_data6), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
|
||||
{OFFSET(lcd_data7), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
|
||||
{OFFSET(lcd_data10), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
|
||||
{OFFSET(lcd_data11), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
|
||||
|
||||
/* TODO: GPMCA1..3, A6..8 */
|
||||
|
||||
{-1}
|
||||
};
|
||||
|
||||
|
||||
void enable_board_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(gpio_pin_mux);
|
||||
|
||||
configure_module_pin_mux(rmii1_pin_mux);
|
||||
configure_module_pin_mux(rmii2_pin_mux);
|
||||
configure_module_pin_mux(mmc0_sdio_pin_mux);
|
||||
configure_module_pin_mux(mmc1_emmc_pin_mux);
|
||||
configure_module_pin_mux(usb_pin_mux);
|
||||
|
||||
configure_module_pin_mux(i2c0_pin_mux);
|
||||
configure_module_pin_mux(i2c2_pin_mux);
|
||||
|
||||
configure_module_pin_mux(uart5_pin_mux);
|
||||
|
||||
configure_module_pin_mux(unused_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart0_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart0_pin_mux);
|
||||
}
|
||||
|
||||
|
|
@ -1,158 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2004-2008 Texas Instruments
|
||||
*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x00000000;
|
||||
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
*(.__image_copy_start)
|
||||
*(.vectors)
|
||||
CPUDIR/start.o (.text*)
|
||||
board/nm/hw25/built-in.o (.text*)
|
||||
*(.text*)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : {
|
||||
*(.data*)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
. = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
.u_boot_list : {
|
||||
KEEP(*(SORT(.u_boot_list*)));
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
.__efi_runtime_start : {
|
||||
*(.__efi_runtime_start)
|
||||
}
|
||||
|
||||
.efi_runtime : {
|
||||
*(efi_runtime_text)
|
||||
*(efi_runtime_data)
|
||||
}
|
||||
|
||||
.__efi_runtime_stop : {
|
||||
*(.__efi_runtime_stop)
|
||||
}
|
||||
|
||||
.efi_runtime_rel_start :
|
||||
{
|
||||
*(.__efi_runtime_rel_start)
|
||||
}
|
||||
|
||||
.efi_runtime_rel : {
|
||||
*(.relefi_runtime_text)
|
||||
*(.relefi_runtime_data)
|
||||
}
|
||||
|
||||
.efi_runtime_rel_stop :
|
||||
{
|
||||
*(.__efi_runtime_rel_stop)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
.image_copy_end :
|
||||
{
|
||||
*(.__image_copy_end)
|
||||
}
|
||||
|
||||
.rel_dyn_start :
|
||||
{
|
||||
*(.__rel_dyn_start)
|
||||
}
|
||||
|
||||
.rel.dyn : {
|
||||
*(.rel*)
|
||||
}
|
||||
|
||||
.rel_dyn_end :
|
||||
{
|
||||
*(.__rel_dyn_end)
|
||||
}
|
||||
|
||||
.hash : { *(.hash*) }
|
||||
|
||||
.end :
|
||||
{
|
||||
*(.__end)
|
||||
}
|
||||
|
||||
_image_binary_end = .;
|
||||
|
||||
/*
|
||||
* Deprecated: this MMU section is used by pxa at present but
|
||||
* should not be used by new boards/CPUs.
|
||||
*/
|
||||
. = ALIGN(4096);
|
||||
.mmutable : {
|
||||
*(.mmutable)
|
||||
}
|
||||
|
||||
/*
|
||||
* Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
|
||||
* __bss_base and __bss_limit are for linker only (overlay ordering)
|
||||
*/
|
||||
|
||||
.bss_start __rel_dyn_start (OVERLAY) : {
|
||||
KEEP(*(.__bss_start));
|
||||
__bss_base = .;
|
||||
}
|
||||
|
||||
.bss __bss_base (OVERLAY) : {
|
||||
*(.bss*)
|
||||
. = ALIGN(4);
|
||||
__bss_limit = .;
|
||||
}
|
||||
|
||||
.bss_end __bss_limit (OVERLAY) : {
|
||||
KEEP(*(.__bss_end));
|
||||
}
|
||||
|
||||
.dynsym _image_binary_end : { *(.dynsym) }
|
||||
.dynbss : { *(.dynbss) }
|
||||
.dynstr : { *(.dynstr*) }
|
||||
.dynamic : { *(.dynamic*) }
|
||||
.gnu.hash : { *(.gnu.hash) }
|
||||
.plt : { *(.plt*) }
|
||||
.interp : { *(.interp*) }
|
||||
.gnu : { *(.gnu*) }
|
||||
.ARM.exidx : { *(.ARM.exidx*) }
|
||||
}
|
||||
|
|
@ -10,4 +10,4 @@ ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
|
|||
obj-y := mux.o
|
||||
endif
|
||||
|
||||
obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o ../common/ether_crc.o fileaccess.o sja1105.o ui.o um.o reset_reason.o
|
||||
obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o fileaccess.o sja1105.o ui.o um.o
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -13,10 +13,8 @@
|
|||
|
||||
void enable_uart0_pin_mux(void);
|
||||
void enable_uart2_pin_mux(void);
|
||||
void enable_uart4_pin_mux(void);
|
||||
void enable_spi1_mux(void);
|
||||
void enable_led_mux(void);
|
||||
void enable_led_mux_v32(void);
|
||||
|
||||
void enable_board_pin_mux(void);
|
||||
|
||||
#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
|
||||
|
|
|
|||
|
|
@ -23,22 +23,24 @@
|
|||
|
||||
static struct module_pin_mux gpio_pin_mux[] = {
|
||||
/*
|
||||
* (V2) GPIO0_8: RS232_485n_SEL (V3.2)
|
||||
* (V3) GPIO0_9: RS485_DE (V3.2)
|
||||
* (J18) GPIO0_16: ETH_SW_RST~ (V2.0)
|
||||
* (K15) GPIO0_17: CTRL.INT~
|
||||
* (T10) GPIO0_23: CAN_TERM1~ (V1.0)
|
||||
* (T17) GPIO0_30: LED0.GN
|
||||
*
|
||||
* (T12) GPIO1_12: SIM_SW
|
||||
* (V13) GPIO1_14: GNSS_RST~
|
||||
* (U13) GPIO1_15: CAN_TERM0~ (V1.0)
|
||||
* (R14) GPIO1_20: BT_EN
|
||||
* (V15) GPIO1_21: GSM_PWR_EN
|
||||
* (U15) GPIO1_22: LED1.RD
|
||||
* (V16) GPIO1_24: LED1.GN
|
||||
* (U16) GPIO1_25: RST_GSM
|
||||
* (T16) GPIO1_26: WLAN_EN
|
||||
* (V17) GPIO1_27: WLAN_IRQ
|
||||
* (U18) GPIO1_28: LED0.RD
|
||||
*
|
||||
* (U3) GPIO2_16: TIMEPULSE (HW26), see note [1]
|
||||
* (U3) GPIO2_16: TIMEPULSE (HW26)
|
||||
* (R6) GPIO2_25: RST_ETH~
|
||||
*
|
||||
* (J17) GPIO3_4: GNSS_EXTINT
|
||||
|
|
@ -46,31 +48,47 @@ static struct module_pin_mux gpio_pin_mux[] = {
|
|||
* (L18) GPIO3_10: CTRL.RST
|
||||
* (C12) GPIO3_17: UI_RST~
|
||||
* (A14) GPIO3_21: RST_HUB~ (USB)
|
||||
*
|
||||
* [1] No PU/PD allowed as TIMEPULSE is internally connected with SAFEBOOT_N.
|
||||
* SAFEBOOT_N must be left open/floating.
|
||||
*/
|
||||
|
||||
/* Bank 0 */
|
||||
{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) GPIO0_16: ETH_SW_RST~ (V2.0) */
|
||||
{OFFSET(mii1_txd2), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (K15) GPIO0_17: CTRL.INT~ */
|
||||
{OFFSET(gpmc_ad9), (MODE(7) | PULLUDDIS)}, /* (T10) GPIO0_23: CAN_TERM1~ */
|
||||
{OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS)}, /* (T17) GPIO0_30: LED0.GN */
|
||||
|
||||
/* Bank 1 */
|
||||
{OFFSET(gpmc_ad12), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (T12) GPIO1_12: SIM_SW */
|
||||
{OFFSET(gpmc_ad12), (MODE(7) | PULLUDDIS)}, /* (T12) GPIO1_12: SIM_SW */
|
||||
{OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS)}, /* (V13) GPIO1_14: GNSS_RST~ */
|
||||
{OFFSET(gpmc_ad15), (MODE(7) | PULLUDDIS)}, /* (U13) GPIO1_15: CAN_TERM0~ */
|
||||
|
||||
{OFFSET(gpmc_a4), (MODE(7) | PULLUDDIS)}, /* (R14) gpio1_20: BT_EN */
|
||||
{OFFSET(gpmc_a5), (MODE(7) | PULLUDDIS)}, /* (V15) gpio1_21: GSM_PWR_EN */
|
||||
{OFFSET(gpmc_a6), (MODE(7) | PULLUDDIS)}, /* (U15) GPIO1_22: LED1.RD */
|
||||
{OFFSET(gpmc_a8), (MODE(7) | PULLUDDIS)}, /* (V16) GPIO1_24: LED1.GN */
|
||||
{OFFSET(gpmc_a9), (MODE(7) | PULLUDDIS)}, /* (U16) gpio1_25: RST_GSM */
|
||||
{OFFSET(gpmc_a10), (MODE(7) | PULLUDDIS)}, /* (T16) gpio1_26: WLAN_EN */
|
||||
{OFFSET(gpmc_a11), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (V17) gpio1_27: WLAN_IRQ */
|
||||
{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)}, /* (U18) GPIO1_28: LED0.RD */
|
||||
|
||||
/* TODO: What about all the unused GPMC pins ? */
|
||||
|
||||
/* Bank 2 */
|
||||
{OFFSET(lcd_data10), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (U3) GPIO2_16: TIMEPULSE */
|
||||
{OFFSET(lcd_data10), (MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE)}, /* (U3) GPIO2_16: TIMEPULSE input */
|
||||
{OFFSET(lcd_ac_bias_en), (MODE(7) | PULLUDDIS)}, /* (R6) GPIO2_25: RST_ETH~ */
|
||||
|
||||
#if 0
|
||||
/* TODO: What is this meant for? */
|
||||
{OFFSET(lcd_data3), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (R4) gpio2[9] */ /* SYSBOOT_3 */
|
||||
{OFFSET(lcd_data4), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (T1) gpio2[10] */ /* SYSBOOT_4 */
|
||||
|
||||
/* TODO: Check other unued pins from sysboot block */
|
||||
/* Ensure PU/PD does not work against external signal */
|
||||
/*
|
||||
* SYSBOOT 0,1,5,12,13 = Low
|
||||
* SYSBOOT 2 = High
|
||||
*/
|
||||
#endif
|
||||
|
||||
/* Bank 3 */
|
||||
{OFFSET(mii1_rxdv), (MODE(7) | PULLUDDIS)}, /* (J17) GPIO3_4: GNSS_EXTINT */
|
||||
{OFFSET(mii1_txclk), (MODE(7) | PULLUDDIS)}, /* (K18) GPIO3_9: CTRL.W_DIS */
|
||||
|
|
@ -80,39 +98,6 @@ static struct module_pin_mux gpio_pin_mux[] = {
|
|||
{-1}
|
||||
};
|
||||
|
||||
static struct module_pin_mux led_pin_mux[] = {
|
||||
/*
|
||||
* (T17) GPIO0_30: LED0.GN
|
||||
* (U15) GPIO1_22: LED1.RD
|
||||
* (V16) GPIO1_24: LED1.GN
|
||||
* (U18) GPIO1_28: LED0.RD
|
||||
*/
|
||||
|
||||
{OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS)}, /* (T17) GPIO0_30: LED0.GN */
|
||||
{OFFSET(gpmc_a6), (MODE(7) | PULLUDDIS)}, /* (U15) GPIO1_22: LED1.RD */
|
||||
{OFFSET(gpmc_a8), (MODE(7) | PULLUDDIS)}, /* (V16) GPIO1_24: LED1.GN */
|
||||
{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)}, /* (U18) GPIO1_28: LED0.RD */
|
||||
{-1}
|
||||
};
|
||||
|
||||
static struct module_pin_mux led_pin_mux_v32[] = {
|
||||
/*
|
||||
* (C15) GPIO0_6: MB_LED_PWM
|
||||
* (U15) GPIO1_22: LED1.RD
|
||||
* (T15) GPIO1_23: LED0.GN (formerly: (T17) GPIO0_30)
|
||||
* (V16) GPIO1_24: LED1.GN
|
||||
* (U18) GPIO1_28: LED0.RD
|
||||
*/
|
||||
|
||||
{OFFSET(spi0_cs1), (MODE(7) | PULLUDDIS)}, /* (C15) GPIO0_6: MB_LED_PWM */
|
||||
{OFFSET(gpmc_a6), (MODE(7) | PULLUDDIS)}, /* (U15) GPIO1_22: LED1.RD */
|
||||
{OFFSET(gpmc_a7), (MODE(7) | PULLUDDIS)}, /* (T15) GPIO1_23: LED0.GN */
|
||||
{OFFSET(gpmc_a8), (MODE(7) | PULLUDDIS)}, /* (V16) GPIO1_24: LED1.GN */
|
||||
{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)}, /* (U18) GPIO1_28: LED0.RD */
|
||||
{-1}
|
||||
};
|
||||
|
||||
|
||||
/* I2C0 PMIC */
|
||||
static struct module_pin_mux i2c0_pin_mux[] = {
|
||||
{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (C17) I2C0_SDA */
|
||||
|
|
@ -218,22 +203,8 @@ static struct module_pin_mux uart2_pin_mux[] = {
|
|||
|
||||
/* UART3: GNSS */
|
||||
static struct module_pin_mux uart3_pin_mux[] = {
|
||||
{OFFSET(mii1_rxd3), (MODE(1) | PULLUDDIS | RXACTIVE)}, /* (L17) UART3_RXD */
|
||||
{OFFSET(mii1_rxd2), (MODE(1) | PULLUDDIS | SLEWCTRL)}, /* (L16) UART3_TXD */
|
||||
{-1}
|
||||
};
|
||||
|
||||
/* UART4: User RS232/485 (V3.2 only) */
|
||||
static struct module_pin_mux uart4_pin_mux[] = {
|
||||
/*
|
||||
* CTSn = SEL_RS232/RS485~: Default = Low -> RS485 mode
|
||||
* RTSn = RS485_DE: Default = Low -> RS485 transmitter disabled
|
||||
* Configure as GPIO in U-Boot to keep disabled, Linux will change to RTSn
|
||||
*/
|
||||
{OFFSET(gpmc_wait0), (MODE(6) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T17) UART4_RXD */
|
||||
{OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (U17) UART4_TXD */
|
||||
{OFFSET(lcd_data12), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (V2) uart4_ctsn */
|
||||
{OFFSET(lcd_data13), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (V3) uart4_rtsn */
|
||||
{OFFSET(mii1_rxd3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (L17) UART3_RXD */
|
||||
{OFFSET(mii1_rxd2), (MODE(1) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (L16) UART3_TXD */
|
||||
{-1}
|
||||
};
|
||||
|
||||
|
|
@ -297,22 +268,7 @@ void enable_uart2_pin_mux(void)
|
|||
configure_module_pin_mux(uart2_pin_mux);
|
||||
}
|
||||
|
||||
void enable_uart4_pin_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(uart4_pin_mux);
|
||||
}
|
||||
|
||||
void enable_spi1_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(spi1_pin_mux);
|
||||
}
|
||||
|
||||
void enable_led_mux(void)
|
||||
{
|
||||
configure_module_pin_mux(led_pin_mux);
|
||||
}
|
||||
|
||||
void enable_led_mux_v32(void)
|
||||
{
|
||||
configure_module_pin_mux(led_pin_mux_v32);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,81 +0,0 @@
|
|||
/*
|
||||
* reset_reason.c
|
||||
*
|
||||
* Reset/start reason handling
|
||||
*
|
||||
* Copyright (C) 2021 NetModule AG - https://www.netmodule.com/
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
#include <common.h>
|
||||
#include "../common/ether_crc.h"
|
||||
#include "reset_reason.h"
|
||||
|
||||
|
||||
void rr_set_reset_reason(volatile struct reset_registers* reset_regs, uint32_t reason)
|
||||
{
|
||||
reset_regs->rr_value = reason;
|
||||
reset_regs->rr_value_crc = ether_crc(sizeof(reset_regs->rr_value),
|
||||
(const uint8_t*)&(reset_regs->rr_value));
|
||||
}
|
||||
|
||||
bool rr_is_reset_reason_valid(volatile const struct reset_registers* reset_regs)
|
||||
{
|
||||
const uint32_t crc = ether_crc(sizeof(reset_regs->rr_value),
|
||||
(const uint8_t*)&(reset_regs->rr_value));
|
||||
return crc == reset_regs->rr_value_crc;
|
||||
}
|
||||
|
||||
void rr_set_start_reason(volatile struct reset_registers* reset_regs, uint32_t event)
|
||||
{
|
||||
/* Store start events in shared memory region for OS */
|
||||
reset_regs->sr_magic = SR_MAGIC;
|
||||
reset_regs->sr_events = event;
|
||||
reset_regs->sr_checksum = ether_crc(sizeof(reset_regs->sr_events),
|
||||
(const uint8_t*)&(reset_regs->sr_events));
|
||||
}
|
||||
|
||||
bool rr_is_start_reason_valid(volatile const struct reset_registers* reset_regs)
|
||||
{
|
||||
if (reset_regs->sr_magic == SR_MAGIC) {
|
||||
const uint32_t crc = ether_crc(sizeof(reset_regs->sr_events),
|
||||
(const uint8_t*)&(reset_regs->sr_events));
|
||||
if (crc == reset_regs->sr_checksum) {
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
void rr_start_reason_to_str(uint32_t events, char* buffer, size_t bufsize)
|
||||
{
|
||||
if (events == 0) {
|
||||
strncpy(buffer, "-\n", bufsize);
|
||||
}
|
||||
else {
|
||||
buffer[0] = 0;
|
||||
if (events & SR_POR)
|
||||
strncat(buffer, "PowerOn, ", bufsize);
|
||||
if (events & SR_WATCHDOG)
|
||||
strncat(buffer, "Watchdog, ", bufsize);
|
||||
if (events & SR_REBOOT)
|
||||
strncat(buffer, "Reboot, ", bufsize);
|
||||
if (events & SR_WAKEUP)
|
||||
strncat(buffer, "Wakeup, ", bufsize);
|
||||
|
||||
if (events & SR_EVT_IGNITION)
|
||||
strncat(buffer, "Ignition, ", bufsize);
|
||||
if (events & SR_EVT_RTC_ALARM)
|
||||
strncat(buffer, "RTC, ", bufsize);
|
||||
if (events & SR_EVT_RTC_TICK)
|
||||
strncat(buffer, "Tick, ", bufsize);
|
||||
if (events & SR_EVT_GPI)
|
||||
strncat(buffer, "GPI, ", bufsize);
|
||||
if (events & SR_EVT_BUTTON)
|
||||
strncat(buffer, "Button, ", bufsize);
|
||||
|
||||
/* Trim last comma, no 0 len check required, at least one entry is present */
|
||||
buffer[strlen(buffer)-2] = 0;
|
||||
}
|
||||
}
|
||||
|
|
@ -1,60 +0,0 @@
|
|||
/*
|
||||
* reset_reason.h
|
||||
*
|
||||
* Reset/start reason handling
|
||||
*
|
||||
* Copyright (C) 2021 NetModule AG - https://www.netmodule.com/
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef RESET_REASON_H
|
||||
#define RESET_REASON_H
|
||||
|
||||
struct reset_registers {
|
||||
/* Reboot Reasons, set by OS, expect watchdog set by bootloader */
|
||||
uint32_t rr_value;
|
||||
uint32_t rr_value_crc;
|
||||
|
||||
/* Start Reasons as determined by hardware */
|
||||
uint32_t sr_magic; /* Token to check presence of following fields */
|
||||
uint32_t sr_events; /* Events bitmask, see SE_... defines */
|
||||
uint32_t sr_checksum; /* Checksum over se_events */
|
||||
};
|
||||
|
||||
/* Watchdog reboot reason event */
|
||||
#define RR_POWEROFF_PATTERN 0x00000000
|
||||
#define RR_EXTERNAL_WATCHDOG_PATTERN 0x781f9ce2
|
||||
#define RR_BOOT_PATTERN 0x424f4f54 /* ‘BOOT’, 0xb9808470 */
|
||||
#define RR_REBOOT_PATTERN 0x5245424f /* ‘REBO’, 0x7d5d9d66 */
|
||||
#define RR_OOPS_PATTERN 0x4F4F5053 /* ‘OOPS’, 0x2b85bc5f */
|
||||
#define RR_WAKE_PATTERN 0x57414B45 /* 'WAKE', 0x7b0acb48 */
|
||||
|
||||
/* Start reason token 'SRTE' */
|
||||
#define SR_MAGIC 0x53525445
|
||||
|
||||
/* Possible start events (see sr_events) */
|
||||
#define SR_POR 0x00000001
|
||||
#define SR_WATCHDOG 0x00000010
|
||||
#define SR_REBOOT 0x00000020
|
||||
#define SR_WAKEUP 0x00000080 /* See SR_EVT_xx bits */
|
||||
|
||||
/* In case of wake-up, these are the events that caused the start */
|
||||
#define SR_EVT_IGNITION 0x00000100
|
||||
#define SR_EVT_RTC_ALARM 0x00000200 /* RTC date/time alarm */
|
||||
#define SR_EVT_RTC_TICK 0x00000400 /* RTC tick based alarm */
|
||||
#define SR_EVT_GPI 0x00000800 /* General purpose input(s) */
|
||||
#define SR_EVT_BUTTON 0x00001000
|
||||
#define SR_EVT_WAKE_MASK 0x00001F00
|
||||
|
||||
|
||||
|
||||
extern void rr_set_reset_reason(volatile struct reset_registers* reset_regs, uint32_t reason);
|
||||
extern bool rr_is_reset_reason_valid(volatile const struct reset_registers* reset_regs);
|
||||
|
||||
extern void rr_set_start_reason(volatile struct reset_registers* reset_regs, uint32_t event);
|
||||
extern bool rr_is_start_reason_valid(volatile const struct reset_registers* reset_regs);
|
||||
extern void rr_start_reason_to_str(uint32_t events, char* buffer, size_t bufsize);
|
||||
|
||||
|
||||
#endif /* RESET_REASON_H */
|
||||
|
|
@ -1330,10 +1330,10 @@ end: ;
|
|||
static void ft_comio_gpios(void *blob)
|
||||
{
|
||||
/* gpio0_7: COM/IO relay output */
|
||||
ft_set_gpio_name(blob, "gpio0", 7, "COMIO_OUT0");
|
||||
ft_set_gpio_name(blob, "/ocp/gpio@44e07000", 7, "COMIO_OUT0");
|
||||
|
||||
/* gpio1_8: COM/IO digital input */
|
||||
ft_set_gpio_name(blob, "gpio1", 8, "COMIO_IN0");
|
||||
ft_set_gpio_name(blob, "/ocp/gpio@4804c000", 8, "COMIO_IN0");
|
||||
}
|
||||
|
||||
static void ft_shields(void* blob)
|
||||
|
|
@ -1345,13 +1345,15 @@ static void ft_shields(void* blob)
|
|||
case SHIELD_COM_IO:
|
||||
ft_comio_gpios(blob);
|
||||
ft_enable_node(blob, "/netbox_dio_comio");
|
||||
ft_enable_node(blob, "serial0");
|
||||
/* TODO: Should use alias serial0 */
|
||||
ft_enable_node(blob, "/ocp/serial@44e09000");
|
||||
break;
|
||||
|
||||
case SHIELD_DUALCAN:
|
||||
case SHIELD_DUALCAN_PASSIVE:
|
||||
ft_enable_node(blob, "d-can0");
|
||||
ft_enable_node(blob, "d-can1");
|
||||
/* TODO: Should use alias d_can0, d_can1 */
|
||||
ft_enable_node(blob, "/ocp/can@481cc000");
|
||||
ft_enable_node(blob, "/ocp/can@481d0000");
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -1242,10 +1242,10 @@ end: ;
|
|||
static void ft_comio_gpios(void *blob)
|
||||
{
|
||||
/* gpio0_7: COM/IO relay output */
|
||||
ft_set_gpio_name(blob, "gpio0", 7, "COMIO_OUT0");
|
||||
ft_set_gpio_name(blob, "/ocp/gpio@44e07000", 7, "COMIO_OUT0");
|
||||
|
||||
/* gpio1_8: COM/IO digital input */
|
||||
ft_set_gpio_name(blob, "gpio1", 8, "COMIO_IN0");
|
||||
ft_set_gpio_name(blob, "/ocp/gpio@4804c000", 8, "COMIO_IN0");
|
||||
}
|
||||
|
||||
static void ft_shields(void* blob)
|
||||
|
|
@ -1257,13 +1257,15 @@ static void ft_shields(void* blob)
|
|||
case SHIELD_COM_IO:
|
||||
ft_comio_gpios(blob);
|
||||
ft_enable_node(blob, "/netbox_dio_comio");
|
||||
ft_enable_node(blob, "serial0");
|
||||
/* TODO: Should use alias serial0 */
|
||||
ft_enable_node(blob, "/ocp/serial@44e09000");
|
||||
break;
|
||||
|
||||
case SHIELD_DUALCAN:
|
||||
case SHIELD_DUALCAN_PASSIVE:
|
||||
ft_enable_node(blob, "d-can0");
|
||||
ft_enable_node(blob, "d-can1");
|
||||
/* TODO: Should use alias d_can0, d_can1 */
|
||||
ft_enable_node(blob, "/ocp/can@481cc000");
|
||||
ft_enable_node(blob, "/ocp/can@481d0000");
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
@ -1271,7 +1273,7 @@ static void ft_shields(void* blob)
|
|||
* Enable uart1 (ttyS0) always as kernel needs it as fallback console,
|
||||
* if (ttyS1) is not available as console.
|
||||
*/
|
||||
ft_enable_node(blob, "serial0");
|
||||
ft_enable_node(blob, "/ocp/serial@44e09000");
|
||||
break;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,49 +0,0 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_TARGET_AM335X_HW25=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x82000000
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_AUTOBOOT_KEYED=y
|
||||
CONFIG_AUTOBOOT_PROMPT="Press s to abort autoboot in %d seconds\n"
|
||||
CONFIG_AUTOBOOT_STOP_STR="s"
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
CONFIG_CMD_ASKENV=y
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_FS_GENERIC=y
|
||||
CONFIG_DFU_TFTP=y
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_MUSB_HOST=y
|
||||
CONFIG_USB_MUSB_GADGET=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
|
||||
CONFIG_G_DNL_VENDOR_NUM=0x0451
|
||||
CONFIG_G_DNL_PRODUCT_NUM=0xd022
|
||||
CONFIG_OF_LIBFDT=y
|
||||
# CONFIG_BOOTP_PXE_CLIENTARCH is not set
|
||||
# CONFIG_CMD_PXE is not set
|
||||
# CONFIG_CMD_BOOTEFI is not set
|
||||
# CONFIG_CMD_XIMG is not set
|
||||
# CONFIG_CMD_ELF is not set
|
||||
# CONFIG_FPGA is not set
|
||||
# CONFIG_CMD_FPGA is not set
|
||||
# CONFIG_CMD_PMIC is not set
|
||||
# CONFIG_EFI_LOADER is not set
|
||||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
|
|
@ -738,7 +738,7 @@ U_BOOT_I2C_ADAP_COMPLETE(omap24_1, omap24_i2c_init, omap24_i2c_probe,
|
|||
#endif
|
||||
|
||||
U_BOOT_I2C_ADAP_COMPLETE(omap24_2, omap24_i2c_init, omap24_i2c_probe,
|
||||
omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed,
|
||||
omap24_i2c_read, omap24_i2c_write, NULL,
|
||||
CONFIG_SYS_OMAP24_I2C_SPEED2,
|
||||
CONFIG_SYS_OMAP24_I2C_SLAVE2,
|
||||
2)
|
||||
|
|
@ -751,7 +751,7 @@ U_BOOT_I2C_ADAP_COMPLETE(omap24_2, omap24_i2c_init, omap24_i2c_probe,
|
|||
#endif
|
||||
|
||||
U_BOOT_I2C_ADAP_COMPLETE(omap24_3, omap24_i2c_init, omap24_i2c_probe,
|
||||
omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed,
|
||||
omap24_i2c_read, omap24_i2c_write, NULL,
|
||||
CONFIG_SYS_OMAP24_I2C_SPEED3,
|
||||
CONFIG_SYS_OMAP24_I2C_SLAVE3,
|
||||
3)
|
||||
|
|
@ -764,7 +764,7 @@ U_BOOT_I2C_ADAP_COMPLETE(omap24_3, omap24_i2c_init, omap24_i2c_probe,
|
|||
#endif
|
||||
|
||||
U_BOOT_I2C_ADAP_COMPLETE(omap24_4, omap24_i2c_init, omap24_i2c_probe,
|
||||
omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed,
|
||||
omap24_i2c_read, omap24_i2c_write, NULL,
|
||||
CONFIG_SYS_OMAP24_I2C_SPEED4,
|
||||
CONFIG_SYS_OMAP24_I2C_SLAVE4,
|
||||
4)
|
||||
|
|
|
|||
|
|
@ -1,320 +0,0 @@
|
|||
/*
|
||||
* am335x_hw25.h
|
||||
*
|
||||
* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
|
||||
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation version 2.
|
||||
*
|
||||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
||||
* kind, whether express or implied; without even the implied warranty
|
||||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_AM335X_HW25_H
|
||||
#define __CONFIG_AM335X_HW25_H
|
||||
|
||||
#include <configs/ti_am335x_common.h>
|
||||
|
||||
/* Disable U-Boot load from filesystems, to save around 10 kB SPL image size */
|
||||
#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
|
||||
# undef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
|
||||
#endif
|
||||
|
||||
#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
|
||||
|
||||
#undef CONFIG_HW_WATCHDOG
|
||||
#undef CONFIG_OMPAP_WATCHDOG
|
||||
#undef CONFIG_SPL_WATCHDOG_SUPPORT
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
# define CONFIG_TIMESTAMP
|
||||
# define CONFIG_LZO
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_BOOTM_LEN (16 << 20)
|
||||
|
||||
#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
|
||||
#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
|
||||
#define CONFIG_BOARD_LATE_INIT
|
||||
|
||||
/* TODO: It could be preconsole buffer is not properly working in SPL
|
||||
* Observed lock ups when printing too much text.
|
||||
#define CONFIG_PRE_CONSOLE_BUFFER
|
||||
#define CONFIG_PRE_CON_BUF_ADDR 0x80000000
|
||||
#define CONFIG_PRE_CON_BUF_SZ 64*1024
|
||||
*/
|
||||
|
||||
/* Clock Defines */
|
||||
#define V_OSCK 0 /* 0 means detect from sysboot1 config */
|
||||
#define V_SCLK (V_OSCK)
|
||||
|
||||
#include <config_distro_bootcmd.h>
|
||||
|
||||
/* Dynamic override for PHY_ANEG_TIMEOUT value */
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
# ifndef __ASSEMBLER__
|
||||
int eth_phy_timeout(void);
|
||||
# endif
|
||||
#endif
|
||||
#define PHY_ANEG_TIMEOUT eth_phy_timeout()
|
||||
#define PHY_ANEG_DEFAULT_TIMEOUT 5000
|
||||
|
||||
#define CONFIG_ARP_TIMEOUT 200
|
||||
#undef CONFIG_NET_RETRY_COUNT
|
||||
#define CONFIG_NET_RETRY_COUNT 5
|
||||
#define CONFIG_BOOTP_MAY_FAIL
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
|
||||
/*
|
||||
* Memory map for booting Linux
|
||||
*
|
||||
* 0x80000000 32MB KERNEL_ADDR (kernel_addr), kernel execution address
|
||||
* 0x82000000 190MB KERNEL_ADDR_R (kernel_addr_r), FIT image/kernel loading address
|
||||
* kernel will be relocated kernel_addr
|
||||
* for FIT images, ramdisc and dtb will be relocated to
|
||||
* top of bootmemory (0x8e000000 downwards)
|
||||
* 0x8BE00000 1MB FDT_ADDR_R (fdt_addr_r), device tree if separate from kernel/FIT
|
||||
* 0x8BF00000 1MB PXE_ADDR (pxefile_addr_r), pxe configuration file (pxe get command)
|
||||
* 0x8C000000 32MB LOAD_ADDR (load_addr), loading address for generic files
|
||||
* <end of boot memory>
|
||||
* 0x8E000000 4B NRSW reset reason
|
||||
* 32MB <>, Free space
|
||||
* 0x90000000 256MB <>, Free space, 512MB systems
|
||||
* 0xA0000000 512MB <>, Free space, 1GB systems only
|
||||
* 0xC0000000 End of RAM
|
||||
*/
|
||||
|
||||
#define KERNEL_ADDR "0x80000000"
|
||||
#define KERNEL_ADDR_R "0x82000000"
|
||||
#define FDT_ADDR_R "0x8BE00000"
|
||||
#define PXE_ADDR "0x8BF00000"
|
||||
#define LOAD_ADDR "0x8C000000"
|
||||
|
||||
/*
|
||||
* Limit boot memory to 256 MBytes to comply with kernel initial memory layout
|
||||
* This is the official way to restrict image load addresses.
|
||||
* Don't use xx_high_addr variables.
|
||||
*/
|
||||
#define BOOTM_SIZE "0x0E000000"
|
||||
|
||||
/* Set boot command depending of software environment */
|
||||
#ifndef CONFIG_NRSW_BUILD
|
||||
/* Yocto/OSTree boot command */
|
||||
#define MAIN_BOOTCMD "run boot_ostree"
|
||||
#else
|
||||
/* NRSW boot command */
|
||||
#define MAIN_BOOTCMD "run sdboot"
|
||||
#endif
|
||||
|
||||
/* TODO: Might need to check ti_cpsw.rx_packet_max when running on top of AM335x switch */
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
/* Memory Adresses */ \
|
||||
"fdt_addr_r=" FDT_ADDR_R "\0" \
|
||||
"kernel_addr=" KERNEL_ADDR "\0" /* NRSW only */ \
|
||||
"kernel_addr_r=" KERNEL_ADDR_R "\0" \
|
||||
"load_addr=" LOAD_ADDR "\0" \
|
||||
"pxefile_addr_r=" PXE_ADDR "\0" \
|
||||
"bootm_size=" BOOTM_SIZE "\0" \
|
||||
\
|
||||
/* Misc */ \
|
||||
"defaultconsole=ttyS0\0" \
|
||||
"fdt_skip_update=yes\0" \
|
||||
"bootdelay=0\0" \
|
||||
\
|
||||
/* Networking */ \
|
||||
"ethprime=cpsw\0" \
|
||||
"ethopts=ti_cpsw.rx_packet_max=1526\0" \
|
||||
"ipaddr=192.168.1.1\0" \
|
||||
"serverip=192.168.1.254\0" \
|
||||
"tftptimeout=2000\0" \
|
||||
"tftptimeoutcountmax=5\0" \
|
||||
"bootpretryperiod=10000\0" \
|
||||
"autoload=false\0" \
|
||||
\
|
||||
/* OSTree boot */ \
|
||||
"bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; " \
|
||||
"setenv bootargs_prev $bootargs; " \
|
||||
"env import -t $load_addr $filesize; setenv bootargs $bootargs_prev $bootargs root=/dev/ram0 console=$defaultconsole,115200 " \
|
||||
"$ethopts rw ostree_root=/dev/mmcblk1p1\0" \
|
||||
"bootcmd_rd_in_mmc=ext4load mmc 1:1 $kernel_addr_r /boot$kernel_image; " \
|
||||
"bootm $kernel_addr_r\0" \
|
||||
"boot_ostree=run bootcmd_otenv; run bootcmd_rd_in_mmc\0" \
|
||||
\
|
||||
/* NRSW boot */ \
|
||||
"root_part=1\0" /* from NRSW, required here? set from board.c */ \
|
||||
"kernel_image=kernel.bin\0" \
|
||||
"fdt_image=am335x-hw25-prod1.dtb\0" \
|
||||
"add_sd_bootargs=setenv bootargs $bootargs root=/dev/${mmc_dev}p$root_part rootfstype=ext4 " \
|
||||
"console=$defaultconsole,115200 rootwait loglevel=4 ti_cpsw.rx_packet_max=1526\0" \
|
||||
"add_version_bootargs=setenv bootargs $bootargs\0" \
|
||||
"sdbringup=echo Try bringup boot && ext4load mmc 1:$root_part $kernel_addr /boot/zImage && " \
|
||||
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs rw;\0" \
|
||||
"sdprod=ext4load mmc 1:$root_part $kernel_addr /boot/$kernel_image && " \
|
||||
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs ro;\0" \
|
||||
"sdboot=env set fdt_addr " FDT_ADDR_R "; "\
|
||||
"if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
|
||||
"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
|
||||
"else run sdbringup; fi; " \
|
||||
/* For v4.19 kernel $mmc_dev should be "mmcblk1" (read from DT), for v3.18 kernel: "mmcblk0" */ \
|
||||
"fdt addr $fdt_addr;if fdt get value mmc_dev /nm_env nm,mmc-dev;then;else setenv mmc_dev mmcblk0;fi;" \
|
||||
"run add_sd_bootargs; run add_version_bootargs; " \
|
||||
"bootz $kernel_addr - $fdt_addr; fi\0" \
|
||||
\
|
||||
/* Boot command */ \
|
||||
"bootcmd=" MAIN_BOOTCMD "\0" \
|
||||
\
|
||||
/* Recovery boot (same for OSTree and NRSW) */ \
|
||||
"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" \
|
||||
/* setenv ipaddr and serverip is necessary, because dhclient destroys the IPs internally */ \
|
||||
"pxe_recovery=mdio up $ethprime && dhcp && pxe get && pxe boot\0" \
|
||||
"tftp_recovery=tftpboot $kernel_addr_r recovery-image; tftpboot $fdt_addr_r recovery-dtb; " \
|
||||
"setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 " \
|
||||
"debug $ethopts; " \
|
||||
"bootz $kernel_addr_r - $fdt_addr_r\0" /* kernel_addr_r */
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
/* TODO: Check if ok for NRSW? */
|
||||
#define CONFIG_ZERO_BOOTDELAY_CHECK
|
||||
|
||||
/* UART Configuration */
|
||||
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0: XModem Boot, Debug UART */
|
||||
|
||||
/* TODO: Preparation in case UART5 shall be used later */
|
||||
#if 0
|
||||
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1: Unused, see note below */
|
||||
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2: Unused, see note below */
|
||||
/* NOTE: NS16550 definitions are cumulative, need to set COM2 to have COM3 */
|
||||
#define CONFIG_SYS_NS16550_COM4 0x481A6000 /* UART3: - */
|
||||
#define CONFIG_SYS_NS16550_COM5 0x481A8000 /* UART4: - */
|
||||
#define CONFIG_SYS_NS16550_COM6 0x481AA000 /* UART5: User UART */
|
||||
#endif
|
||||
|
||||
#define CONFIG_I2C
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
|
||||
#define CONFIG_CMD_EEPROM
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
|
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 50 /* TODO: Can this be reduced to 20ms */
|
||||
|
||||
/* Put Environment in eMMC */
|
||||
#define CONFIG_ENV_OFFSET (512 * 128) /* @ 512*256 SPL starts */
|
||||
#define CONFIG_ENV_SIZE (4 * 1024)
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 1
|
||||
|
||||
#undef CONFIG_SPL_ENV_SUPPORT
|
||||
#undef CONFIG_SPL_NAND_SUPPORT
|
||||
#undef CONFIG_SPL_ONENAND_SUPPORT
|
||||
|
||||
/* We need to disable SPI to not confuse the eeprom env driver */
|
||||
#undef CONFIG_SPI
|
||||
#undef CONFIG_SPI_BOOT
|
||||
#undef CONFIG_SPL_OS_BOOT
|
||||
|
||||
#define CONFIG_SPL_YMODEM_SUPPORT
|
||||
|
||||
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
|
||||
|
||||
#define CONFIG_SUPPORT_EMMC_BOOT
|
||||
|
||||
/*
|
||||
* USB configuration. We enable MUSB support, both for host and for
|
||||
* gadget. We set USB0 as peripheral and USB1 as host, based on the
|
||||
* board schematic and physical port wired to each. Then for host we
|
||||
* add mass storage support and for gadget we add both RNDIS ethernet
|
||||
* and DFU.
|
||||
*/
|
||||
#define CONFIG_USB_MUSB_DSPS
|
||||
#define CONFIG_ARCH_MISC_INIT
|
||||
#define CONFIG_USB_MUSB_PIO_ONLY
|
||||
#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
|
||||
#define CONFIG_AM335X_USB0
|
||||
#define CONFIG_AM335X_USB0_MODE MUSB_HOST
|
||||
|
||||
/* To support eMMC booting */
|
||||
#define CONFIG_STORAGE_EMMC
|
||||
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
|
||||
|
||||
#ifdef CONFIG_USB_MUSB_HOST
|
||||
#define CONFIG_USB_STORAGE
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_MUSB_GADGET
|
||||
/* Removing USB gadget and can be enabled adter adding support usb DM */
|
||||
#ifndef CONFIG_DM_ETH
|
||||
#define CONFIG_USB_ETHER
|
||||
#define CONFIG_USB_ETH_RNDIS
|
||||
#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
|
||||
#endif /* CONFIG_DM_ETH */
|
||||
#endif /* CONFIG_USB_MUSB_GADGET */
|
||||
|
||||
|
||||
/*
|
||||
* Disable MMC DM for SPL build and can be re-enabled after adding
|
||||
* DM support in SPL
|
||||
*/
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#undef CONFIG_DM_MMC
|
||||
#undef CONFIG_TIMER
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPL_BUILD)
|
||||
/* Remove other SPL modes. */
|
||||
#undef CONFIG_SPL_NAND_SUPPORT
|
||||
#define CONFIG_ENV_IS_NOWHERE
|
||||
#undef CONFIG_PARTITION_UUIDS
|
||||
#undef CONFIG_EFI_PARTITION
|
||||
#endif
|
||||
|
||||
/* Network. */
|
||||
#define CONFIG_IP_DEFRAG /* so we can use large tftp blocks */
|
||||
#define CONFIG_TFTP_TSIZE /* tftp transfer size, progress bar */
|
||||
|
||||
#define CONFIG_PHYLIB
|
||||
#define CONFIG_PHY_SMSC
|
||||
|
||||
#define CONFIG_CMD_MEMTEST
|
||||
#define CONFIG_SYS_MEMTEST_START 0x84000000
|
||||
#define CONFIG_SYS_MEMTEST_END 0x87900000
|
||||
|
||||
|
||||
#ifdef CONFIG_NRSW_BUILD
|
||||
/* support for NM packed bootloader */
|
||||
#define CONFIG_NM_BOOTLOADER_FORMAT
|
||||
|
||||
/* password protected login */
|
||||
#define CONFIG_CRYPT
|
||||
#define CONFIG_NM_LOGIN
|
||||
#define CONFIG_NM_LOGIN_PART "1:3" /* TODO: Define location of file for OSTree/Yocto */
|
||||
#define CONFIG_NM_LOGIN_PASSWD "/root/boot/bootpass"
|
||||
#endif
|
||||
|
||||
#define CONFIG_CMD_PXE
|
||||
|
||||
#define CONFIG_OF_BOARD_SETUP
|
||||
|
||||
#define CONFIG_JTAG_MARKER_SPL 0x402FFF00
|
||||
#define CONFIG_JTAG_MARKER_UBOOT 0x807FFF00
|
||||
|
||||
/* NRSW PMIC Reset Reason */
|
||||
#define RESET_REASON_SHM_LOCATION 0x8e000000
|
||||
|
||||
|
||||
/* SPL command is not needed */
|
||||
#undef CONFIG_CMD_SPL
|
||||
|
||||
/* Never enable ISO it is broken and can lead to a crash */
|
||||
#undef CONFIG_ISO_PARTITION
|
||||
|
||||
#endif /* ! __CONFIG_AM335X_HW25_H */
|
||||
|
|
@ -298,8 +298,11 @@ int eth_phy_timeout(void);
|
|||
#define CONFIG_JTAG_MARKER_SPL 0x402FFF00
|
||||
#define CONFIG_JTAG_MARKER_UBOOT 0x807FFF00
|
||||
|
||||
/* Reset and Start Reason */
|
||||
/* NRSW PMIC Reset Reason */
|
||||
#ifdef CONFIG_NRSW_BUILD
|
||||
#define RESET_REASON_SHM_LOCATION 0x8e000000
|
||||
#define EXTERNAL_WATCHDOG_PATTERN 0x781f9ce2
|
||||
#endif
|
||||
|
||||
|
||||
/* SPL command is not needed */
|
||||
|
|
|
|||
Loading…
Reference in New Issue