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31 Commits

Author SHA1 Message Date
Viacheslav Volkov fa2a05545e FIX: [uboot] DUAL CAN termination GPIO numbers
BugzId: 54033
2019-05-24 07:40:26 +02:00
Viacheslav Volkov 2eaee7bf0c FIX: [uboot] uart0 pinctrl for GNSS CAN shield on NB800
BugzId: 54033
2019-05-23 14:22:41 +02:00
Viacheslav Volkov b29105b37c FIX: [uboot] make fdt get value endian-safe on NB800
BugzId: 54033
2019-05-23 14:22:40 +02:00
Viacheslav Volkov 953573d5dd CHG: [uboot] use different boot MMC device for v3.18 and v4.19 kernels on netbird.
BugzId: 56824
2019-05-23 14:22:40 +02:00
Moritz Rosenthal 2d30a14cb2 FIX: [uboot] Change netbird mmc block device from mmcblk0 to mmcblk1
Fix patch file

BugzId: 56050
2019-05-23 14:22:39 +02:00
Moritz Rosenthal 2ec05303ef CHG: [uboot] Change netbird mmc block device from mmcblk0 to mmcblk1
BugzId: 56050
2019-05-23 14:22:38 +02:00
Marcel Reichmuth c02a80a048 ADD: [uboot16] support for gnsscan shield
BugzID: 54934
2019-05-23 14:22:37 +02:00
Marcel Reichmuth 1c281a330d ADD: [netbird] virtual console device
BugzID: 54143
2019-05-23 14:22:37 +02:00
Marcel Reichmuth 23f8829780 FIX: [uboot16] provide correct usage of shield commands
BugzID:49214
2019-05-23 14:22:36 +02:00
Marcel Reichmuth 044eccc3cd CHG: [nrhw16] enable DIOs in dts from uboot
BugzID: 52260
2019-05-23 14:22:35 +02:00
Moritz Rosenthal afc38809b0 FIX: [uboot] Use ttyS0 as default console on devices with COMIO shield
CHG: [uboot] Cleaned up patch dependencies

BugzId: 48404

SVN commit 25535@trunk
2019-05-23 14:22:34 +02:00
Stefan Eichenberger 4f0e0da6e6 FIX: [uboot] comio shield fix rs232 mode
BugzId: 48404

SVN commit 25488@trunk
2019-05-23 14:22:33 +02:00
Stefan Eichenberger 97d92b3e5f FIX: [uboot] Fix SPL boot from UART
BugzId: 48405

SVN commit 25482@trunk
2019-05-23 14:22:33 +02:00
Stefan Eichenberger d8fd5953c0 FIX: [uboot] fix defaultconsole if comio shield is available
BugzId: 48404

SVN commit 25481@trunk
2019-05-23 14:22:32 +02:00
Stefan Eichenberger d6a24f1fe4 FIX: [uboot] fix error handling for nbhw16 shields
BugzId: 46700

SVN commit 25029@trunk
2019-05-23 14:22:32 +02:00
Stefan Eichenberger f702243ee9 FIX: [uboot] change findings from rs regarding shield
SVN commit 24938@trunk
2019-05-23 14:22:31 +02:00
Stefan Eichenberger 1e663e39f5 ADD: [uboot] add shield configuration command in u-boot
BugzID: 45968

SVN commit 24524@trunk
2019-05-23 14:22:30 +02:00
Stefan Eichenberger 796ec0e5c6 FIX: [uboot] correct reset button indication on nbhw16 (factory reset)
BugzId: 45121

SVN commit 23936@trunk
2019-05-23 14:22:29 +02:00
Stefan Eichenberger d2ddce7774 ADD: [uboot] enable pxe boot on nbhw16_v2
SVN commit 23847@trunk
2019-05-23 14:22:27 +02:00
Stefan Eichenberger c6da2089ea CHG: [kernel] use new devicetree/descriptor format on netbird only
SVN commit 23561@trunk
2019-05-23 14:22:27 +02:00
Stefan Eichenberger 5ee94ef1fe ADD: [uboot] add support for NBHW16_V2 (alias NB800)
SVN commit 23165@trunk
2019-05-23 14:22:26 +02:00
Stefan Eichenberger 4215c82104 FIX: [uboot] remove unwanted debug code
SVN commit 23164@trunk
2019-05-23 14:22:26 +02:00
Stefan Eichenberger 1854f8f9c1 FIX: [uboot] correct lineendings from dos to unix
SVN commit 23163@trunk
2019-05-23 14:22:25 +02:00
Stefan Eichenberger 2834c66d03 FIX: [uboot] configure unused sysboot pins
Requested from RS, unused sysboot pins should be configured with a pull down and the receiver should
be disabled. This guarantees that we don't have a negative effects.

SVN commit 21613@trunk
2019-05-23 14:22:24 +02:00
Stefan Eichenberger 94f8a7e4af FIX: [uboot] Fix RAM timings, dynamic clk detection
Fix the RAM timings for 512MB, the old timings were for 256MB only, the new ones should work for
both sizes.
Detect the Oszillator clock based on the sysboot1 settings, this is necessary because old Prototypes
(series 1) have a 24 MHz clock and the new ones have a 25 MHz clock.

SVN commit 21612@trunk
2019-05-23 14:22:24 +02:00
Marcel Reichmuth eabfa4196e ADD: [uboot] added hwreset command for NBHW16
SVN commit 21549@trunk
2019-05-23 14:22:23 +02:00
Marcel Reichmuth fc4ddf1cc3 ADD: [nbhw16] added password check to uboot
SVN commit 21494@trunk
2019-05-23 14:22:23 +02:00
Marcel Reichmuth db569ab76c ADD: [nbhw16] print spl & u-boot versions during startup
SVN commit 21203@trunk
2019-05-23 14:22:22 +02:00
Marcel Reichmuth 82c6e10cd0 ADD: [swupdate] uboot update support for nbhw16
SVN commit 21191@trunk
2019-05-23 14:22:21 +02:00
Marcel Reichmuth a567de29a2 ADD: [uboot] failsafe update for nbhw16
SVN commit 21152@trunk
2019-05-23 14:22:21 +02:00
Marcel Reichmuth 2b008b656a ADD: [nbhw16] added uboot build support to openwrt
SVN commit 21053@trunk
2019-05-23 14:22:20 +02:00
106 changed files with 485 additions and 14819 deletions

View File

@ -390,38 +390,6 @@ config TARGET_AM335X_NETBIRD_V2
select DM_SERIAL
select DM_GPIO
config TARGET_AM335X_NRHW20
bool "Support am335x_nrhw20"
select CPU_V7
select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
config TARGET_AM335X_NMHW21
bool "Support am335x_nmhw21"
select CPU_V7
select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
config TARGET_AM335X_NRHW24
bool "Support am335x_nrhw24"
select CPU_V7
select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
config TARGET_AM335X_HW25
bool "Support am335x_hw25"
select CPU_V7
select SUPPORT_SPL
select DM
select DM_SERIAL
select DM_GPIO
config TARGET_AM335X_SL50
bool "Support am335x_sl50"
select CPU_V7
@ -920,10 +888,6 @@ source "board/isee/igep0033/Kconfig"
source "board/mpl/vcma9/Kconfig"
source "board/nm/netbird/Kconfig"
source "board/nm/netbird_v2/Kconfig"
source "board/nm/nrhw20/Kconfig"
source "board/nm/nmhw21/Kconfig"
source "board/nm/nrhw24/Kconfig"
source "board/nm/hw25/Kconfig"
source "board/olimex/mx23_olinuxino/Kconfig"
source "board/phytec/pcm051/Kconfig"
source "board/phytec/pcm052/Kconfig"

View File

@ -170,8 +170,6 @@ void enable_basic_clocks(void)
&cmper->usb0clkctrl,
&cmper->emiffwclkctrl,
&cmper->emifclkctrl,
&cmper->i2c2clkctrl,
&cmper->spi1clkctrl,
0
};

View File

@ -47,7 +47,6 @@
#define BOOT_DEVICE_UART 0x41
#define BOOT_DEVICE_USBETH 0x44
#define BOOT_DEVICE_CPGMAC 0x46
#define BOOT_DEVICE_JTAG 0x58
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2

View File

@ -1053,10 +1053,9 @@ bd_bool_t BD_GetPartition64( const BD_Context* pCtx, bd_uint16_t tag,
bd_bool_t rc = BD_FALSE; /* assume error */
/* Argument check */
if (pCtx == 0) {
return BD_FALSE;
}
if ( (pResult == 0)
if ( (pCtx == 0)
|| (pResult == 0)
|| !pCtx->initialized
|| (index >= pCtx->entries)
)
@ -2098,4 +2097,3 @@ void BD_UnitTest(void)
#endif /* BD_CONF_UNIT_TESTS */
/*--- eof -------------------------------------------------------------------*/

View File

@ -30,8 +30,6 @@
* Fixed wrong sizeof type in GetPartition()
* Changed 64 bit type to "long long" from struct
* Added BD_VerifySha1Hmac() function
* 20200615 rs Added BD_Hw_Type tag
*
*****************************************************************************/
/**
@ -160,34 +158,21 @@ typedef enum _BD_Tags
BD_Hmac_Sha1_4 = 31, /**< "Hash" -> SHA1 HMAC with 4 byte result */
BD_Fpga_Info = 32, /**< "UInt32" -> FPGA type/location (0xTTPPRRRR TT=FPGA type, PP=Population location, RRRR=Reserved allways 0000) */
BD_BOM_Patch = 33, /**< "UInt8" -> Hardware BOM patch of the equipment (BOM changes, same PCB, not SW relevant) */
BD_Prod_Variant_Name = 34, /**< "String" -> Product variant */
BD_Hw_Type = 35, /*<< "UInt16" -> Hardware Type, e.g. 24 for HW24, 26 for HW26 */
BD_Ui_Adapter_Type = 4096, /**< "UInt16" -> IV OG2 UI adapterboard type (0 = not present) */
BD_Voltage = 4098, /**< "UInt8" -> Primary Voltage (1=12-60V, 2=40-160V, 3=24-60V, 4=?, 5=12-24V) */
BD_Pd_Module0 = 4100, /**< "String" -> */
BD_Pd_Module0 = 4100,
BD_Pd_Module1 = 4101,
BD_Pd_Module2 = 4102,
BD_Pd_Module3 = 4103,
BD_Pd_Module4 = 4104,
BD_Pd_Module5 = 4105,
BD_Pd_Phy0 = 4110, /**< "String" -> */
BD_Pd_Phy1 = 4111, /**< "String" -> */
BD_Pd_DIO = 4120, /**< "String" -> */
BD_Pd_Serial = 4121, /**< "String" -> */
BD_Pd_Sim = 4122, /**< "String" -> */
BD_Pd_Led = 4123, /**< "String" -> */
BD_Pd_UsbHost = 4124, /**< "String" -> */
BD_Pd_Sim = 4122,
PD_Dev_Tree = 4125, /**< "String" -> Devicetree file name */
BD_Patch = 4126, /**< "UInt8" -> Board patch level (after production) */
BD_Pd_Phy2 = 4127, /**< "String" -> */
PD_SerDes = 4128, /**< "UInt16" -> SERDES Configuration (e.g. NB1800) */
PD_Shield = 4129, /**< "UInt16" -> Assembled Shield (0=COM/IO, 1=DualCAN), 2=CAN/GNSS, 3=DualCAN Passive */
PD_SerDes = 4128, /**< "Uint16" -> SERDES Configuration (e.g. NB1800) */
PD_Shield = 4129, /**< "String" -> Shield Population (e.g. CAN/RS485) for NB800 */
/* project specific tags */
BD_BootPart = 32768, /**< "UInt8" */
BD_BootPart = 32768, /**< "UInt8" */
BD_None_Type = 65535, /**< "Void" -> None */
}

View File

@ -1,14 +1,14 @@
/******************************************************************************
* (c) COPYRIGHT 2010-2019 by NetModule AG, Switzerland.
* (c) COPYRIGHT 2010 by NetModule AG, Switzerland. All rights reserved.
*
* The program(s) may only be used and/or copied with the written permission
* from NetModule AG or in accordance with the terms and conditions stipulated
* in the agreement contract under which the program(s) have been supplied.
*
* PACKAGE : NetModule Common Hardware Abstraction
* PACKAGE : NetBox HW08
*
* ABSTRACT:
* Board descriptor library
* Implements functions for settings
*
* HISTORY:
* Date Author Description
@ -16,132 +16,20 @@
* 20100903 rs reading carrier board descriptor from EEPROM at 54.
* code cleanup (tabs/indentation)
* 20110211 rs partition table handling
* 20190330 rs cleanup after years of chaotic development
* 20200615 rs added bd_get_hw_type()
*
*****************************************************************************/
#include <common.h>
#include <i2c.h>
#include <malloc.h>
#include "board_descriptor.h" /* own header file */
#include "bdparser.h" /* tlv parser */
#define MAX_PARTITION_ENTRIES 4
#define MAX_PARTITION_ENTRIES 4
static const BD_Context *bdctx_list; /* The board descriptor context */
static size_t bdctx_count = 0;
static const BD_Context *bdctx_list;
static size_t bdctx_count = 0;
static bd_bool_t _get_string(bd_uint16_t tag, bd_uint_t index, char* pResult, bd_size_t bufLen)
{
int i;
for (i = 0; i < bdctx_count; i++) {
if (BD_GetString(&bdctx_list[i], tag, index, pResult, bufLen)) {
return BD_TRUE;
}
}
return BD_FALSE;
}
static bd_bool_t _get_mac(bd_uint16_t tag, bd_uint_t index, bd_uint8_t pResult[6])
{
int i;
for (i = 0; i < bdctx_count; i++) {
if (BD_GetMAC(&bdctx_list[i], tag, index, pResult)) {
return BD_TRUE;
}
}
return BD_FALSE;
}
static bd_bool_t _get_uint8(bd_uint16_t tag, bd_uint_t index, bd_uint8_t* pResult)
{
int i;
for (i = 0; i < bdctx_count; i++) {
if (BD_GetUInt8(&bdctx_list[i], tag, index, pResult)) {
return BD_TRUE;
}
}
return BD_FALSE;
}
static bd_bool_t _get_uint16(bd_uint16_t tag, bd_uint_t index, bd_uint16_t* pResult)
{
int i;
for (i = 0; i < bdctx_count; i++) {
if (BD_GetUInt16(&bdctx_list[i], tag, index, pResult)) {
return BD_TRUE;
}
}
return BD_FALSE;
}
static bd_bool_t _get_uint32(bd_uint16_t tag, bd_uint_t index, bd_uint32_t* pResult)
{
int i;
for (i = 0; i < bdctx_count; i++) {
if (BD_GetUInt32(&bdctx_list[i], tag, index, pResult)) {
return BD_TRUE;
}
}
return BD_FALSE;
}
static bd_bool_t _get_partition64(bd_uint16_t tag, bd_uint_t index, BD_PartitionEntry64 *pResult)
{
int i;
for (i = 0; i < bdctx_count; i++) {
if (BD_GetPartition64(&bdctx_list[i], tag, index, pResult)) {
return BD_TRUE;
}
}
return BD_FALSE;
}
static uint8_t _try_partition_read(void)
{
BD_PartitionEntry64 partition;
int i;
int rc;
int partition_count = 0;
int boot_partition = 0;
for (i = 0; i < MAX_PARTITION_ENTRIES; i++)
{
rc = _get_partition64(BD_Partition64, i, &partition);
if (rc) {
partition_count++;
if (((partition.flags & BD_Partition_Flags_Active) != 0) &&
(i > 0)) {
boot_partition = i;
}
}
}
if (partition_count < 1) {
printf("ERROR: Too few partitions defined, taking default 0\n");
}
return boot_partition;
}
void bd_register_context_list(const BD_Context *list, size_t count)
{
void bd_register_context_list(const BD_Context *list, size_t count) {
bdctx_list = list;
bdctx_count = count;
}
@ -151,7 +39,6 @@ int bd_get_context(BD_Context *bdctx, uint32_t i2caddress, uint32_t offset)
bd_bool_t rc;
uint8_t bdHeader[8];
void* pBdData = NULL;
/* Read header bytes from beginning of EEPROM */
if (i2c_read( i2caddress, offset, 2, bdHeader, BD_HEADER_LENGTH )) {
debug("%s() Can't read BD header from EEPROM\n", __func__);
@ -190,7 +77,8 @@ int bd_get_context(BD_Context *bdctx, uint32_t i2caddress, uint32_t offset)
return 0;
exit1:
if (pBdData != NULL) {
if (pBdData != NULL)
{
free(pBdData);
pBdData = NULL;
}
@ -198,6 +86,78 @@ exit1:
return -1;
}
static bd_bool_t _get_string(bd_uint16_t tag, bd_uint_t index, char* pResult, bd_size_t bufLen ) {
int i;
for (i = 0; i < bdctx_count; i++) {
if (BD_GetString(&bdctx_list[i], tag, index, pResult, bufLen)) {
return BD_TRUE;
}
}
return BD_FALSE;
}
static bd_bool_t _get_mac( bd_uint16_t tag, bd_uint_t index, bd_uint8_t pResult[6] ) {
int i;
for (i = 0; i < bdctx_count; i++) {
if (BD_GetMAC(&bdctx_list[i], tag, index, pResult)) {
return BD_TRUE;
}
}
return BD_FALSE;
}
static bd_bool_t _get_uint8( bd_uint16_t tag, bd_uint_t index, bd_uint8_t* pResult ) {
int i;
for (i = 0; i < bdctx_count; i++) {
if (BD_GetUInt8(&bdctx_list[i], tag, index, pResult)) {
return BD_TRUE;
}
}
return BD_FALSE;
}
static bd_bool_t _get_uint16( bd_uint16_t tag, bd_uint_t index, bd_uint16_t* pResult ) {
int i;
for (i = 0; i < bdctx_count; i++) {
if (BD_GetUInt16(&bdctx_list[i], tag, index, pResult)) {
return BD_TRUE;
}
}
return BD_FALSE;
}
static bd_bool_t _get_uint32( bd_uint16_t tag, bd_uint_t index, bd_uint32_t* pResult ) {
int i;
for (i = 0; i < bdctx_count; i++) {
if (BD_GetUInt32(&bdctx_list[i], tag, index, pResult)) {
return BD_TRUE;
}
}
return BD_FALSE;
}
static bd_bool_t _get_partition64( bd_uint16_t tag, bd_uint_t index, BD_PartitionEntry64 *pResult) {
int i;
for (i = 0; i < bdctx_count; i++) {
if (BD_GetPartition64(&bdctx_list[i], tag, index, pResult)) {
return BD_TRUE;
}
}
return BD_FALSE;
}
int bd_get_prodname(char *prodname, size_t len)
{
if ( !_get_string( BD_Prod_Name, 0, prodname, len) ) {
@ -208,30 +168,10 @@ int bd_get_prodname(char *prodname, size_t len)
return 0;
}
int bd_get_variantname(char *variantname, size_t len)
{
if ( !_get_string( BD_Prod_Variant_Name, 0, variantname, len) ) {
debug("%s() Variant name not found\n", __func__);
return -1;
}
return 0;
}
void bd_get_hw_type(int* type)
{
uint16_t hwtype = 0;
if ( !_get_uint16( BD_Hw_Type, 0, &hwtype) )
debug("%s() no Hw Type found\n", __func__);
*type = hwtype;
}
void bd_get_hw_version(int* ver, int* rev)
{
uint8_t hwver = 0;
uint8_t hwrev = 0;
static uint8_t hwver;
static uint8_t hwrev;
if ( !_get_uint8( BD_Hw_Ver, 0, &hwver) )
debug("%s() no Hw Version found\n", __func__);
@ -243,19 +183,9 @@ void bd_get_hw_version(int* ver, int* rev)
*rev = hwrev;
}
void bd_get_hw_patch(int* patch)
{
uint8_t hwpatch = 0;
if ( !_get_uint8( BD_BOM_Patch, 0, &hwpatch) )
debug("%s() no Hw Patch found\n", __func__);
*patch = hwpatch;
}
int bd_get_mac(int index, uint8_t *macaddr, size_t len)
{
if ( len != 6 ) {
if (len != 6) {
debug("macaddr size must be 6 (is %d)", len);
return -1;
}
@ -269,37 +199,17 @@ int bd_get_mac(int index, uint8_t *macaddr, size_t len)
return 0;
}
uint32_t bd_get_fpgainfo(void)
u32 bd_get_fpgainfo(void)
{
uint32_t fpgainfo = 0xFFFFFFFF;
if ( !_get_uint32( BD_Fpga_Info, 0, &fpgainfo) )
debug("%s() no FGPA Info found\n", __func__);
debug("%s() no Fpga Info found\n", __func__);
return fpgainfo;
}
int bd_get_pd_dio(char *config, size_t len)
{
if ( !_get_string(BD_Pd_DIO, 0, config, len) ) {
debug("%s() no DIO info\n", __func__);
return -1;
}
return 0;
}
int bd_get_pd_serial(char *config, size_t len)
{
if ( !_get_string(BD_Pd_Serial, 0, config, len) ) {
debug("%s() no serial port info\n", __func__);
return -1;
}
return 0;
}
int bd_get_pd_module(uint32_t slot, char *config, size_t len)
int bd_get_pd_module(int slot, char *config, size_t len)
{
if ( !_get_string(BD_Pd_Module0 + slot, 0, config, len) ) {
debug("%s() could not read module configuration on slot %d\n",
@ -313,7 +223,7 @@ int bd_get_pd_module(uint32_t slot, char *config, size_t len)
int bd_get_sim_config(char* simconfig, size_t len)
{
if (!_get_string(BD_Pd_Sim, 0, simconfig, len)) {
debug("%s() no valid SIM config found\n", __func__);
debug("%s() No valid SIM Config found\n", __func__);
return -1;
}
@ -323,14 +233,14 @@ int bd_get_sim_config(char* simconfig, size_t len)
int bd_get_devicetree(char* devicetreename, size_t len)
{
if (!_get_string(PD_Dev_Tree, 0, devicetreename, len)) {
debug("%s() no valid devicetree name found\n", __func__);
debug("%s() No valid Devicetree name found\n", __func__);
return -1;
}
return 0;
}
int bd_get_shield(uint32_t shieldnr)
int bd_get_shield(int shieldnr)
{
bd_uint16_t shield = 0;
@ -342,17 +252,46 @@ int bd_get_shield(uint32_t shieldnr)
return shield;
}
uint8_t bd_get_boot_partition(void)
static u8 try_partition_read(void)
{
uint8_t boot_part;
BD_PartitionEntry64 partition;
int i;
int rc;
int partition_count = 0;
int boot_partition = 0;
/* If we have a Bootpartition entry take this as boot part */
if (_get_uint8( BD_BootPart, 0, &boot_part) ) {
for (i = 0; i < MAX_PARTITION_ENTRIES; i++)
{
rc = _get_partition64(BD_Partition64, i, &partition);
if (rc) {
partition_count++;
if (((partition.flags & BD_Partition_Flags_Active) != 0) &&
(i > 0)) {
boot_partition = i;
}
}
}
if (partition_count < 1)
{
printf("ERROR: Too few partitions defined, taking default 0\n");
}
return boot_partition;
}
int bd_get_boot_partition(void)
{
u8 boot_part;
/* If we have a new Bootpartition entry take this as boot part */
if ( _get_uint8( BD_BootPart, 0, &boot_part) ) {
if (boot_part >= 0 && boot_part <= 1) {
return boot_part;
}
}
/* If we don't have a Bootpartition entry, perhaps we have a partition table */
return _try_partition_read();
/* If we not have a Bootpartition entry, perhaps we have a partition table */
return try_partition_read();
}

View File

@ -1,7 +1,7 @@
/*
* Board descriptor library
* Library to support early TI EVM EEPROM handling
*
* (c) COPYRIGHT 2010-2019 by NetModule AG, Switzerland.
* Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
@ -9,25 +9,14 @@
#ifndef __BOARD_DESCRIPTOR_H
#define __BOARD_DESCRIPTOR_H
#include "bdparser.h" /* BD_Context */
void bd_register_context_list(const BD_Context *list, size_t count);
int bd_get_context(BD_Context *bdctx, uint32_t i2caddress, uint32_t offset);
int bd_get_prodname(char *prodname, size_t len);
int bd_get_variantname(char *variantname, size_t len);
void bd_get_hw_type(int* type);
void bd_get_hw_version(int* ver, int* rev);
void bd_get_hw_patch(int* patch);
int bd_get_mac(int index, uint8_t *macaddr, size_t len);
uint32_t bd_get_fpgainfo(void);
int bd_get_pd_dio(char *config, size_t len);
int bd_get_pd_serial(char *config, size_t len);
int bd_get_pd_module(uint32_t slot, char *config, size_t len);
int bd_get_sim_config(char* simconfig, size_t len);
int bd_read(int bus_addr, int dev_addr);
u8 bd_get_boot_partition(void);
int bd_get_mac(uint index, u8 *mac_address, u32 len);
int bd_get_hw_version(int* pVer, int* pRev);
int bd_get_devicetree(char* devicetreename, size_t len);
int bd_get_shield(uint32_t shieldnr);
uint8_t bd_get_boot_partition(void);
int bd_get_context(BD_Context *bdctx, uint32_t i2caddress, uint32_t offset);
void bd_register_context_list(const BD_Context *list, size_t count);
u8 bd_get_boot_partition(void);
int bd_get_shield(int shieldnr);
#endif /* __BOARD_DESCRIPTOR_H */

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/*
* da9063.c
*
* Dialog DA9063 PMIC
*
* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <errno.h>
#include <i2c.h>
#include "da9063.h"
static int da9063_i2c_bus = 0;
static int bus_claimed = 0;
static int switch_i2c_bus(void)
{
int old_bus;
old_bus = i2c_get_bus_num();
if (old_bus != da9063_i2c_bus) {
i2c_set_bus_num(da9063_i2c_bus);
}
bus_claimed++;
return old_bus;
}
static void revert_i2c_bus(int bus)
{
if (da9063_i2c_bus != bus) {
i2c_set_bus_num(bus);
}
bus_claimed--;
}
void da9063_init(int i2c_bus)
{
da9063_i2c_bus = i2c_bus;
}
int da9063_claim_i2c_bus(void)
{
return switch_i2c_bus();
}
void da9063_release_i2c_bus(int bus)
{
revert_i2c_bus(bus);
}
int da9063_get_reg(uint32_t reg, uint8_t* val)
{
int ret;
uint8_t temp;
/* Argument check */
if ((reg >= 0x200) || (val==0)) {
return -1;
}
/* State check. Has bus been claimed */
if (bus_claimed == 0) {
return -2;
}
*val = 0;
if (reg < 0x100) {
ret = i2c_read(CONFIG_PMIC_I2C_ADDR+0, reg & 0xFF, 1, &temp, 1);
} else {
ret = i2c_read(CONFIG_PMIC_I2C_ADDR+1, reg & 0xFF, 1, &temp, 1);
}
if (ret == 0)
*val = temp;
return ret;
}
int da9063_set_reg(uint32_t reg, uint8_t val)
{
int ret;
/* Argument check */
if (reg >= 0x200) {
return -1;
}
/* State check. Has bus been claimed */
if (bus_claimed == 0) {
return -2;
}
if (reg < 0x100) {
ret = i2c_write(CONFIG_PMIC_I2C_ADDR+0, reg & 0xFF, 1, &val, 1);
} else {
ret = i2c_write(CONFIG_PMIC_I2C_ADDR+1, reg & 0xFF, 1, &val, 1);
}
if (ret != 0)
puts("da9063 write error\n");
return ret;
}
void da9063_set_gpio(unsigned bit, int state)
{
int pmic_reg;
int ret;
uint8_t bitmask;
uint8_t reg = 0x00;
if (bit <= 7) {
pmic_reg = PMIC_REG_GPIO_MODE0_7;
bitmask = 1U << (bit-0);
}
else {
pmic_reg = PMIC_REG_GPIO_MODE8_15;
bitmask = 1U << (bit-8);
}
ret = da9063_get_reg(pmic_reg, &reg);
if (ret == 0) {
if (state) reg |= bitmask;
else reg &= ~bitmask;
(void)da9063_set_reg(pmic_reg, reg);
}
}

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@ -1,103 +0,0 @@
/*
* da9063.c
*
* Dialog DA9063 PMIC
*
* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef DA9063_H
#define DA9063_H
#define CONFIG_PMIC_I2C_BUS 0
#define CONFIG_PMIC_I2C_ADDR 0x58 /* Pages 0 and 1, Pages 2 and 3 -> 0x59 */
#define PMIC_REG_STATUS_A 0x01 /* Status of ON_KEY, WAKE, COMP1V2, DVC */
#define PMIC_REG_STATUS_A_COMP1V2_MASK 0x08
#define PMIC_REG_FAULT_LOG 0x05 /* PMIC fault log register, holding reset reason */
#define PMIC_FAULT_TWD_ERROR_MASK 0x01 /* Watchdog timeout detected */
#define PMIC_FAULT_POR_MASK 0x02 /* Startup from No-Power/RTC/Delivery mode */
#define PMIC_REG_EVENT_A 0x06
#define PMIC_REG_EVENT_ONKEY_MASK 0x01
#define PMIC_REG_EVENT_RTC_ALARM_MASK 0x02
#define PMIC_REG_EVENT_RTC_TICK_MASK 0x04
#define PMIC_REG_EVENT_EVENTS_B_MASK 0x20
#define PMIC_REG_EVENT_B 0x07
#define PMIC_REG_EVENT_COMP1V2_MASK 0x04
#define PMIC_REG_IRQ_MASK_A 0x0A
#define PMIC_REG_IRQ_MASK_B 0x0B
#define PMIC_REG_IRQ_MASK_C 0x0C
#define PMIC_REG_IRQ_MASK_D 0x0D
#define PMIC_REG_CONTROL_A 0x0E /* Control register for power states */
#define PMIC_REG_CONTROL_D 0x11 /* Control register for blink/watchdog */
#define PMIC_REG_GPIO14_15 0x1C /* Configuration of GPIO14/15 (mode, wake) */
#define PMIC_REG_GPIO_MODE0_7 0x1D /* Control register for GPIOs 0..7 */
#define PMIC_REG_GPIO_MODE8_15 0x1E /* Control register for GPIOs 8..15 */
#define PMIC_REG_BCORE1_CONT 0x21 /* Control register of BCORE1 */
#define PMIC_REG_BCORE2_CONT 0x20 /* Control register of BCORE2 */
#define PMIC_REG_BPERI_CONT 0x25 /* Control register of BPERI */
#define PMIC_REG_BIO_CONT 0x24 /* Control register of BIO */
#define PMIC_REG_BMEM_CONT 0x23 /* Control register of BMEM */
#define PMIC_REG_LDO3_CONT 0x28 /* Control register of LDO3 */
#define PMIC_REG_LDO6_CONT 0x2B /* Control register of LDO6 */
#define PMIC_REG_LDO7_CONT 0x2C /* Control register of LDO7 */
#define PMIC_REG_LDO11_CONT 0x30 /* Control register of LDO11 */
#define PMIC_LDOx_EN_MASK 0x01
#define PMIC_LDOx_CONF_MASK 0x80
#define PMIC_REG_ID_4_3 0x84
#define PMIC_REG_ID_6_5 0x85
#define PMIC_REG_BUCK_ILIM_A 0x9A
#define PMIC_REG_BUCK_ILIM_B 0x9B
#define PMIC_REG_BUCK_ILIM_C 0x9C
#define PMIC_REG_BCORE1_CONF 0x9E /* Configuration register of BCORE1 */
#define PMIC_REG_BCORE2_CONF 0x9D /* Configuration register of BCORE2 */
#define PMIC_REG_BPERI_CONF 0xA2 /* Configuration register of BPERI */
#define PMIC_REG_BIO_CONF 0xA0 /* Configuration register of BIO */
#define PMIC_REG_BMEM_CONF 0xA1 /* Configuration register of BMEM */
#define PMIC_CONF_MODE_MASK 0xC0
#define PMIC_CONF_MODE_SLEEP 0x40
#define PMIC_CONF_MODE_SYNC 0x80
#define PMIC_CONF_MODE_AUTO 0xC0
#define PMIC_REG_BBAT_CONT 0xC5 /* Control register for backup battery */
#define PMIC_REG_CONFIG_E 0x10A
#define PMIC_REG_CONFIG_G 0x10C
#define PMIC_REG_CONFIG_L 0x111
#define PMIC_REG_TRIM_CLDR 0x120 /* Calendar Trim register, 2's complement, 1.9ppm per bit */
#define PMIC_GP_ID_0 0x121 /* General purpose ID 0 (R/W) */
#define PMIC_GP_ID_1 0x122 /* General purpose ID 1 (R/W) */
#define PMIC_REG_CONFIG_ID 0x184 /* OTP Config ID <ver.rev> */
extern void da9063_init(int i2c_bus);
extern int da9063_claim_i2c_bus(void);
extern void da9063_release_i2c_bus(int bus);
extern int da9063_get_reg(uint32_t reg, uint8_t* val);
extern int da9063_set_reg(uint32_t reg, uint8_t val);
extern void da9063_set_gpio(unsigned bit, int state);
#endif /* DA9063_H */

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@ -1,36 +0,0 @@
/*
* ether_crc.c
*
* Ethernet CRC computation
*
* Copyright (C) 2018-2020 NetModule AG - http://www.netmodule.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include "ether_crc.h"
uint32_t ether_crc(size_t len, uint8_t const *p)
{
uint32_t crc;
unsigned i;
crc = ~0;
while (len--) {
crc ^= *p++;
for (i = 0; i < 8; i++)
crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
}
/* an reverse the bits, cuz of way they arrive -- last-first */
crc = (crc >> 16) | (crc << 16);
crc = (crc >> 8 & 0x00ff00ff) | (crc << 8 & 0xff00ff00);
crc = (crc >> 4 & 0x0f0f0f0f) | (crc << 4 & 0xf0f0f0f0);
crc = (crc >> 2 & 0x33333333) | (crc << 2 & 0xcccccccc);
crc = (crc >> 1 & 0x55555555) | (crc << 1 & 0xaaaaaaaa);
return crc;
}

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/*
* ether_crc.h
*
* Ethernet CRC computation
*
* Copyright (C) 2018-2020 NetModule AG - http://www.netmodule.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef ETHER_CRC_H
#define ETHER_CRC_H
extern uint32_t ether_crc(size_t len, uint8_t const *p);
#endif /* ETHER_CRC_H */

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@ -1,26 +0,0 @@
if TARGET_AM335X_HW25
config SYS_BOARD
default "hw25"
config SYS_VENDOR
default "nm"
config SYS_SOC
default "am33xx"
config SYS_CONFIG_NAME
default "am335x_hw25"
config CONS_INDEX
int "UART used for console"
range 1 6
default 1
help
The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
in documentation, etc) available to it. Depending on your specific
board you may want something other than UART0 as for example the IDK
uses UART3 so enter 4 here.
endif

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@ -1,13 +0,0 @@
#
# Makefile
#
# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
#
# SPDX-License-Identifier: GPL-2.0+
#
ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o ../common/ether_crc.o fileaccess.o

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/*
* board.h
*
* TI AM335x boards information header
*
* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* We have three pin mux functions that must exist. We must be able to enable
* uart0, for initial output and i2c2 to read the main EEPROM. We then have a
* main pinmux function that can be overridden to enable all other pinmux that
* is required on the board.
*/
void enable_uart0_pin_mux(void);
void enable_board_pin_mux(void);
#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
#endif

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#include <common.h>
#include <fs.h>
#define BLOCK_DEVICE "mmc"
#define OVERLAY_PART "1:3"
int read_file(const char* filename, char *buf, int size)
{
loff_t filesize = 0;
loff_t len;
int ret;
if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
puts("Error, can not set blk device\n");
return -1;
}
/* Read at most file size bytes */
if (fs_size(filename, &filesize)) {
return -1;
}
if (filesize < size)
size = filesize;
/* For very unclear reasons the block device needs to be set again after the call to fs_size() */
if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
puts("Error, can not set blk device\n");
return -1;
}
if ((ret = fs_read(filename, (ulong)buf, 0, size, &len))) {
printf("Can't read file %s (size %d, len %lld, ret %d)\n", filename, size, len, ret);
return -1;
}
buf[len] = 0;
return len;
}

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/**@file /home/eichenberger/projects/nbhw16/u-boot/board/nm/netbird_v2/fileaccess.h
* @author eichenberger
* @version 704
* @date
* Created: Tue 06 Jun 2017 02:02:33 PM CEST \n
* Last Update: Tue 06 Jun 2017 02:02:33 PM CEST
*/
#ifndef FILEACCESS_H
#define FILEACCESS_H
void fs_set_console(void);
int read_file(const char* filename, char *buf, int size);
#endif // FILEACCESS_H

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/*
* mux.c
*
* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
#include <asm/io.h>
#include "board.h"
static struct module_pin_mux gpio_pin_mux[] = {
/*
* CPU GPIOs
*
* (J18) GPIO0_16: RST_PHY~
* (U10) GPIO0_22: SEL_RS232/RS485~
* (T10) GPIO0_23: EN_RS485_TERM~
* (T11) GPIO0_26: IO_OUT1
* (U12) GPIO0_27: IO_OUT2
*
* (T12) GPIO1_12: IO_IN0
* (T13) GPIO1_13: IO_IN1
* (T14) GPIO1_14: IO_IN2
* (T15) GPIO1_15: IO_IN3
*
* (T13) GPIO2_0: RST_SDCARD~
* (L17) GPIO2_18: GSM_PWR_EN
* (L16) GPIO2_19: RST_GSM
*
* (K18) GPIO3_9: WLAN_IRQ
* (L18) GPIO3_10: WLAN_EN
* (C12) GPIO3_17: SIM_SEL
*/
/* Bank 0 */
{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gpio0[16] */ /* RST_PHY~ */
{OFFSET(gpmc_ad8), (MODE(7) | PULLUDDIS)}, /* (U10) gpio0[22] */ /* SEL_RS232/RS485~ */
{OFFSET(gpmc_ad9), (MODE(7) | PULLUDDIS)}, /* (T10) gpio0[23] */ /* EN_RS485_TERM~ */
{OFFSET(gpmc_ad10), (MODE(7) | PULLUDDIS)}, /* (T11) gpio0[26] */ /* IO_OUT1 */
{OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)}, /* (U12) gpio0[27] */ /* IO_OUT2 */
/* Bank 1 */
{OFFSET(gpmc_ad12), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (T12) gpio1[12] */ /* IO_IN0 */
{OFFSET(gpmc_ad13), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (R12) gpio1[13] */ /* IO_IN1 */
{OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (V13) gpio1[14] */ /* IO_IN2 */
{OFFSET(gpmc_ad15), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (U13) gpio1[15] */ /* IO_IN3 */
/* TODO: What about all the unused GPMC pins ? */
/* Bank 2 */
{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)}, /* (T13) gpio2[0] */ /* RST_SDCARD~ */
{OFFSET(mii1_rxd3), (MODE(7) | PULLUDDIS)}, /* (L17) gpio2[18] */ /* GSM_PWR_EN */
{OFFSET(mii1_rxd2), (MODE(7) | PULLUDDIS)}, /* (L16) gpio2[19] */ /* RST_GSM */
#if 0
/* TODO: What is this meant for? */
{OFFSET(lcd_data3), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (R4) gpio2[9] */ /* SYSBOOT_3 */
{OFFSET(lcd_data4), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (T1) gpio2[10] */ /* SYSBOOT_4 */
/* TODO: Check other unued pins from sysboot block */
/* Ensure PU/PD does not work against external signal */
/*
* SYSBOOT 0,1,5,12,13 = Low
* SYSBOOT 2 = High
*/
#endif
/* Bank 3 */
{OFFSET(mii1_txclk), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (K18) gpio3[9] */ /* WLAN_IRQ */
{OFFSET(mii1_rxclk), (MODE(7) | PULLUDDIS)}, /* (L18) gpio3[10] */ /* WLAN_EN */
{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (C12) gpio3[17] */ /* SIM_SEL */
{-1}
};
/* I2C0 PMIC */
static struct module_pin_mux i2c0_pin_mux[] = {
{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (C17) I2C0_SDA */
{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (C16) I2C0_SCL */
{-1}
};
/* I2C2 System */
static struct module_pin_mux i2c2_pin_mux[] = {
{OFFSET(uart1_rtsn), (MODE(3) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (D17) I2C2_SCL */
{OFFSET(uart1_ctsn), (MODE(3) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (D18) I2C2_SDA */
{-1},
};
/* RMII1: Ethernet */
static struct module_pin_mux rmii1_pin_mux[] = {
/* RMII */
{OFFSET(mii1_crs), MODE(1) | PULLUDDIS | RXACTIVE}, /* (H17) rmii1_crs */
{OFFSET(mii1_rxerr), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE}, /* (J15) gpio (rxerr) */
{OFFSET(mii1_rxd0), MODE(1) | PULLUDDIS | RXACTIVE}, /* (M16) rmii1_rxd0 */
{OFFSET(mii1_rxd1), MODE(1) | PULLUDDIS | RXACTIVE}, /* (L15) rmii1_rxd1 */
{OFFSET(mii1_txen), MODE(1) | PULLUDDIS}, /* (J16) rmii1_txen */
{OFFSET(mii1_txd0), MODE(1) | PULLUDDIS}, /* (K17) rmii1_txd0 */
{OFFSET(mii1_txd1), MODE(1) | PULLUDDIS}, /* (K16) rmii1_txd1 */
{OFFSET(rmii1_refclk), MODE(0) | PULLUDDIS | RXACTIVE}, /* (H18) rmii1_refclk */
/* SMI */
{OFFSET(mdio_clk), MODE(0) | PULLUDDIS}, /* (M18) mdio_clk */
{OFFSET(mdio_data), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE}, /* (M17) mdio_data */
/* 25MHz Clock Output */
{OFFSET(xdma_event_intr0), MODE(3)}, /* (A15) clkout1 (25 MHz clk for PHY) */
{-1}
};
/* RMII2: Ethernet */
static struct module_pin_mux rmii2_pin_mux[] = {
/* RMII */
{OFFSET(gpmc_a9), MODE(3) | PULLUDDIS | RXACTIVE}, /* (U16) rmii2_crs */
{OFFSET(gpmc_wpn), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE}, /* (U17) gpio (rxerr) */
{OFFSET(gpmc_a11), MODE(3) | PULLUDDIS | RXACTIVE}, /* (V17) rmii2_rxd0 */
{OFFSET(gpmc_a10), MODE(3) | PULLUDDIS | RXACTIVE}, /* (T16) rmii2_rxd1 */
{OFFSET(gpmc_a0), MODE(3) | PULLUDDIS}, /* (R13) rmii2_txen */
{OFFSET(gpmc_a5), MODE(3) | PULLUDDIS}, /* (V15) rmii2_txd0 */
{OFFSET(gpmc_a4), MODE(3) | PULLUDDIS}, /* (R14) rmii2_txd1 */
{OFFSET(mii1_col), MODE(1) | PULLUDDIS | RXACTIVE}, /* (H16) rmii2_refclk */
{-1},
};
/* MMC0: WiFi */
static struct module_pin_mux mmc0_sdio_pin_mux[] = {
{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G17) MMC0_CLK */
{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G18) MMC0_CMD */
{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G16) MMC0_DAT0 */
{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G15) MMC0_DAT1 */
{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (F18) MMC0_DAT2 */
{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (F17) MMC0_DAT3 */
{-1}
};
/* MMC1: eMMC */
static struct module_pin_mux mmc1_emmc_pin_mux[] = {
{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U9) MMC1_CLK */
{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V9) MMC1_CMD */
{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U7) MMC1_DAT0 */
{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V7) MMC1_DAT1 */
{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R8) MMC1_DAT2 */
{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T8) MMC1_DAT3 */
{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U8) MMC1_DAT4 */
{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V8) MMC1_DAT5 */
{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R9) MMC1_DAT6 */
{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T9) MMC1_DAT7 */
{-1}
};
/* USB_DRVBUS not used -> configure as GPIO */
static struct module_pin_mux usb_pin_mux[] = {
{OFFSET(usb0_drvvbus), (MODE(7) | PULLUDDIS)}, /* (F16) USB0_DRVVBUS */
{OFFSET(usb1_drvvbus), (MODE(7) | PULLUDDIS)}, /* (F15) USB1_DRVVBUS */
{-1}
};
/* UART0: User (Debug/Console) */
static struct module_pin_mux uart0_pin_mux[] = {
{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (E15) UART0_RXD */
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (E16) UART0_TXD */
{-1},
};
/* UART5: RS232/RS485 */
/* CTS is unused - set to GPIO mode */
static struct module_pin_mux uart5_pin_mux[] = {
{OFFSET(lcd_data9), (MODE(4) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U2) UART5_RXD */
{OFFSET(lcd_data8), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (U1) UART5_TXD */
{OFFSET(lcd_data14), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (V4) uart5_ctsn */
{OFFSET(lcd_data15), (MODE(6) | PULLUDEN | PULLUP_EN)}, /* (T5) uart5_rtsn */
{-1}
};
static struct module_pin_mux unused_pin_mux[] = {
/* SYSBOOT6, 7, 10, 11: Not used pulldown active, receiver disabled */
{OFFSET(lcd_data6), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
{OFFSET(lcd_data7), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
{OFFSET(lcd_data10), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
{OFFSET(lcd_data11), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
/* TODO: GPMCA1..3, A6..8 */
{-1}
};
void enable_board_pin_mux(void)
{
configure_module_pin_mux(gpio_pin_mux);
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(rmii2_pin_mux);
configure_module_pin_mux(mmc0_sdio_pin_mux);
configure_module_pin_mux(mmc1_emmc_pin_mux);
configure_module_pin_mux(usb_pin_mux);
configure_module_pin_mux(i2c0_pin_mux);
configure_module_pin_mux(i2c2_pin_mux);
configure_module_pin_mux(uart5_pin_mux);
configure_module_pin_mux(unused_pin_mux);
}
void enable_uart0_pin_mux(void)
{
configure_module_pin_mux(uart0_pin_mux);
}

View File

@ -1,158 +0,0 @@
/*
* Copyright (c) 2004-2008 Texas Instruments
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
*(.__image_copy_start)
*(.vectors)
CPUDIR/start.o (.text*)
board/nm/hw25/built-in.o (.text*)
*(.text*)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : {
*(.data*)
}
. = ALIGN(4);
. = .;
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
. = ALIGN(4);
.__efi_runtime_start : {
*(.__efi_runtime_start)
}
.efi_runtime : {
*(efi_runtime_text)
*(efi_runtime_data)
}
.__efi_runtime_stop : {
*(.__efi_runtime_stop)
}
.efi_runtime_rel_start :
{
*(.__efi_runtime_rel_start)
}
.efi_runtime_rel : {
*(.relefi_runtime_text)
*(.relefi_runtime_data)
}
.efi_runtime_rel_stop :
{
*(.__efi_runtime_rel_stop)
}
. = ALIGN(4);
.image_copy_end :
{
*(.__image_copy_end)
}
.rel_dyn_start :
{
*(.__rel_dyn_start)
}
.rel.dyn : {
*(.rel*)
}
.rel_dyn_end :
{
*(.__rel_dyn_end)
}
.hash : { *(.hash*) }
.end :
{
*(.__end)
}
_image_binary_end = .;
/*
* Deprecated: this MMU section is used by pxa at present but
* should not be used by new boards/CPUs.
*/
. = ALIGN(4096);
.mmutable : {
*(.mmutable)
}
/*
* Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
* __bss_base and __bss_limit are for linker only (overlay ordering)
*/
.bss_start __rel_dyn_start (OVERLAY) : {
KEEP(*(.__bss_start));
__bss_base = .;
}
.bss __bss_base (OVERLAY) : {
*(.bss*)
. = ALIGN(4);
__bss_limit = .;
}
.bss_end __bss_limit (OVERLAY) : {
KEEP(*(.__bss_end));
}
.dynsym _image_binary_end : { *(.dynsym) }
.dynbss : { *(.dynbss) }
.dynstr : { *(.dynstr*) }
.dynamic : { *(.dynamic*) }
.gnu.hash : { *(.gnu.hash) }
.plt : { *(.plt*) }
.interp : { *(.interp*) }
.gnu : { *(.gnu*) }
.ARM.exidx : { *(.ARM.exidx*) }
}

View File

@ -37,6 +37,7 @@
#include "../common/bdparser.h"
#include "../common/board_descriptor.h"
#include "board.h"
#include <console.h>
DECLARE_GLOBAL_DATA_PTR;
@ -320,6 +321,31 @@ int check_reset_button(void)
return 0;
}
#ifdef CONFIG_CMD_NB_TEST
/*
* Perform a hardware reset test. The complete test loops until
* interrupted by ctrl-c or by pressed the RESET button.
*/
int do_hwreset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
u32 gpio_cpu_value = 0x00000000;
printf(" Press RESET button in hardware reset the board.\n");
while (gpio_cpu_value == 0) {
gpio_cpu_value = (gpio_get_value(NETBIRD_GPIO_RESET_BUTTON) == 0) ? 1 : 0;
printf("RESET_BTN = %d\n",gpio_cpu_value);
if (ctrlc()) {
putc ('\n');
return 1;
}
udelay(20*1000);
}
return 1;
}
#endif /* CONFIG_CMD_NB_TEST */
/*
* Basic board specific setup. Pinmux has been handled already.
*/
@ -339,8 +365,7 @@ int board_init(void)
REQUEST_AND_SET_GPIO(NETBIRD_GPIO_PWR_GSM);
mdelay(1200);
gpio_set_value(NETBIRD_GPIO_PWR_GSM, 0);
/* Enable debug LED to troubleshoot hw problems */
REQUEST_AND_SET_GPIO(NETBIRD_GPIO_LED_A);
REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_LED_A);
REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_LED_B);
REQUEST_AND_SET_GPIO(NETBIRD_GPIO_RST_PHY_N);
REQUEST_AND_CLEAR_GPIO(NETBIRD_GPIO_WLAN_EN);

View File

@ -10,4 +10,4 @@ ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o shield.o shield_can.o shield_comio.o fileaccess.o
obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o shield.o shield_can.o shield_comio.o shield_gnsscan.o fileaccess.o

View File

@ -40,6 +40,7 @@
#include "shield.h"
#include "shield_can.h"
#include "shield_comio.h"
#include "shield_gnsscan.h"
#include "fileaccess.h"
DECLARE_GLOBAL_DATA_PTR;
@ -80,6 +81,9 @@ static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
static BD_Context bdctx[3]; /* The descriptor context */
#define SHIELD_COM_IO 0
#define SHIELD_DUALCAN 1
#define SHIELD_GNSSCAN 2
static int _bd_init(void)
{
@ -491,8 +495,9 @@ static void enable_wlan_clock(void)
void set_console(void)
{
char buf[8];
char *defaultconsole = getenv("defaultconsole");
char buf[20];
int i;
int shield_id = bd_get_shield(0);
if (defaultconsole == 0) {
@ -505,19 +510,22 @@ void set_console(void)
if (shield_id != SHIELD_COM_IO) {
return;
}
/* With comio shield the defaultconsole should be ttyS0 and not ttyS1 */
setenv("defaultconsole", "ttyS0");
/* If consoldev is set take this as productive conosle instead of default console */
if (read_file("/root/boot/consoledev", buf, 5) != 5) {
puts("Invalid file consoledev\n");
return;
}
if (strstr(buf, "tty")==buf) {
buf[5] = 0;
setenv("defaultconsole", buf);
/* If consoledev file is present, take the tty defined in it as console */
if (read_file("/root/boot/consoledev",buf, sizeof(buf)) > 3) {
if (strstr(buf, "tty") == buf) {
buf[sizeof(buf)-1] = 0;
for (i=0; i<sizeof(buf); i++) {
if (buf[i]<=' ') {
buf[i] = 0;
break;
}
}
setenv("defaultconsole", buf);
}
}
}
@ -576,7 +584,9 @@ static struct shield_command known_shield_commands[] = {
"comio",
"shield comio mode rs232",
"fdt get value serial0 /aliases serial0;" \
"fdt set $serial0 status okay",
"fdt get value dio0 /aliases dio0;" \
"fdt set $serial0 status okay;" \
"fdt set $dio0 status okay;",
comio_shield_init
},
{
@ -590,15 +600,21 @@ static struct shield_command known_shield_commands[] = {
can_shield_init
},
{
SHIELD_DUALCAN_PASSIVE,
"dualcan",
"shield dualcan termination off off",
"fdt get value can0 /aliases d_can0;" \
SHIELD_GNSSCAN,
"gnsscan",
"shield gnsscan termination off",
"fdt get value serial0 /aliases serial0;" \
"fdt get value can1 /aliases d_can1;" \
"fdt set $can0 status okay;" \
"fdt set $can1 status okay;",
can_shield_init
}
"fdt set $serial0 status okay;" \
"fdt set $can1 status okay;" \
/* fix uart0 pinctrl: */ \
"fdt get value dt_path /aliases uart0_pins_gnss_can;" \
"fdt get value dt_phandle $dt_path phandle;" \
"fdt get value dt_path /aliases serial0;" \
"fdt set $dt_path pinctrl-0 <$dt_phandle>;" \
,
gnsscan_shield_init
},
};
static const struct shield_command* get_shield_command(int shield_id)

View File

@ -67,7 +67,8 @@ static int do_shieldmode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv
U_BOOT_CMD(
shield, 6, 1, do_shieldmode,
"Set the shield mode",
"dualcan termination [on|off] [on|off]\n"
"shield comio mode [rs232|rs485] termination [on|off]\n"
"shield dualcan termination on|off on|off\n"
"shield comio mode rs232|rs485 [termination on|off]\n"
"shield gnsscan termination on|off\n"
);

View File

@ -8,11 +8,6 @@
#ifndef SHIELD_H
#define SHIELD_H
#define SHIELD_COM_IO 0
#define SHIELD_DUALCAN 1
#define SHIELD_CAN_GNSS 2
#define SHIELD_DUALCAN_PASSIVE 3
struct shield_t{
char name[64];
int (*setmode)(char * const argv[], int argc);

View File

@ -0,0 +1,143 @@
#undef DEBUG
#include <common.h>
#include <asm/gpio.h>
#include <asm/arch/mux.h>
#include "shield.h"
#include "board.h"
#define NETBIRD_GPIO_RST_SHIELD_N GPIO_TO_PIN(0, 27)
#define NETBIRD_GPIO_EN_CAN_TERM_N GPIO_TO_PIN(0, 7)
static int shield_slot_initialized = 0;
static struct module_pin_mux gnsscan_shield_netbird_pin_mux_final[] = {
/* Leave UART0 unconfigured because we want to configure it as needed by linux (can/spi/uart/etc) */
{OFFSET(uart0_rxd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E15) UART0_RXD */
{OFFSET(uart0_txd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E16) UART0_TXD */
{OFFSET(uart0_ctsn), (MODE(2) | PULLUDEN | PULLUP_EN)}, /* CAN1 tx */
{OFFSET(uart0_rtsn), (MODE(2) | PULLUDDIS | RXACTIVE)}, /* CAN1 rx */
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* EN_CAN1_TERM_N */
{-1},
};
static int request_gpios(void)
{
int ret;
debug("Shield configure gpios\n");
ret = shield_gpio_request_as_input(NETBIRD_GPIO_RST_SHIELD_N, "shield-rst");
if ((ret < 0))
return -1;
ret = shield_gpio_request_as_input(NETBIRD_GPIO_EN_CAN_TERM_N, "shield-can-term-n");
if ((ret < 0))
return -1;
shield_slot_initialized = 1;
return 0;
}
static int configure_shieldmode(int mode)
{
int ret;
if (mode < 0 || mode > 1) {
debug("Invalid shield mode %d\n", mode);
return -1;
}
debug("Shield type gnsscan\n");
debug ("Set shield mode to %d\n", mode);
if (!shield_slot_initialized) {
if (request_gpios()) {
puts("Failed to request gpios\n");
return -1;
}
}
debug("Set final gnsscan shield muxing\n");
configure_module_pin_mux(gnsscan_shield_netbird_pin_mux_final);
debug("Make sure shield module is in reset\n");
ret = gpio_direction_output(NETBIRD_GPIO_RST_SHIELD_N, 0);
if (ret < 0) {
puts("Can not set shield-rst as output\n");
return -1;
}
udelay(10);
debug("Set termination on/off\n");
ret = gpio_direction_output(NETBIRD_GPIO_EN_CAN_TERM_N, mode);
if (ret < 0) {
puts("Can not set shield-can-term as output\n");
return -1;
}
udelay(10);
debug("Take shield out of reset\n");
gpio_set_value(NETBIRD_GPIO_RST_SHIELD_N, 1);
udelay(10);
return 0;
}
static int get_termination(const char* termination)
{
if (strcmp("on", termination) == 0) {
return 1;
}
else if (strcmp("off", termination) == 0) {
return 0;
}
debug ("Invalid termination mode %s (falling back to off)", termination);
return -1;
}
static int get_mode_from_args(char * const argv[], int argc)
{
#define CAN_PORTS 1
int terminations[CAN_PORTS];
int i;
assert(argc == (CAN_PORTS + 1));
if (strcmp ("termination", argv[0])) {
debug("The only option for dualcan is terminations\n");
return -1;
}
for (i = 0; i < CAN_PORTS; i ++) {
terminations[i] = get_termination(argv[i + 1]);
if (terminations[i] < 0) {
return -1;
}
}
/* Termination is inverse */
return (!terminations[0] << 0);
}
static int set_shieldmode(char * const argv[], int argc)
{
if (argc != 2) {
debug("Too few arguments for gnsscan\n");
return -1;
}
return configure_shieldmode(get_mode_from_args(argv, argc));
}
struct shield_t gnsscan_shield = {
"gnsscan", set_shieldmode
};
void gnsscan_shield_init(void)
{
shield_register(&gnsscan_shield);
}

View File

@ -0,0 +1,9 @@
#ifndef SHIELD_GNSSCAN_H
#define SHIELD_GNSSCAN_H
int shield_gnsscan_init(void);
int shield_gnscan_setmode(int mode);
void gnsscan_shield_init(void);
#endif // SHIELD_CAN_H

View File

@ -1,26 +0,0 @@
if TARGET_AM335X_NMHW21
config SYS_BOARD
default "nmhw21"
config SYS_VENDOR
default "nm"
config SYS_SOC
default "am33xx"
config SYS_CONFIG_NAME
default "am335x_nmhw21"
config CONS_INDEX
int "UART used for console"
range 1 6
default 3
help
The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
in documentation, etc) available to it. Depending on your specific
board you may want something other than UART0 as for example the IDK
uses UART3 so enter 4 here.
endif

View File

@ -1,13 +0,0 @@
#
# Makefile
#
# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
#
# SPDX-License-Identifier: GPL-2.0+
#
ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o ../common/ether_crc.o fileaccess.o sja1105.o ui.o um.o reset_reason.o

File diff suppressed because it is too large Load Diff

View File

@ -1,24 +0,0 @@
/*
* board.h
*
* TI AM335x boards information header
*
* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _BOARD_H_
#define _BOARD_H_
void enable_uart0_pin_mux(void);
void enable_uart2_pin_mux(void);
void enable_uart4_pin_mux(void);
void enable_spi1_mux(void);
void enable_led_mux(void);
void enable_led_mux_v32(void);
void enable_board_pin_mux(void);
#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
#endif

View File

@ -1,40 +0,0 @@
#include <common.h>
#include <fs.h>
#define BLOCK_DEVICE "mmc"
#define OVERLAY_PART "1:3"
int read_file(const char* filename, char *buf, int size)
{
loff_t filesize = 0;
loff_t len;
int ret;
if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
puts("Error, can not set blk device\n");
return -1;
}
/* Read at most file size bytes */
if (fs_size(filename, &filesize)) {
return -1;
}
if (filesize < size)
size = filesize;
/* For very unclear reasons the block device needs to be set again after the call to fs_size() */
if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
puts("Error, can not set blk device\n");
return -1;
}
if ((ret = fs_read(filename, (ulong)buf, 0, size, &len))) {
printf("Can't read file %s (size %d, len %lld, ret %d)\n", filename, size, len, ret);
return -1;
}
buf[len] = 0;
return len;
}

View File

@ -1,14 +0,0 @@
/**@file /home/eichenberger/projects/nbhw16/u-boot/board/nm/netbird_v2/fileaccess.h
* @author eichenberger
* @version 704
* @date
* Created: Tue 06 Jun 2017 02:02:33 PM CEST \n
* Last Update: Tue 06 Jun 2017 02:02:33 PM CEST
*/
#ifndef FILEACCESS_H
#define FILEACCESS_H
void fs_set_console(void);
int read_file(const char* filename, char *buf, int size);
#endif // FILEACCESS_H

View File

@ -1,318 +0,0 @@
/*
* mux.c
*
* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
#include <asm/io.h>
#include "board.h"
static struct module_pin_mux gpio_pin_mux[] = {
/*
* (V2) GPIO0_8: RS232_485n_SEL (V3.2)
* (V3) GPIO0_9: RS485_DE (V3.2)
* (J18) GPIO0_16: ETH_SW_RST~ (V2.0)
* (K15) GPIO0_17: CTRL.INT~
* (T10) GPIO0_23: CAN_TERM1~ (V1.0)
*
* (T12) GPIO1_12: SIM_SW
* (V13) GPIO1_14: GNSS_RST~
* (U13) GPIO1_15: CAN_TERM0~ (V1.0)
* (R14) GPIO1_20: BT_EN
* (V15) GPIO1_21: GSM_PWR_EN
* (U16) GPIO1_25: RST_GSM
* (T16) GPIO1_26: WLAN_EN
* (V17) GPIO1_27: WLAN_IRQ
*
* (U3) GPIO2_16: TIMEPULSE (HW26), see note [1]
* (R6) GPIO2_25: RST_ETH~
*
* (J17) GPIO3_4: GNSS_EXTINT
* (K18) GPIO3_9: CTRL.W_DIS
* (L18) GPIO3_10: CTRL.RST
* (C12) GPIO3_17: UI_RST~
* (A14) GPIO3_21: RST_HUB~ (USB)
*
* [1] No PU/PD allowed as TIMEPULSE is internally connected with SAFEBOOT_N.
* SAFEBOOT_N must be left open/floating.
*/
/* Bank 0 */
{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) GPIO0_16: ETH_SW_RST~ (V2.0) */
{OFFSET(mii1_txd2), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (K15) GPIO0_17: CTRL.INT~ */
{OFFSET(gpmc_ad9), (MODE(7) | PULLUDDIS)}, /* (T10) GPIO0_23: CAN_TERM1~ */
/* Bank 1 */
{OFFSET(gpmc_ad12), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (T12) GPIO1_12: SIM_SW */
{OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS)}, /* (V13) GPIO1_14: GNSS_RST~ */
{OFFSET(gpmc_ad15), (MODE(7) | PULLUDDIS)}, /* (U13) GPIO1_15: CAN_TERM0~ */
{OFFSET(gpmc_a4), (MODE(7) | PULLUDDIS)}, /* (R14) gpio1_20: BT_EN */
{OFFSET(gpmc_a5), (MODE(7) | PULLUDDIS)}, /* (V15) gpio1_21: GSM_PWR_EN */
{OFFSET(gpmc_a9), (MODE(7) | PULLUDDIS)}, /* (U16) gpio1_25: RST_GSM */
{OFFSET(gpmc_a10), (MODE(7) | PULLUDDIS)}, /* (T16) gpio1_26: WLAN_EN */
{OFFSET(gpmc_a11), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (V17) gpio1_27: WLAN_IRQ */
/* Bank 2 */
{OFFSET(lcd_data10), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (U3) GPIO2_16: TIMEPULSE */
{OFFSET(lcd_ac_bias_en), (MODE(7) | PULLUDDIS)}, /* (R6) GPIO2_25: RST_ETH~ */
/* Bank 3 */
{OFFSET(mii1_rxdv), (MODE(7) | PULLUDDIS)}, /* (J17) GPIO3_4: GNSS_EXTINT */
{OFFSET(mii1_txclk), (MODE(7) | PULLUDDIS)}, /* (K18) GPIO3_9: CTRL.W_DIS */
{OFFSET(mii1_rxclk), (MODE(7) | PULLUDDIS)}, /* (L18) GPIO3_10: CTRL.RST~ */
{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS)}, /* (C12) GPIO3_17: UI_RST~ */
{OFFSET(mcasp0_ahclkx), (MODE(7) | PULLUDDIS)}, /* (A14) GPIO3_21: RST_HUB~ (USB) */
{-1}
};
static struct module_pin_mux led_pin_mux[] = {
/*
* (T17) GPIO0_30: LED0.GN
* (U15) GPIO1_22: LED1.RD
* (V16) GPIO1_24: LED1.GN
* (U18) GPIO1_28: LED0.RD
*/
{OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS)}, /* (T17) GPIO0_30: LED0.GN */
{OFFSET(gpmc_a6), (MODE(7) | PULLUDDIS)}, /* (U15) GPIO1_22: LED1.RD */
{OFFSET(gpmc_a8), (MODE(7) | PULLUDDIS)}, /* (V16) GPIO1_24: LED1.GN */
{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)}, /* (U18) GPIO1_28: LED0.RD */
{-1}
};
static struct module_pin_mux led_pin_mux_v32[] = {
/*
* (C15) GPIO0_6: MB_LED_PWM
* (U15) GPIO1_22: LED1.RD
* (T15) GPIO1_23: LED0.GN (formerly: (T17) GPIO0_30)
* (V16) GPIO1_24: LED1.GN
* (U18) GPIO1_28: LED0.RD
*/
{OFFSET(spi0_cs1), (MODE(7) | PULLUDDIS)}, /* (C15) GPIO0_6: MB_LED_PWM */
{OFFSET(gpmc_a6), (MODE(7) | PULLUDDIS)}, /* (U15) GPIO1_22: LED1.RD */
{OFFSET(gpmc_a7), (MODE(7) | PULLUDDIS)}, /* (T15) GPIO1_23: LED0.GN */
{OFFSET(gpmc_a8), (MODE(7) | PULLUDDIS)}, /* (V16) GPIO1_24: LED1.GN */
{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)}, /* (U18) GPIO1_28: LED0.RD */
{-1}
};
/* I2C0 PMIC */
static struct module_pin_mux i2c0_pin_mux[] = {
{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (C17) I2C0_SDA */
{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (C16) I2C0_SCL */
{-1}
};
/* I2C1 System */
static struct module_pin_mux i2c1_pin_mux[] = {
{OFFSET(spi0_cs0), (MODE(2) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (A16) i2c_scl */
{OFFSET(spi0_d1), (MODE(2) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (B16) i2c_sda */
{-1}
};
/* RMII1: Ethernet Switch */
static struct module_pin_mux rmii1_pin_mux[] = {
/* RMII */
{OFFSET(mii1_crs), MODE(1) | PULLUDDIS | RXACTIVE}, /* (H17) rmii1_crs */
{OFFSET(mii1_rxerr), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE}, /* (J15) gpio */
{OFFSET(mii1_rxd0), MODE(1) | PULLUDDIS | RXACTIVE}, /* (M16) rmii1_rxd0 */
{OFFSET(mii1_rxd1), MODE(1) | PULLUDDIS | RXACTIVE}, /* (L15) rmii1_rxd1 */
{OFFSET(mii1_txen), MODE(1) | PULLUDDIS}, /* (J16) rmii1_txen */
{OFFSET(mii1_txd0), MODE(1) | PULLUDDIS}, /* (K17) rmii1_txd0 */
{OFFSET(mii1_txd1), MODE(1) | PULLUDDIS}, /* (K16) rmii1_txd1 */
{OFFSET(rmii1_refclk), MODE(0) | PULLUDDIS | RXACTIVE}, /* (H18) rmii1_refclk */
/* SMI */
{OFFSET(mdio_clk), MODE(0) | PULLUDDIS}, /* (M18) mdio_clk */
{OFFSET(mdio_data), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE}, /* (M17) mdio_data */
/* 25MHz Clock Output */
{OFFSET(xdma_event_intr0), MODE(3)}, /* (A15) clkout1 (25 MHz clk for Switch) */
{-1}
};
/* MMC0: WiFi */
static struct module_pin_mux mmc0_sdio_pin_mux[] = {
{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G17) MMC0_CLK */
{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G18) MMC0_CMD */
{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G16) MMC0_DAT0 */
{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G15) MMC0_DAT1 */
{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (F18) MMC0_DAT2 */
{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (F17) MMC0_DAT3 */
{-1}
};
/* MMC1: eMMC */
static struct module_pin_mux mmc1_emmc_pin_mux[] = {
{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U9) MMC1_CLK */
{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V9) MMC1_CMD */
{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U7) MMC1_DAT0 */
{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V7) MMC1_DAT1 */
{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R8) MMC1_DAT2 */
{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T8) MMC1_DAT3 */
{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U8) MMC1_DAT4 */
{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V8) MMC1_DAT5 */
{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R9) MMC1_DAT6 */
{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T9) MMC1_DAT7 */
{-1}
};
/* USB_DRVBUS not used -> configure as GPIO */
static struct module_pin_mux usb_pin_mux[] = {
{OFFSET(usb0_drvvbus), (MODE(7) | PULLUDDIS)}, /* (F16) USB0_DRVVBUS */
{OFFSET(usb1_drvvbus), (MODE(7) | PULLUDDIS)}, /* (F15) USB1_DRVVBUS */
{-1}
};
/* TODO: SPI in operational mode */
/* What in XModem SPL Boot */
/* SPI1 */
static struct module_pin_mux spi1_pin_mux[] = {
{OFFSET(ecap0_in_pwm0_out), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (C18) spi1_clk */
{OFFSET(uart0_rtsn), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (E17) spi1_mosi */
{OFFSET(uart0_ctsn), (MODE(4) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (E18) spi1_miso */
{OFFSET(uart0_rxd), (MODE(1) | PULLUDEN | PULLUP_EN)}, /* (E15) spi1_cs0 */
{OFFSET(uart0_txd), (MODE(1) | PULLUDEN | PULLUP_EN)}, /* (E16) spi1_cs1 */
{-1}
};
/* CAN0: */
static struct module_pin_mux can0_pin_mux[] = {
{OFFSET(uart1_rtsn), (MODE(2) | RXACTIVE | PULLUDEN | PULLUP_EN)}, /* (D17) can0_rxd */
{OFFSET(uart1_ctsn), (MODE(2) | PULLUDEN | PULLUP_EN)}, /* (D18) can0_txd */
{-1}
};
/* CAN1: */
static struct module_pin_mux can1_pin_mux[] = {
{OFFSET(uart1_txd), (MODE(2) | RXACTIVE | PULLUDEN | PULLUP_EN)}, /* (D15) can1_rxd */
{OFFSET(uart1_rxd), (MODE(2) | PULLUDEN | PULLUP_EN)}, /* (D16) can1_txd */
{-1}
};
/* UART2: Debug/Console */
static struct module_pin_mux uart2_pin_mux[] = {
{OFFSET(spi0_sclk), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (A17) uart2_rxd */
{OFFSET(spi0_d0), (MODE(1) | PULLUDEN | PULLUP_EN)}, /* (B17) uart2_txd */
{-1}
};
/* UART3: GNSS */
static struct module_pin_mux uart3_pin_mux[] = {
{OFFSET(mii1_rxd3), (MODE(1) | PULLUDDIS | RXACTIVE)}, /* (L17) UART3_RXD */
{OFFSET(mii1_rxd2), (MODE(1) | PULLUDDIS | SLEWCTRL)}, /* (L16) UART3_TXD */
{-1}
};
/* UART4: User RS232/485 (V3.2 only) */
static struct module_pin_mux uart4_pin_mux[] = {
/*
* CTSn = SEL_RS232/RS485~: Default = Low -> RS485 mode
* RTSn = RS485_DE: Default = Low -> RS485 transmitter disabled
* Configure as GPIO in U-Boot to keep disabled, Linux will change to RTSn
*/
{OFFSET(gpmc_wait0), (MODE(6) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T17) UART4_RXD */
{OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (U17) UART4_TXD */
{OFFSET(lcd_data12), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (V2) uart4_ctsn */
{OFFSET(lcd_data13), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (V3) uart4_rtsn */
{-1}
};
/* UART5: Highspeed UART for Bluetooth (no SLEWCTRL) */
static struct module_pin_mux uart5_pin_mux[] = {
{OFFSET(lcd_data9), (MODE(4) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U2) UART5_RXD */
{OFFSET(lcd_data8), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (U1) UART5_TXD */
{OFFSET(lcd_data14), (MODE(6) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V4) uart5_ctsn */
{OFFSET(lcd_data15), (MODE(6) | PULLUDEN | PULLUP_EN)}, /* (T5) uart5_rtsn */
{-1}
};
static struct module_pin_mux unused_pin_mux[] = {
/* SYSBOOT6, 7, 10, 11: Not used pulldown active, receiver disabled */
{OFFSET(lcd_data6), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
{OFFSET(lcd_data7), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
{OFFSET(lcd_data11), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
/* TODO: GPMCA1..3, A6..8 */
{-1}
};
/* UART0: <tbd> */
static struct module_pin_mux uart0_pin_mux[] = {
{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (E15) UART0_RXD */
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (E16) UART0_TXD */
{-1}
};
void enable_board_pin_mux(void)
{
configure_module_pin_mux(gpio_pin_mux);
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_sdio_pin_mux);
configure_module_pin_mux(mmc1_emmc_pin_mux);
configure_module_pin_mux(usb_pin_mux);
configure_module_pin_mux(i2c0_pin_mux);
configure_module_pin_mux(i2c1_pin_mux);
/* configure_module_pin_mux(spi1_pin_mux); */
/* TODO: SPL Bringup */
configure_module_pin_mux(uart3_pin_mux);
configure_module_pin_mux(uart5_pin_mux);
configure_module_pin_mux(can0_pin_mux);
configure_module_pin_mux(can1_pin_mux);
configure_module_pin_mux(unused_pin_mux);
}
void enable_uart0_pin_mux(void)
{
configure_module_pin_mux(uart0_pin_mux);
}
void enable_uart2_pin_mux(void)
{
configure_module_pin_mux(uart2_pin_mux);
}
void enable_uart4_pin_mux(void)
{
configure_module_pin_mux(uart4_pin_mux);
}
void enable_spi1_mux(void)
{
configure_module_pin_mux(spi1_pin_mux);
}
void enable_led_mux(void)
{
configure_module_pin_mux(led_pin_mux);
}
void enable_led_mux_v32(void)
{
configure_module_pin_mux(led_pin_mux_v32);
}

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@ -1,81 +0,0 @@
/*
* reset_reason.c
*
* Reset/start reason handling
*
* Copyright (C) 2021 NetModule AG - https://www.netmodule.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include "../common/ether_crc.h"
#include "reset_reason.h"
void rr_set_reset_reason(volatile struct reset_registers* reset_regs, uint32_t reason)
{
reset_regs->rr_value = reason;
reset_regs->rr_value_crc = ether_crc(sizeof(reset_regs->rr_value),
(const uint8_t*)&(reset_regs->rr_value));
}
bool rr_is_reset_reason_valid(volatile const struct reset_registers* reset_regs)
{
const uint32_t crc = ether_crc(sizeof(reset_regs->rr_value),
(const uint8_t*)&(reset_regs->rr_value));
return crc == reset_regs->rr_value_crc;
}
void rr_set_start_reason(volatile struct reset_registers* reset_regs, uint32_t event)
{
/* Store start events in shared memory region for OS */
reset_regs->sr_magic = SR_MAGIC;
reset_regs->sr_events = event;
reset_regs->sr_checksum = ether_crc(sizeof(reset_regs->sr_events),
(const uint8_t*)&(reset_regs->sr_events));
}
bool rr_is_start_reason_valid(volatile const struct reset_registers* reset_regs)
{
if (reset_regs->sr_magic == SR_MAGIC) {
const uint32_t crc = ether_crc(sizeof(reset_regs->sr_events),
(const uint8_t*)&(reset_regs->sr_events));
if (crc == reset_regs->sr_checksum) {
return true;
}
}
return false;
}
void rr_start_reason_to_str(uint32_t events, char* buffer, size_t bufsize)
{
if (events == 0) {
strncpy(buffer, "-\n", bufsize);
}
else {
buffer[0] = 0;
if (events & SR_POR)
strncat(buffer, "PowerOn, ", bufsize);
if (events & SR_WATCHDOG)
strncat(buffer, "Watchdog, ", bufsize);
if (events & SR_REBOOT)
strncat(buffer, "Reboot, ", bufsize);
if (events & SR_WAKEUP)
strncat(buffer, "Wakeup, ", bufsize);
if (events & SR_EVT_IGNITION)
strncat(buffer, "Ignition, ", bufsize);
if (events & SR_EVT_RTC_ALARM)
strncat(buffer, "RTC, ", bufsize);
if (events & SR_EVT_RTC_TICK)
strncat(buffer, "Tick, ", bufsize);
if (events & SR_EVT_GPI)
strncat(buffer, "GPI, ", bufsize);
if (events & SR_EVT_BUTTON)
strncat(buffer, "Button, ", bufsize);
/* Trim last comma, no 0 len check required, at least one entry is present */
buffer[strlen(buffer)-2] = 0;
}
}

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/*
* reset_reason.h
*
* Reset/start reason handling
*
* Copyright (C) 2021 NetModule AG - https://www.netmodule.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef RESET_REASON_H
#define RESET_REASON_H
struct reset_registers {
/* Reboot Reasons, set by OS, expect watchdog set by bootloader */
uint32_t rr_value;
uint32_t rr_value_crc;
/* Start Reasons as determined by hardware */
uint32_t sr_magic; /* Token to check presence of following fields */
uint32_t sr_events; /* Events bitmask, see SE_... defines */
uint32_t sr_checksum; /* Checksum over se_events */
};
/* Watchdog reboot reason event */
#define RR_POWEROFF_PATTERN 0x00000000
#define RR_EXTERNAL_WATCHDOG_PATTERN 0x781f9ce2
#define RR_BOOT_PATTERN 0x424f4f54 /* BOOT, 0xb9808470 */
#define RR_REBOOT_PATTERN 0x5245424f /* REBO, 0x7d5d9d66 */
#define RR_OOPS_PATTERN 0x4F4F5053 /* OOPS, 0x2b85bc5f */
#define RR_WAKE_PATTERN 0x57414B45 /* 'WAKE', 0x7b0acb48 */
/* Start reason token 'SRTE' */
#define SR_MAGIC 0x53525445
/* Possible start events (see sr_events) */
#define SR_POR 0x00000001
#define SR_WATCHDOG 0x00000010
#define SR_REBOOT 0x00000020
#define SR_WAKEUP 0x00000080 /* See SR_EVT_xx bits */
/* In case of wake-up, these are the events that caused the start */
#define SR_EVT_IGNITION 0x00000100
#define SR_EVT_RTC_ALARM 0x00000200 /* RTC date/time alarm */
#define SR_EVT_RTC_TICK 0x00000400 /* RTC tick based alarm */
#define SR_EVT_GPI 0x00000800 /* General purpose input(s) */
#define SR_EVT_BUTTON 0x00001000
#define SR_EVT_WAKE_MASK 0x00001F00
extern void rr_set_reset_reason(volatile struct reset_registers* reset_regs, uint32_t reason);
extern bool rr_is_reset_reason_valid(volatile const struct reset_registers* reset_regs);
extern void rr_set_start_reason(volatile struct reset_registers* reset_regs, uint32_t event);
extern bool rr_is_start_reason_valid(volatile const struct reset_registers* reset_regs);
extern void rr_start_reason_to_str(uint32_t events, char* buffer, size_t bufsize);
#endif /* RESET_REASON_H */

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/*
* sja1105.c
*
* Functions for NXP SJA1105 Ethernet Switch
*
* Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <errno.h>
#include <spi.h>
#include "sja1105.h"
#define SJA_OPCODE_WRITE 0x80
#define SJA_OPCODE_READ 0x00
#define SJA_READ_CNT(x) (((x) & 0x3F) << 1)
static struct spi_slave *sja1105_spi_bus = 0;
static int bus_claimed = 0;
void sja1105_init(struct spi_slave *spi)
{
sja1105_spi_bus = spi;
}
void sja1105_claim_bus(void)
{
spi_claim_bus(sja1105_spi_bus);
bus_claimed++;
}
void sja1105_release_bus(void)
{
spi_release_bus(sja1105_spi_bus);
bus_claimed--;
}
uint32_t sja1105_read_reg(uint32_t address)
{
uint32_t return_value;
uint8_t dataspi[8];
uint8_t datain[8];
/* OPCODE: READ, READ CNT = 1, address from bit 24 DOWNTO bit 4 */
dataspi[0] = (SJA_OPCODE_READ | SJA_READ_CNT(1)) | ((address >> 20) & 0x01); /* MSB */
dataspi[1] = (address >> 12) & 0xFF;
dataspi[2] = (address >> 4) & 0xFF;
dataspi[3] = (address << 4) & 0xF0;
dataspi[4] = 0x00; /* ignored by slave, use to readout the register */
dataspi[5] = 0x00;
dataspi[6] = 0x00;
dataspi[7] = 0x00;
(void)spi_xfer(sja1105_spi_bus, 8*sizeof(dataspi) /*bitlen*/, dataspi, datain /*din*/, SPI_XFER_BEGIN | SPI_XFER_END /*flags*/);
return_value = (datain[4]<<24) | (datain[5]<<16) | (datain[6]<<8) | (datain[7]<<0);
return return_value;
}
void sja1105_write_reg(uint32_t address, uint32_t data)
{
uint8_t dataspi[8];
/* OPCODE: WRITE, address from bit 24 DOWNTO bit 4 */
dataspi[0] = SJA_OPCODE_WRITE | (address >> 20 & 0x01);
dataspi[1] = (address >> 12) & 0xFF;/* */
dataspi[2] = (address >> 4) & 0xFF;
dataspi[3] = (address << 4) & 0xF0;
dataspi[4] = (data >> 24) & 0xFF;
dataspi[5] = (data >> 16) & 0xFF;
dataspi[6] = (data >> 8) & 0xFF;
dataspi[7] = data & 0xFF;
(void)spi_xfer(sja1105_spi_bus, 8*sizeof(dataspi) /*bitlen*/, dataspi, NULL /*din*/, SPI_XFER_BEGIN| SPI_XFER_END /*flags*/);
}
void sja1105_configure_firmware(void)
{
static const uint8_t config_data_0[] = { 0x80, 0x20, 0x00, 0x00, 0x9E, 0x00, 0x03, 0x0E, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x21, 0x6F, 0x25, 0x6B, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x03, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x07, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0B, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF };
static const uint8_t config_data_1[] = { 0x80, 0x20, 0x04, 0x00, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x0F, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0xFE, 0xF9, 0x00, 0x00, 0x13, 0xFF, 0xFF, 0xFF, 0x03, 0x68, 0x8B, 0xEA, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x7D, 0x0B, 0xCB, 0xF2, 0xF8, 0x00, 0x00, 0x00, 0x00, 0x31, 0x80, 0x7F, 0x09, 0x52, 0x68, 0x0D, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x6A, 0xF6, 0x23, 0x53, 0x10, 0x00, 0x00, 0x00, 0xF7, 0xBD, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0xEF, 0x7B, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0xDE, 0xF7, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0xBD, 0xEF, 0xF5, 0x8D, 0x10, 0x00, 0x00, 0x00, 0x7B, 0xDF, 0xF5, 0x8D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x04, 0xA6, 0x06, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0xDA, 0xB5, 0xBD, 0xC8, 0x00, 0x3F, 0xFC, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00 };
static const uint8_t config_data_2[] = { 0x80, 0x20, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x08, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xFC, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x07, 0xFC, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x83, 0x75, 0xF9, 0x8D, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x25, 0x0E, 0x7C, 0xBD, 0x00, 0x01, 0x25, 0xC0, 0x70, 0x94, 0x84, 0x50, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0xC8, 0xA7, 0xCE, 0xE6, 0x00, 0x71, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC3, 0xF7, 0x04, 0xB9, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x57, 0x1F, 0x81, 0x3F, 0x06, 0x44, 0x00, 0x00, 0x00, 0x00, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x0D, 0xB0, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x00, 0x00, 0x00, 0x5A, 0x9C, 0x37, 0x20, 0x4E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x3A, 0x5D, 0x5E, 0x24, 0xA4, 0x9A, 0x00, 0x00, 0x7B, 0x51, 0xDA, 0x7D, 0x00, 0x00, 0x00, 0x00 };
static const uint8_t config_data_3[] = { 0x80, 0x20, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x6E, 0x02, 0x8B };
uint32_t val;
int rc;
rc = spi_xfer(sja1105_spi_bus, 8*sizeof(config_data_0) /*bitlen*/, config_data_0, NULL, SPI_XFER_BEGIN | SPI_XFER_END /*flags*/);
if (rc != 0)
printf ("spi_xfer fail for config data 0\n");
rc = spi_xfer(sja1105_spi_bus, 8*sizeof(config_data_1) /*bitlen*/, config_data_1, NULL, SPI_XFER_BEGIN | SPI_XFER_END /*flags*/);
if (rc != 0)
printf ("spi_xfer fail for config data 1\n");
rc = spi_xfer(sja1105_spi_bus, 8*sizeof(config_data_2) /*bitlen*/, config_data_2, NULL, SPI_XFER_BEGIN | SPI_XFER_END /*flags*/);
if (rc != 0)
printf ("spi_xfer fail for config data 2\n");
rc = spi_xfer(sja1105_spi_bus, 8*sizeof(config_data_3) /*bitlen*/, config_data_3, NULL, SPI_XFER_BEGIN | SPI_XFER_END /*flags*/);
if (rc != 0)
printf ("spi_xfer fail for config data 3\n");
/* Check that config was properly loaded */
val = sja1105_read_reg(SJA_REG_CONFIG_STATUS);
if ((val & 0x80000000) != 0x80000000) { // TODO: Define bitmask
printf("ERROR: Switch configuration load failed\n");
// TODO: provide return code.
}
}
void sja1105_configure_mode_and_clocks(void)
{
sja1105_write_reg( 0x10000A, 0x0A010141); /* PLL 1 setup for 50MHz */
sja1105_write_reg( 0x10000A, 0x0A010940); /* PLL 1 setup for 50MHz */
/* Port 0: RMII (PHY mode = external REFCLK) */
sja1105_write_reg( 0x10000B, 0x0A000001); // Disable IDIV0
sja1105_write_reg( 0x100015, 0x00000800); // CLKSRC of RMII_REF_CLK_0 = TX_CLK_0
/* Port 1: RMII (MAC mode) */
sja1105_write_reg( 0x10000C, 0x0A000001); // Disable IDIV1
sja1105_write_reg( 0x10001C, 0x02000800); // CLKSRC of RMII_REF_CLK_1 = TX_CLK_1
sja1105_write_reg( 0x10001F, 0x0E000800); // CLKSRC of EXT_TX_CLK1 = PLL1 (50 MHz)
/* Port 2: RMII (MAC mode) */
sja1105_write_reg( 0x10000D, 0x0A000001); // Disable IDIV2
sja1105_write_reg( 0x100023, 0x04000800); // CLKSRC of RMII_REF_CLK_2 = TX_CLK_2
sja1105_write_reg( 0x100026, 0x0E000800); // CLKSRC of EXT_TX_CLK2 = PLL1 (50 MHz)
/* Port 3: RMII (MAC mode) */
sja1105_write_reg( 0x10000E, 0x0A000001); // Disable IDIV3
sja1105_write_reg( 0x10002A, 0x06000800); // CLKSRC of RMII_REF_CLK_3 = TX_CLK_3
sja1105_write_reg( 0x10002D, 0x0E000800); // CLKSRC of EXT_TX_CLK3 = PLL1 (50 MHz)
/* Port 4: RMII (PHY mode = external REFCLK) */
sja1105_write_reg( 0x10000F, 0x0A000001); // Disable IDIV4
sja1105_write_reg( 0x100031, 0x08000800); // CLKSRC of RMII_REF_CLK_4 = TX_CLK_4
}
void sja1105_configure_io(void)
{
/* Port 0 and Port 4 RX */
/* Enable pull down on CPU Port RX_DV/CRS_DV/RX_CTL and RX_ER and RX_CLK/RXC and RXD2 RXD3 */
sja1105_write_reg(0x100801, 0x03020313);
sja1105_write_reg(0x100809, 0x03020313);
/* Port 1 to Port 3 RX */
/* Enable pull down on CPU Port ... and RX_CLK/RXC and RXD2 RXD3 */
// TODO: What is ...
sja1105_write_reg(0x100803, 0x03020213);
sja1105_write_reg(0x100805, 0x03020213);
sja1105_write_reg(0x100807, 0x03020213);
/* Port 0 to Port 4 TX */
/* Enable pull down on CPU Port TX_ER and TXD2 TXD3 */
sja1105_write_reg(0x100800, 0x13121312);
sja1105_write_reg(0x100802, 0x13121312);
sja1105_write_reg(0x100804, 0x13121312);
sja1105_write_reg(0x100806, 0x13121312);
sja1105_write_reg(0x100808, 0x13121312);
}
#if 0
/*
* readout and print the configured IO pads (unused IOs)
*/
static void sja1105_read_io(void)
{
uint32_t val;
val = sja1105_read_reg(0x100801);
printf("CFG_PAD_MII0_RX Reg: %08x\n", val);
val = sja1105_read_reg(0x100800);
printf("CFG_PAD_MII0_TX Reg: %08x\n", val);
val = sja1105_read_reg(0x100803);
printf("CFG_PAD_MII1_RX Reg: %08x\n", val);
val = sja1105_read_reg(0x100802);
printf("CFG_PAD_MII1_TX Reg: %08x\n", val);
val = sja1105_read_reg(0x100805);
printf("CFG_PAD_MII2_RX Reg: %08x\n", val);
val = sja1105_read_reg(0x100804);
printf("CFG_PAD_MII2_TX Reg: %08x\n", val);
val = sja1105_read_reg(0x100807);
printf("CFG_PAD_MII3_RX Reg: %08x\n", val);
val = sja1105_read_reg(0x100806);
printf("CFG_PAD_MII3_TX Reg: %08x\n", val);
val = sja1105_read_reg(0x100809);
printf("CFG_PAD_MII4_RX Reg: %08x\n", val);
val = sja1105_read_reg(0x100808);
printf("CFG_PAD_MII4_TX Reg: %08x\n", val);
}
#endif
#if !defined(CONFIG_SPL_BUILD)
static int do_sjainfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
uint32_t p0_mac_stat;
uint32_t p0_txf;
uint32_t p0_rxf;
uint32_t p1_mac_stat;
uint32_t p1_txf;
uint32_t p1_rxf;
uint32_t p2_mac_stat;
uint32_t p2_rxf;
uint32_t p2_txf;
uint32_t p3_mac_stat;
uint32_t p3_txf;
uint32_t p3_rxf;
uint32_t p4_mac_stat;
uint32_t p4_rxf;
uint32_t p4_txf;
sja1105_claim_bus();
p0_mac_stat = sja1105_read_reg(0x00200);
p0_rxf = sja1105_read_reg(0x00406);
p0_txf = sja1105_read_reg(0x00402);
p1_mac_stat = sja1105_read_reg(0x00202);
p1_rxf = sja1105_read_reg(0x00416);
p1_txf = sja1105_read_reg(0x00412);
p2_mac_stat = sja1105_read_reg(0x00204);
p2_rxf = sja1105_read_reg(0x00426);
p2_txf = sja1105_read_reg(0x00422);
p3_mac_stat = sja1105_read_reg(0x00206);
p3_rxf = sja1105_read_reg(0x00436);
p3_txf = sja1105_read_reg(0x00432);
p4_mac_stat = sja1105_read_reg(0x00208);
p4_rxf = sja1105_read_reg(0x00446);
p4_txf = sja1105_read_reg(0x00442);
sja1105_release_bus();
printf("Port MAC Stat Rx Tx\n");
printf("0 (UM) : %08x %u %u\n", p0_mac_stat, p0_rxf, p0_txf);
printf("1 (BroadR-0) : %08x %u %u\n", p1_mac_stat, p1_rxf, p1_txf);
printf("2 (BroadR-1) : %08x %u %u\n", p2_mac_stat, p2_rxf, p2_txf);
printf("3 (100bTx) : %08x %u %u\n", p3_mac_stat, p3_rxf, p3_txf);
printf("4 (CPU) : %08x %u %u\n", p4_mac_stat, p4_rxf, p4_txf);
return 0;
}
U_BOOT_CMD(
sjainfo, 1, 1, do_sjainfo,
"show eth switch information",
""
);
#endif

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@ -1,89 +0,0 @@
/*
* sja1105.c
*
* Functions for NXP SJA1105 Ethernet Switch
*
* Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SJA1105_H_
#define _SJA1105_H_
#define SJA_REG_DEVICE_ID 0x000000
#define SJA_REG_CONFIG_STATUS 0x000001
/**
* Initializes the sja1105 driver.
*
* Must be called before any other function can be used.
* Takes and remembers SPI driver for later calls.
*
* @param spi SPI driver instance
*/
void sja1105_init(struct spi_slave *spi);
/**
* Claims bus for subsequent switch accesses.
*/
void sja1105_claim_bus(void);
/**
* Releases bus.
*/
void sja1105_release_bus(void);
/**
* Reads switch register.
*
* (multiple register not possible with this function)
*
* @param address register to read (range 0x0 to 0x100BC3)
* @returns readback data
*/
uint32_t sja1105_read_reg(uint32_t address);
/**
* Writes switch register.
*
* @param address register to write (range 0x0 to 0x100BC3)
* @param data data to write
*/
void sja1105_write_reg(uint32_t address, uint32_t data);
/**
* Loads switch firmware.
*
* This function must be called after the switch has been powered up
*
* When the device is powered up, it expects to receive an input stream
* containing initial setup information over the configuration interface.
* The initial configuration data sets the port modes, sets up VLANs
* and defines other forwarding and quality-of-service rules.
*
* This function takes care of loading the configuration according to the
* SJA1105 user manual.
*/
void sja1105_configure_firmware(void);
/**
* Configures the PLL, the CGU and the Auxiliary Configuration Unit.
*
* Notes: sja1105_configure_firmware() must be called prior to this function.
*
* Mode and clock description :
* - RMII operation on all ports:
* - PLL 1 setup for 50Mhz
* - Port 0 and 4: RMII (PHY mode = external REFCLK)
* - Port 1,2 and 3: RMII (MAC mode)
*/
void sja1105_configure_mode_and_clocks(void);
/**
* Configures IO pads to a safe state.
*
* Unused I/Os: Sets pull down to unused pins and set drive strengths
*/
void sja1105_configure_io(void);
#endif /* _SJA1105_H_ */

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@ -1,158 +0,0 @@
/*
* Copyright (c) 2004-2008 Texas Instruments
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
*(.__image_copy_start)
*(.vectors)
CPUDIR/start.o (.text*)
board/nm/nmhw21/built-in.o (.text*)
*(.text*)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : {
*(.data*)
}
. = ALIGN(4);
. = .;
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
. = ALIGN(4);
.__efi_runtime_start : {
*(.__efi_runtime_start)
}
.efi_runtime : {
*(efi_runtime_text)
*(efi_runtime_data)
}
.__efi_runtime_stop : {
*(.__efi_runtime_stop)
}
.efi_runtime_rel_start :
{
*(.__efi_runtime_rel_start)
}
.efi_runtime_rel : {
*(.relefi_runtime_text)
*(.relefi_runtime_data)
}
.efi_runtime_rel_stop :
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*(.__efi_runtime_rel_stop)
}
. = ALIGN(4);
.image_copy_end :
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*(.__image_copy_end)
}
.rel_dyn_start :
{
*(.__rel_dyn_start)
}
.rel.dyn : {
*(.rel*)
}
.rel_dyn_end :
{
*(.__rel_dyn_end)
}
.hash : { *(.hash*) }
.end :
{
*(.__end)
}
_image_binary_end = .;
/*
* Deprecated: this MMU section is used by pxa at present but
* should not be used by new boards/CPUs.
*/
. = ALIGN(4096);
.mmutable : {
*(.mmutable)
}
/*
* Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
* __bss_base and __bss_limit are for linker only (overlay ordering)
*/
.bss_start __rel_dyn_start (OVERLAY) : {
KEEP(*(.__bss_start));
__bss_base = .;
}
.bss __bss_base (OVERLAY) : {
*(.bss*)
. = ALIGN(4);
__bss_limit = .;
}
.bss_end __bss_limit (OVERLAY) : {
KEEP(*(.__bss_end));
}
.dynsym _image_binary_end : { *(.dynsym) }
.dynbss : { *(.dynbss) }
.dynstr : { *(.dynstr*) }
.dynamic : { *(.dynamic*) }
.gnu.hash : { *(.gnu.hash) }
.plt : { *(.plt*) }
.interp : { *(.interp*) }
.gnu : { *(.gnu*) }
.ARM.exidx : { *(.ARM.exidx*) }
}

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@ -1,219 +0,0 @@
/*
* ui.c
*
* User Interface access
*
* Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <errno.h>
#include <i2c.h>
#include "ui.h"
/* TODO: Define as masks */
/* HW V1.0: PCA9539BS (16 Bit) */
#define UI_V1_TOP_LED_GREEN 6
#define UI_V1_TOP_LED_RED 7
#define UI_V1_BOTTOM_LED_GREEN 9
#define UI_V1_BOTTOM_LED_RED 8
/* HW V2.0: PCA9538ABS (8 Bit) */
#define UI_V2_ID_0 0
#define UI_V2_ID_1 1
#define UI_V2_TOP_LED_GREEN 2
#define UI_V2_TOP_LED_RED 3
#define UI_V2_BOTTOM_LED_GREEN 6
#define UI_V2_BOTTOM_LED_RED 5
#define PCA9538_OUT_REG 0x01
#define PCA9538_CONF_REG 0x03
#define PCA9539_OUT_REG 0x02
#define PCA9539_CONF_REG 0x06
static int ioext_i2c_bus = 0;
/* -1: unitialized, 0: UI not available, 1: UI V1.x, 2: UI V2.x */
static int hw_version = -1;
static int bus_claimed = 0;
static uint8_t out_reg[2];
static void set_output(uint bit, bool state)
{
if (state) {
out_reg[bit/8U] &= ~(1U << (bit % 8U));
}
else {
out_reg[bit/8U] |= (1U << (bit % 8U));
}
}
static int switch_i2c_bus(int* old_bus)
{
int ret = 0;
if (old_bus == 0)
return -1;
*old_bus = i2c_get_bus_num();
if (*old_bus != ioext_i2c_bus) {
ret = i2c_set_bus_num(ioext_i2c_bus);
}
bus_claimed++;
return ret;
}
static void revert_i2c_bus(int bus)
{
if (ioext_i2c_bus != bus) {
(void)i2c_set_bus_num(bus);
}
bus_claimed--;
}
static void detect_version(void)
{
int ret;
uint8_t temp = 0;
hw_version = 0;
/* Try to detect PCA9539 on V1.x HW */
ret = i2c_read(CONFIG_UI_V1_I2C_ADDR, 0x00, 1, &temp, 1);
if (ret == 0) {
hw_version = 1;
}
if (hw_version == 0) {
/* Try to detect PCA9538 on V2.x HW */
ret = i2c_read(CONFIG_UI_V2_I2C_ADDR, 0x00, 1, &temp, 1);
if (ret == 0) {
hw_version = 2;
}
}
}
static void init_io(void)
{
switch (hw_version) {
case 1: {
uint8_t dir[2] = { 0x00, 0x00 }; /* All IOs = Outputs */
(void)i2c_write(CONFIG_UI_V1_I2C_ADDR, PCA9539_CONF_REG, 1, dir, 2);
out_reg[0] = 0xFF;
out_reg[1] = 0xFF;
break;
}
case 2: {
uint8_t dir[1] = { 0x03 }; /* Keep IO 0 & 1 as inputs */
(void)i2c_write(CONFIG_UI_V2_I2C_ADDR, PCA9538_CONF_REG, 1, dir, 1);
out_reg[0] = 0xFF;
break;
}
default:
break;
}
}
static void v1_set_top_leds(int red, int green)
{
set_output(UI_V1_TOP_LED_RED, red);
set_output(UI_V1_TOP_LED_GREEN, green);
(void)i2c_write(CONFIG_UI_V1_I2C_ADDR, PCA9539_OUT_REG, 1, out_reg, 2);
}
static void v1_set_bottom_leds(int red, int green)
{
set_output(UI_V1_BOTTOM_LED_RED, red);
set_output(UI_V1_BOTTOM_LED_GREEN, green);
(void)i2c_write(CONFIG_UI_V1_I2C_ADDR, PCA9539_OUT_REG, 1, out_reg, 2);
}
static void v2_set_top_leds(int red, int green)
{
set_output(UI_V2_TOP_LED_RED, red);
set_output(UI_V2_TOP_LED_GREEN, green);
(void)i2c_write(CONFIG_UI_V2_I2C_ADDR, PCA9538_OUT_REG, 1, out_reg, 1);
}
static void v2_set_bottom_leds(int red, int green)
{
set_output(UI_V2_BOTTOM_LED_RED, red);
set_output(UI_V2_BOTTOM_LED_GREEN, green);
(void)i2c_write(CONFIG_UI_V2_I2C_ADDR, PCA9538_OUT_REG, 1, out_reg, 1);
}
void ui_init(int i2c_bus)
{
int bus = -1;
int claimed;
ioext_i2c_bus = i2c_bus;
claimed = switch_i2c_bus(&bus);
if (claimed == 0) {
detect_version();
init_io();
}
revert_i2c_bus(bus);
}
int ui_version(void)
{
return hw_version;
}
void ui_set_top_led(int red, int green)
{
int bus = -1;
int claimed;
claimed = switch_i2c_bus(&bus);
if (claimed == 0) {
switch (hw_version) {
case 1: v1_set_top_leds(red, green); break;
case 2: v2_set_top_leds(red, green); break;
default: break;
}
revert_i2c_bus(bus);
}
}
void ui_set_bottom_led(int red, int green)
{
int bus = -1;
int claimed;
claimed = switch_i2c_bus(&bus);
if (claimed == 0) {
switch (hw_version) {
case 1: v1_set_bottom_leds(red, green); break;
case 2: v2_set_bottom_leds(red, green); break;
default: break;
}
revert_i2c_bus(bus);
}
}

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@ -1,39 +0,0 @@
/*
* ui.c
*
* User Interface access
*
* Copyright (C) 2018 NetModule AG - http://www.netmodule.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef UI_H
#define UI_H
#define CONFIG_UI_I2C_BUS 1
#define CONFIG_UI_V1_I2C_ADDR 0x74
#define CONFIG_UI_V2_I2C_ADDR 0x70
/**
* Initializes user interface module.
*
* @param i2c_bus Number of I2C bus UI is attached to.
*/
extern void ui_init(int i2c_bus);
/**
* Returns hardware version of UI.
*
* @return 0: No or unknown UI
* >0: Version (e.g. 1 or 2)
*/
extern int ui_version(void);
void ui_set_top_led(int red, int green);
void ui_set_bottom_led(int red, int green);
#endif /* UI_H */

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@ -1,171 +0,0 @@
/*
* um.c
*
* User Module Access
*
* Copyright (C) 2019 NetModule AG - http://www.netmodule.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <errno.h>
#include <i2c.h>
#include "um.h"
static int um_i2c_bus = 0;
static int bus_claimed = 0;
static int module_present = 0;
static um_type_t module_type = UM_TYPE_RESERVED;
static int hw_version = 0;
static int hw_revision = 0;
static struct in_addr ipv4_addr;
static struct in_addr ipv4_mask;
static int switch_i2c_bus(int* old_bus)
{
int ret = 0;
if (old_bus == NULL)
return -1;
*old_bus = i2c_get_bus_num();
if (*old_bus != um_i2c_bus) {
ret = i2c_set_bus_num(um_i2c_bus);
}
bus_claimed++;
return ret;
}
static void revert_i2c_bus(int bus)
{
if (um_i2c_bus != bus) {
(void)i2c_set_bus_num(bus);
}
bus_claimed--;
}
static void get_version(void)
{
int ret;
uint8_t reg[1];
ret = i2c_read(CONFIG_UM_I2C_ADDR, UM_REG_HW_VER, 1, reg, 1);
if (ret == 0) {
hw_version = (reg[0] >> 4) & 0x0F;
hw_revision = (reg[0] >> 0) & 0x0F;
} else {
puts("error reading user module version\n");
}
}
static void set_inaddr(const uint8_t* data, struct in_addr* in)
{
in->s_addr = htonl(data[0] << 24 | data[1] << 16 | data[2] << 8 | data[3] << 0);
}
static void get_network_address(void)
{
int ret;
uint8_t data[8];
ret = i2c_read(CONFIG_UM_I2C_ADDR, UM_REG_IPV4_ADDR, 1, data, 8);
if (ret == 0) {
set_inaddr(&data[0], &ipv4_addr);
set_inaddr(&data[4], &ipv4_mask);
} else {
puts("error reading user module network configuration\n");
}
}
static void detect(void)
{
int ret;
int i;
uint8_t reg[2];
hw_version = 0;
/* We don't know how fast the UM boots, try for up to 500 msecs */
for (i=0; i<500/10; i++) {
/* Try to read detect and type register */
ret = i2c_read(CONFIG_UM_I2C_ADDR, UM_REG_PRESENCE, 1, reg, 2);
if (ret == 0) {
/* i2c read was successful, now check presence register */
if (reg[UM_REG_PRESENCE] == UM_PRESENCE_TOKEN) {
module_present = 1;
module_type = (um_type_t)(reg[UM_REG_TYPE]);
}
break;
}
udelay(10*1000); /* 10 ms */
}
}
void um_init(int i2c_bus)
{
int bus = -1;
int claimed;
um_i2c_bus = i2c_bus;
claimed = switch_i2c_bus(&bus);
if (claimed == 0) {
detect();
if (module_present) {
/* TODO: Check why this delay is required.
* Is the UM software still reading board descriptor?
*/
udelay(50*1000); /* 50 ms delay (tested with 30 ms) */
get_version();
get_network_address();
}
}
revert_i2c_bus(bus);
}
int um_present(void)
{
return module_present;
}
const char* um_type_as_str(void)
{
switch (module_type) {
case UM_TYPE_VCUPRO: return "VCU Pro";
default: return "<unknown";
}
}
void um_version(uint8_t *version, uint8_t *revision)
{
if (version != NULL)
*version = hw_version;
if (revision != NULL)
*revision = hw_revision;
}
void um_network_address(struct in_addr* ip, struct in_addr* mask)
{
if (ip != NULL)
*ip = ipv4_addr;
if (mask != NULL)
*mask = ipv4_mask;
}

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@ -1,76 +0,0 @@
/*
* um.h
*
* User Module Access
*
* Copyright (C) 2019 NetModule AG - http://www.netmodule.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef UM_H
#define UM_H
#include <net.h>
#define CONFIG_UM_I2C_BUS 1
#define CONFIG_UM_I2C_ADDR 0x40
#define UM_REG_PRESENCE 0x00 /* Presence register, value = 0xC5 */
#define UM_REG_TYPE 0x01 /* See um_type_t */
#define UM_REG_HW_VER 0x04 /* Version.Revision, e.g. 0x21 = v2.1 */
#define UM_REG_IPV4_ADDR 0x10 /* IPv4 address in network byte order, 4 bytes */
#define UM_REG_IPV4_MASK 0x14 /* IPv4 mask in network byte order, 4 bytes */
#define UM_PRESENCE_TOKEN 0xC5
/* Known user modules */
typedef enum {
UM_TYPE_RESERVED = 0,
UM_TYPE_VCUPRO = 1,
UM_TYPE_MAX
} um_type_t;
/**
* Initializes user user module.
*
* @param i2c_bus Number of I2C bus module is attached to.
*/
void um_init(int i2c_bus);
/**
* Returns whether a module has been detected.
*
* @return 1 if module is detected, 0 otherwise.
*/
int um_present(void);
/**
* Returns name of module.
*
* @return Name of module or "<unknown>".
*/
const char* um_type_as_str(void);
/**
* Returns hardware version of module.
*
* @param version Pointer to variable to receive module version (0..15)
* @param revision Pointer to variable to receive module revision (0..15)
*/
void um_version(uint8_t *version, uint8_t *revision);
/**
* Returns user module IPv4 configuration
*
* @param ip Pointer to variable to receive IPv4 address
* @param mask Pointer to variable to receive IPv4 mask
*/
void um_network_address(struct in_addr* ip, struct in_addr* mask);
#endif /* UM_H */

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if TARGET_AM335X_NRHW20
config SYS_BOARD
default "nrhw20"
config SYS_VENDOR
default "nm"
config SYS_SOC
default "am33xx"
config SYS_CONFIG_NAME
default "am335x_nrhw20"
config CONS_INDEX
int "UART used for console"
range 1 6
default 2
help
The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
in documentation, etc) available to it. Depending on your specific
board you may want something other than UART0 as for example the IDK
uses UART3 so enter 4 here.
endif

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@ -1,13 +0,0 @@
#
# Makefile
#
# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
#
# SPDX-License-Identifier: GPL-2.0+
#
ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o shield.o shield_can.o shield_comio.o fileaccess.o

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/*
* board.h
*
* TI AM335x boards information header
*
* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* We have three pin mux functions that must exist. We must be able to enable
* uart0, for initial output and i2c2 to read the main EEPROM. We then have a
* main pinmux function that can be overridden to enable all other pinmux that
* is required on the board.
*/
void enable_uart0_pin_mux(void);
void disable_uart0_pin_mux(void);
void enable_uart1_pin_mux(void);
void enable_board_pin_mux(void);
#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
#endif

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#include <common.h>
#include <fs.h>
#define BLOCK_DEVICE "mmc"
#define OVERLAY_PART "1:3"
int read_file(const char* filename, char *buf, int size)
{
loff_t filesize = 0;
loff_t len;
int ret;
if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
puts("Error, can not set blk device\n");
return -1;
}
/* Read at most file size bytes */
if (fs_size(filename, &filesize)) {
return -1;
}
if (filesize < size)
size = filesize;
/* For very unclear reasons the block device needs to be set again after the call to fs_size() */
if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
puts("Error, can not set blk device\n");
return -1;
}
if ((ret = fs_read(filename, (ulong)buf, 0, size, &len))) {
printf("Can't read file %s (size %d, len %lld, ret %d)\n", filename, size, len, ret);
return -1;
}
buf[len] = 0;
return len;
}

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/**@file /home/eichenberger/projects/nbhw16/u-boot/board/nm/netbird_v2/fileaccess.h
* @author eichenberger
* @version 704
* @date
* Created: Tue 06 Jun 2017 02:02:33 PM CEST \n
* Last Update: Tue 06 Jun 2017 02:02:33 PM CEST
*/
#ifndef FILEACCESS_H
#define FILEACCESS_H
void fs_set_console(void);
int read_file(const char* filename, char *buf, int size);
#endif // FILEACCESS_H

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/*
* mux.c
*
* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
#include <asm/io.h>
#include "board.h"
static struct module_pin_mux gpio_pin_mux[] = {
/*
* CPU GPIOs
*
* (A17) GPIO0_2: RST_GNSS~
* (B17) GPIO0_3: GEOFENCE_GNSS
* (B16) GPIO0_4: RTK_STAT_GNSS
* (A16) GPIO0_5: EXTINT_GNSS
* (C15) GPIO0_6: TIMEPULSE
* (C18) GPIO0_7: PWM / SHIELD LATCH
* (J18) GPIO0_16: RST_PHY~
* (K15) GPIO0_17: PMIC FAULT
* (U12) GPIO0_27: RST_SHIELD~
*
* (V13) GPIO1_14: DIG_OUT
* (U13) GPIO1_15: DIG_IN
* (R14) GPIO1_20: BT_EN
* (V15) GPIO1_21: GSM_PWR_EN
* (U16) GPIO1_25: RST_GSM
* (T16) GPIO1_26: WLAN_EN
* (V17) GPIO1_27: WLAN_IRQ
*
* (J17) GPIO3_4: PCIe_IO.WAKE
* (K18) GPIO3_9: PCIe_IO.W_DIS
* (L18) GPIO3_10: PCIe_IO.RST
* (C12) GPIO3_17: SIM_SEL
* (A14) GPIO3_21: RST_HUB~ (USB)
*/
/* Bank 0 */
{OFFSET(spi0_sclk), (MODE(7) | PULLUDDIS)}, /* (A17) gpio0[2] */ /* RST_GNSS */
{OFFSET(spi0_d0), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (B17) gpio0[3] */ /* GEOFENCE_GNSS */
{OFFSET(spi0_d1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (B16) gpio0[4] */ /* RTK_STAT_GNSS */
{OFFSET(spi0_cs0), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (A16) gpio0[5] */ /* EXTINT_GNSS */
{OFFSET(spi0_cs1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (C15) gpio0[6] */ /* TIMEPULSE */
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (C18) gpio0[7] */ /* IO_SHIELD */
{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gpio0[16] */ /* RST_PHY~ */
{OFFSET(mii1_txd2), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (K15) gpio0[17] */ /* PMIC_FAULT */
{OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)}, /* (U12) gpio0[27] */ /* RST_SHIELD~ */
/* Bank 1 */
{OFFSET(gpmc_ad14), (MODE(7) | PULLUDDIS)}, /* (V13) gpio1[14] */ /* DIG_OUT */
{OFFSET(gpmc_ad15), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U13) gpio1[15] */ /* DIG_IN */
{OFFSET(gpmc_a4), (MODE(7) | PULLUDDIS)}, /* (R14) gpio1[20] */ /* BT_EN */
{OFFSET(gpmc_a5), (MODE(7) | PULLUDDIS)}, /* (V15) gpio1[21] */ /* GSM_PWR_EN */
{OFFSET(gpmc_a9), (MODE(7) | PULLUDDIS)}, /* (U16) gpio1[25] */ /* RST_GSM */
{OFFSET(gpmc_a10), (MODE(7) | PULLUDDIS)}, /* (T16) gpio1[26] */ /* WLAN_EN */
{OFFSET(gpmc_a11), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (V17) gpio1[27] */ /* WLAN_IRQ */
/* TODO: What about all the unused GPMC pins ? */
/* Bank 2 */
#if 0
/* TODO: What is this meant for? */
{OFFSET(lcd_data3), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (R4) gpio2[9] */ /* SYSBOOT_3 */
{OFFSET(lcd_data4), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (T1) gpio2[10] */ /* SYSBOOT_4 */
/* TODO: Check other unued pins from sysboot block */
/* Ensure PU/PD does not work against external signal */
/*
* SYSBOOT 0,1,5,12,13 = Low
* SYSBOOT 2 = High
*/
#endif
/* Bank 3 */
{OFFSET(mii1_col), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (H16) gpio3[0] */ /* BUTTON */
{OFFSET(mii1_rxdv), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (J17) gpio3[4] */ /* PCIe_IO.WAKE */
{OFFSET(mii1_txclk), (MODE(7) | PULLUDDIS)}, /* (K18) gpio3[9] */ /* PCIe_IO.W_DIS */
{OFFSET(mii1_rxclk), (MODE(7) | PULLUDDIS)}, /* (L18) gpio3[10] */ /* PCIe_IO.RST */
{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (C12) gpio3[17] */ /* SIM_SEL */
{OFFSET(mcasp0_ahclkx), (MODE(7) | PULLUDEN)}, /* (A14) gpio3[21] */ /* RST_HUB~ */
{-1}
};
/* I2C0 PMIC */
static struct module_pin_mux i2c0_pin_mux[] = {
{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (C17) I2C0_SDA */
{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (C16) I2C0_SCL */
{-1}
};
/* I2C2 System */
static struct module_pin_mux i2c2_pin_mux[] = {
{OFFSET(uart1_rtsn), (MODE(3) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (D17) I2C2_SCL */
{OFFSET(uart1_ctsn), (MODE(3) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (D18) I2C2_SDA */
{-1},
};
/* RMII1: Ethernet Switch */
static struct module_pin_mux rmii1_pin_mux[] = {
/* RMII */
{OFFSET(mii1_crs), MODE(1) | PULLUDDIS | RXACTIVE}, /* (H17) rmii1_crs */
{OFFSET(mii1_rxerr), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE}, /* (J15) gpio */
{OFFSET(mii1_rxd0), MODE(1) | PULLUDDIS | RXACTIVE}, /* (M16) rmii1_rxd0 */
{OFFSET(mii1_rxd1), MODE(1) | PULLUDDIS | RXACTIVE}, /* (L15) rmii1_rxd1 */
{OFFSET(mii1_txen), MODE(1) | PULLUDDIS}, /* (J16) rmii1_txen */
{OFFSET(mii1_txd0), MODE(1) | PULLUDDIS}, /* (K17) rmii1_txd0 */
{OFFSET(mii1_txd1), MODE(1) | PULLUDDIS}, /* (K16) rmii1_txd1 */
{OFFSET(rmii1_refclk), MODE(0) | PULLUDDIS | RXACTIVE}, /* (H18) rmii1_refclk */
/* SMI */
{OFFSET(mdio_clk), MODE(0) | PULLUDDIS}, /* (M18) mdio_clk */
{OFFSET(mdio_data), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE}, /* (M17) mdio_data */
/* 25MHz Clock Output */
{OFFSET(xdma_event_intr0), MODE(3)}, /* (A15) clkout1 (25 MHz clk for Switch) */
{-1}
};
/* MMC0: WiFi */
static struct module_pin_mux mmc0_sdio_pin_mux[] = {
{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G17) MMC0_CLK */
{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G18) MMC0_CMD */
{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G16) MMC0_DAT0 */
{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G15) MMC0_DAT1 */
{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (F18) MMC0_DAT2 */
{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (F17) MMC0_DAT3 */
{-1}
};
/* MMC1: eMMC */
static struct module_pin_mux mmc1_emmc_pin_mux[] = {
{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U9) MMC1_CLK */
{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V9) MMC1_CMD */
{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U7) MMC1_DAT0 */
{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V7) MMC1_DAT1 */
{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R8) MMC1_DAT2 */
{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T8) MMC1_DAT3 */
{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U8) MMC1_DAT4 */
{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V8) MMC1_DAT5 */
{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R9) MMC1_DAT6 */
{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T9) MMC1_DAT7 */
{-1}
};
/* USB_DRVBUS not used -> configure as GPIO */
static struct module_pin_mux usb_pin_mux[] = {
{OFFSET(usb0_drvvbus), (MODE(7) | PULLUDDIS)}, /* (F16) USB0_DRVVBUS */
{OFFSET(usb1_drvvbus), (MODE(7) | PULLUDDIS)}, /* (F15) USB1_DRVVBUS */
{-1}
};
/* UART0: RS232/RS485 shield mode */
static struct module_pin_mux uart0_pin_mux[] = {
{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (E15) UART0_RXD */
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (E16) UART0_TXD */
{-1},
};
/* UART0: Shield I/F (UART, CAN) */
/* Leave UART0 unconfigured because we want to configure it as needed by Linux (can/spi/uart/etc) */
/* Mode 7 = GPIO */
static struct module_pin_mux uart0_disabled_pin_mux[] = {
{OFFSET(uart0_rxd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E15) GPIO1_10 */
{OFFSET(uart0_txd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E16) GPIO1_11 */
{OFFSET(uart0_ctsn), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E18) GPIO1_8 */
{OFFSET(uart0_rtsn), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (E17) GPIO1_9 */
{-1},
};
/* UART1: User (Debug/Console) */
static struct module_pin_mux uart1_pin_mux[] = {
{OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (D16) uart1_rxd */
{OFFSET(uart1_txd), (MODE(0) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (D15) uart1_txd */
{-1},
};
/* UART3: GNSS */
static struct module_pin_mux uart3_pin_mux[] = {
{OFFSET(mii1_rxd3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (L17) UART3_RXD */
{OFFSET(mii1_rxd2), (MODE(1) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (L16) UART3_TXD */
{-1}
};
/* UART5: Highspeed UART for Bluetooth (no SLEWCTRL) */
static struct module_pin_mux uart5_pin_mux[] = {
{OFFSET(lcd_data9), (MODE(4) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U2) UART5_RXD */
{OFFSET(lcd_data8), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (U1) UART5_TXD */
{OFFSET(lcd_data14), (MODE(6) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V4) uart5_ctsn */
{OFFSET(lcd_data15), (MODE(6) | PULLUDEN | PULLUP_EN)}, /* (T5) uart5_rtsn */
{-1}
};
static struct module_pin_mux unused_pin_mux[] = {
/* SYSBOOT6, 7, 10, 11: Not used pulldown active, receiver disabled */
{OFFSET(lcd_data6), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
{OFFSET(lcd_data7), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
{OFFSET(lcd_data10), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
{OFFSET(lcd_data11), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
/* TODO: GPMCA1..3, A6..8 */
{-1}
};
void enable_board_pin_mux(void)
{
configure_module_pin_mux(gpio_pin_mux);
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_sdio_pin_mux);
configure_module_pin_mux(mmc1_emmc_pin_mux);
configure_module_pin_mux(usb_pin_mux);
configure_module_pin_mux(i2c0_pin_mux);
configure_module_pin_mux(i2c2_pin_mux);
configure_module_pin_mux(uart3_pin_mux);
configure_module_pin_mux(uart5_pin_mux);
configure_module_pin_mux(unused_pin_mux);
}
void enable_uart0_pin_mux(void)
{
configure_module_pin_mux(uart0_pin_mux);
}
void disable_uart0_pin_mux(void)
{
configure_module_pin_mux(uart0_disabled_pin_mux);
}
void enable_uart1_pin_mux(void)
{
configure_module_pin_mux(uart1_pin_mux);
}

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@ -1,74 +0,0 @@
#undef DEBUG
#include <common.h>
#include <asm/gpio.h>
#include <asm/arch/mux.h>
#include "shield.h"
#include "board.h"
#define MAX_SHIELDS 16
static struct shield_t *shields[MAX_SHIELDS];
static int shield_count = 0;
/* Perhaps this function shouldn't leave in shields.c? */
int shield_gpio_request_as_input(unsigned int gpio, const char *label)
{
int ret;
ret = gpio_request(gpio, label);
if ((ret < 0)) {
printf("Could not request shield slot %s gpio\n", label);
return -1;
}
ret = gpio_direction_input(gpio);
if ((ret < 0)) {
printf("Could not configure shield slot %s gpio as input\n", label);
return -1;
}
return 0;
}
void shield_register(struct shield_t *shield)
{
if (shield_count >= MAX_SHIELDS) {
printf("Max shield count reached (%d), please increment MAX_SHIELDS\n", MAX_SHIELDS);
return;
}
shields[shield_count++] = shield;
}
int shield_set_mode(const char* shield_type, int argc, char * const argv[])
{
int i;
for (i = 0; i < shield_count; i++) {
if (strcmp(shield_type, shields[i]->name) == 0) {
return shields[i]->setmode(argv, argc);
}
}
printf("## Error: No %s shield installed\n", shield_type);
/* Do not return error, to not show usage (request by rs) */
return 0;
}
static int do_shieldmode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc < 2) {
return -1;
}
return shield_set_mode(argv[1], argc - 2, &argv[2]);
}
U_BOOT_CMD(
shield, 6, 1, do_shieldmode,
"Set the shield mode",
"dualcan termination [on|off] [on|off]\n"
"shield dualcan-passive\n"
"shield comio mode [rs232|rs485] termination [on|off]\n"
);

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@ -1,26 +0,0 @@
/**@file /home/eichenberger/projects/nbhw16/u-boot/board/nm/netbird_v2/shield.h
* @author eichenberger
* @version 704
* @date
* Created: Wed 31 May 2017 02:56:16 PM CEST \n
* Last Update: Wed 31 May 2017 02:56:16 PM CEST
*/
#ifndef SHIELD_H
#define SHIELD_H
#define SHIELD_COM_IO 0
#define SHIELD_DUALCAN 1
#define SHIELD_CAN_GNSS 2
#define SHIELD_DUALCAN_PASSIVE 3
struct shield_t{
char name[64];
int (*setmode)(char * const argv[], int argc);
};
int shield_setmode(int mode);
void shield_register(struct shield_t *shield);
int shield_gpio_request_as_input(unsigned int gpio, const char *label);
#endif // SHIELD_H

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@ -1,214 +0,0 @@
#undef DEBUG
#include <common.h>
#include <asm/gpio.h>
#include <asm/arch/mux.h>
#include "shield.h"
#include "board.h"
#define CAN_PORTS 2
#define NETBIRD_GPIO_RST_SHIELD_N GPIO_TO_PIN(0, 27)
#define NETBIRD_GPIO_LATCH GPIO_TO_PIN(0, 7)
#define NETBIRD_GPIO_MODE_0 GPIO_TO_PIN(1, 10)
#define NETBIRD_GPIO_MODE_1 GPIO_TO_PIN(1, 8)
static int shield_slot_initialized = 0;
static struct module_pin_mux can_shield_netbird_pin_mux_config[] = {
/* Leave UART0 unconfigured because we want to configure it as needed by linux (can/spi/uart/etc) */
{OFFSET(uart0_ctsn), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (E18) gpio1_8 */ /* Mode 0 */
{OFFSET(uart0_rxd), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (E15) gpio1_10 */ /* Mode 1 */
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (C18) eCAP0_in_PWM0_out.gpio0[7] */ /* Latch EN */
{-1},
};
static struct module_pin_mux can_shield_netbird_pin_mux_final[] = {
{OFFSET(uart0_txd), (MODE(2) | PULLUDDIS | RXACTIVE)}, /* (E16) dcan0_rx */
{OFFSET(uart0_rxd), (MODE(2) | PULLUDEN | PULLUP_EN)}, /* (E15) dcan0_tx */
{OFFSET(uart0_rtsn), (MODE(2) | PULLUDDIS | RXACTIVE)}, /* (E17) dcan1_rx */
{OFFSET(uart0_ctsn), (MODE(2) | PULLUDEN | PULLUP_EN)}, /* (E18) dcan1_tx */
{-1},
};
static int request_gpios(void)
{
int ret;
debug("Shield configure gpios\n");
ret = shield_gpio_request_as_input(NETBIRD_GPIO_RST_SHIELD_N, "shield-rst");
if ((ret < 0))
return -1;
ret = shield_gpio_request_as_input(NETBIRD_GPIO_LATCH, "shield-load");
if ((ret < 0))
return -1;
ret = shield_gpio_request_as_input(NETBIRD_GPIO_MODE_0, "shield-mode0");
if ((ret < 0))
return -1;
ret = shield_gpio_request_as_input(NETBIRD_GPIO_MODE_1, "shield-mode1");
if ((ret < 0))
return -1;
shield_slot_initialized = 1;
return 0;
}
static int configure_shieldmode(int mode)
{
int ret;
if (mode < 0 || mode > 3) {
debug("Invalid shield mode %d\n", mode);
return -1;
}
debug("Shield type dualcan\n");
debug ("Set shield mode to %d\n", mode);
if (!shield_slot_initialized) {
if (request_gpios()) {
puts("Failed to request gpios\n");
return -1;
}
}
debug("Configure shield pin muxing for configuration\n");
configure_module_pin_mux(can_shield_netbird_pin_mux_config);
debug("Make sure shield module is in reset\n");
ret = gpio_direction_output(NETBIRD_GPIO_RST_SHIELD_N, 0);
if (ret < 0) {
puts("Can not set shield-rst as output\n");
return -1;
}
udelay(10);
debug("Set latch to high\n");
ret = gpio_direction_output(NETBIRD_GPIO_LATCH, 1);
if (ret < 0) {
puts("Can not set shield-load as output\n");
return -1;
}
udelay(10);
debug("Write mode to GPIOs\n");
ret = gpio_direction_output(NETBIRD_GPIO_MODE_0, mode & 0x01);
if (ret < 0) {
puts("Can not set shield-mode0 as output\n");
return -1;
}
ret = gpio_direction_output(NETBIRD_GPIO_MODE_1, mode & 0x02);
if (ret < 0) {
puts("Can not set shield-mode1 as output\n");
return -1;
}
udelay(10);
debug("Set latch to low\n");
gpio_set_value(NETBIRD_GPIO_LATCH, 0);
udelay(10);
debug("Set mode0 and mode1 to highz again\n");
ret = gpio_direction_input(NETBIRD_GPIO_MODE_0);
if ((ret < 0)) {
puts("Could not configure shield slot mode0 gpio as input\n");
return -1;
}
ret = gpio_direction_input(NETBIRD_GPIO_MODE_1);
if ((ret < 0)) {
puts("Could not configure shield slot mode1 gpio as input\n");
return -1;
}
udelay(10);
debug("Take shield out of reset\n");
gpio_set_value(NETBIRD_GPIO_RST_SHIELD_N, 1);
udelay(10);
debug("Set final can shield muxing\n");
configure_module_pin_mux(can_shield_netbird_pin_mux_final);
return 0;
}
static int get_termination(const char* termination)
{
if (strcmp("on", termination) == 0) {
return 1;
}
else if (strcmp("off", termination) == 0) {
return 0;
}
debug ("Invalid termination mode %s (falling back to off)", termination);
return -1;
}
static int get_mode_from_args(char * const argv[], int argc)
{
int terminations[CAN_PORTS];
int i;
assert(argc == (CAN_PORTS + 1));
if (strcmp ("termination", argv[0])) {
debug("The only option for dualcan is terminations\n");
return -1;
}
for (i = 0; i < CAN_PORTS; i ++) {
terminations[i] = get_termination(argv[i + 1]);
if (terminations[i] < 0) {
return -1;
}
}
/* Termination is inverse */
/* TODO: Double check */
return (!terminations[0] << 0) | (!terminations[1] << 1);
}
static int set_shieldmode(char * const argv[], int argc)
{
if (argc != 3) {
debug("Too few arguments for dualcan\n");
return -1;
}
return configure_shieldmode(get_mode_from_args(argv, argc));
}
static int no_options(char * const argv[], int argc)
{
if (argc != 0) {
debug("Too many arguments\n");
return -1;
}
return 0;
}
static struct shield_t can_shield = {
"dualcan", set_shieldmode
};
void can_shield_init(void)
{
shield_register(&can_shield);
}
static struct shield_t can_shield_passive = {
"dualcan-passive", no_options
};
void can_shield_passive_init(void)
{
shield_register(&can_shield_passive);
}

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@ -1,10 +0,0 @@
#ifndef SHIELD_CAN_H
#define SHIELD_CAN_H
int shield_can_init(void);
int shield_can_setmode(int mode);
void can_shield_init(void);
void can_shield_passive_init(void);
#endif // SHIELD_CAN_H

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@ -1,252 +0,0 @@
#undef DEBUG
#include <common.h>
#include <asm/gpio.h>
#include <asm/arch/mux.h>
#include "shield.h"
#include "board.h"
/* TODO: Double Check */
#define NETBIRD_GPIO_RST_SHIELD_N GPIO_TO_PIN(0, 27)
#define NETBIRD_GPIO_LOAD GPIO_TO_PIN(1, 9)
/* TODO: Who configures UART0_RTSn, GPIO1_9 ? */
#define NETBIRD_GPIO_MODE_0 GPIO_TO_PIN(1, 11)
#define NETBIRD_GPIO_MODE_1 GPIO_TO_PIN(1, 10)
static int shield_slot_initialized = 0;
/* TODO: Naming -> config, final */
static struct module_pin_mux shield_gpio_netbird_pin_mux[] = {
{OFFSET(uart0_rxd), (MODE(7) | PULLUDDIS)}, /* (E15) gpio1_10 */ /* Mode 0 */
{OFFSET(uart0_txd), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (E16) gpio1_11 */ /* Mode 1 */
{-1},
};
static struct module_pin_mux shield_gpio_safe_netbird_pin_mux[] = {
/* Leave UART0 unconfigured (GPIO) because we want to configure it as needed by linux (can/spi/uart/etc) */
{OFFSET(uart0_rxd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E15) gpio1_10 */ /* Mode 0 */
{OFFSET(uart0_txd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E16) gpio1_11 */ /* Mode 1 */
{-1},
};
static int request_gpios(void)
{
int ret;
debug("Extension slot init\n");
ret = shield_gpio_request_as_input(NETBIRD_GPIO_RST_SHIELD_N, "shield-rst");
if ((ret < 0))
return -1;
ret = shield_gpio_request_as_input(NETBIRD_GPIO_LOAD, "shield-load");
if ((ret < 0))
return -1;
ret = shield_gpio_request_as_input(NETBIRD_GPIO_MODE_0, "shield-mode0");
if ((ret < 0))
return -1;
ret = shield_gpio_request_as_input(NETBIRD_GPIO_MODE_1, "shield-mode1");
if ((ret < 0))
return -1;
shield_slot_initialized = 1;
return 0;
}
static int configure_shieldmode(int mode)
{
int ret;
if (mode < 0 || mode > 3) {
debug ("Invalid shield mode %d\n", mode);
return -1;
}
debug("Shield type comio\n");
debug ("Set shield mode to %d\n", mode);
if (!shield_slot_initialized) {
if (request_gpios()) {
puts("Failed to request gpios\n");
return -1;
}
}
debug("Make sure shield module is in reset\n");
ret = gpio_direction_output(NETBIRD_GPIO_RST_SHIELD_N, 0);
if (ret < 0) {
puts("Can not set shield-rst as output\n");
return -1;
}
udelay(10);
debug("Enable gpio pull-ups\n");
configure_module_pin_mux(shield_gpio_netbird_pin_mux);
debug("Set load to low\n");
ret = gpio_direction_output(NETBIRD_GPIO_LOAD, 0);
if (ret < 0) {
puts("Can not set shield-load as output\n");
return -1;
}
udelay(10);
debug("Write mode to GPIOs\n");
ret = gpio_direction_output(NETBIRD_GPIO_MODE_0, mode & 0x01);
if (ret < 0) {
puts("Can not set shield-mode0 as output\n");
return -1;
}
ret = gpio_direction_output(NETBIRD_GPIO_MODE_1, mode & 0x02);
if (ret < 0) {
puts("Can not set shield-mode1 as output\n");
return -1;
}
udelay(10);
debug("Set load to high\n");
gpio_set_value(NETBIRD_GPIO_LOAD, 1);
udelay(10);
debug("Set mode0 and mode1 to highz again\n");
ret = gpio_direction_input(NETBIRD_GPIO_MODE_0);
if ((ret < 0)) {
puts("Could not configure shield slot mode0 gpio as input\n");
return -1;
}
ret = gpio_direction_input(NETBIRD_GPIO_MODE_1);
if ((ret < 0)) {
puts("Could not configure shield slot mode1 gpio as input\n");
return -1;
}
udelay(10);
debug("Disable pullups on shield gpios\n");
configure_module_pin_mux(shield_gpio_safe_netbird_pin_mux);
udelay(10);
debug("Take shield out of reset\n");
gpio_set_value(NETBIRD_GPIO_RST_SHIELD_N, 1);
udelay(10);
debug("Set gpio load as input again\n");
ret = gpio_direction_input(NETBIRD_GPIO_LOAD);
if (ret < 0) {
puts("Can not configure shield slot load as input");
return -1;
}
return 0;
}
enum mode_nr {
RS232,
RS485,
UNKNOWN
};
struct mode {
enum mode_nr nr;
const char* name;
int argc;
};
struct mode modes[] = {
{ RS232, "rs232", 0 },
{ RS485, "rs485", 2 }
};
static const struct mode *get_mode(const char *mode)
{
int i;
for (i = 0; i < ARRAY_SIZE(modes); i++) {
if (strcmp(modes[i].name, mode) == 0) {
return &modes[i];
}
}
return NULL;
}
static int get_termination(const char* termination)
{
if (strcmp("on", termination) == 0) {
return 1;
}
else if (strcmp("off", termination) == 0) {
return 0;
}
debug ("Invalid termination mode %s (falling back to off)", termination);
return -1;
}
static int get_mode_from_args(char * const argv[], int argc)
{
int termination = 0;
int rs232 = 0;
const struct mode *selected_mode;
assert(argc >= 2);
if (strcmp ("mode", argv[0])) {
debug("Invalid arguments (see help)\n");
return -1;
}
selected_mode = get_mode(argv[1]);
if (selected_mode == NULL) {
debug("Mode %s not supported\n", argv[1]);
return -1;
}
debug ("Mode %s, index %d, argc %d\n", selected_mode->name,
selected_mode->nr, selected_mode->argc);
if (selected_mode->argc != argc - 2) {
debug("Invalid argument count for mode %s (should %d is %d)\n",
argv[1], selected_mode->argc, argc - 2);
return -1;
}
if (selected_mode->nr == RS485) {
if (strcmp("termination", argv[2])) {
debug("Invalid arguments, do not configure termination\n");
return -1;
}
termination = get_termination(argv[3]);
if (termination < 0) {
debug("Invalid termination %s\n", argv[3]);
return -1;
}
}
else {
rs232 = 1;
}
/* Termination is inverse */
return (rs232 << 0) | ((!termination) << 1);
}
int set_shieldmode(char * const argv[], int argc)
{
if (argc < 2) {
debug("Too few arguments for comio\n");
return -1;
}
/* -1 will make configure_shieldmode to faile and is okay therefore */
return configure_shieldmode(get_mode_from_args(argv, argc));
}
/* TODO: Static ? */
struct shield_t comio_shield = {
"comio", set_shieldmode
};
void comio_shield_init(void)
{
shield_register(&comio_shield);
}

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@ -1,6 +0,0 @@
#ifndef SHIELD_COMIO_H
#define SHIELD_COMIO_H
void comio_shield_init(void);
#endif // SHIELD_COMIO_H

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@ -1,158 +0,0 @@
/*
* Copyright (c) 2004-2008 Texas Instruments
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
*(.__image_copy_start)
*(.vectors)
CPUDIR/start.o (.text*)
board/nm/nrhw20/built-in.o (.text*)
*(.text*)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : {
*(.data*)
}
. = ALIGN(4);
. = .;
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
. = ALIGN(4);
.__efi_runtime_start : {
*(.__efi_runtime_start)
}
.efi_runtime : {
*(efi_runtime_text)
*(efi_runtime_data)
}
.__efi_runtime_stop : {
*(.__efi_runtime_stop)
}
.efi_runtime_rel_start :
{
*(.__efi_runtime_rel_start)
}
.efi_runtime_rel : {
*(.relefi_runtime_text)
*(.relefi_runtime_data)
}
.efi_runtime_rel_stop :
{
*(.__efi_runtime_rel_stop)
}
. = ALIGN(4);
.image_copy_end :
{
*(.__image_copy_end)
}
.rel_dyn_start :
{
*(.__rel_dyn_start)
}
.rel.dyn : {
*(.rel*)
}
.rel_dyn_end :
{
*(.__rel_dyn_end)
}
.hash : { *(.hash*) }
.end :
{
*(.__end)
}
_image_binary_end = .;
/*
* Deprecated: this MMU section is used by pxa at present but
* should not be used by new boards/CPUs.
*/
. = ALIGN(4096);
.mmutable : {
*(.mmutable)
}
/*
* Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
* __bss_base and __bss_limit are for linker only (overlay ordering)
*/
.bss_start __rel_dyn_start (OVERLAY) : {
KEEP(*(.__bss_start));
__bss_base = .;
}
.bss __bss_base (OVERLAY) : {
*(.bss*)
. = ALIGN(4);
__bss_limit = .;
}
.bss_end __bss_limit (OVERLAY) : {
KEEP(*(.__bss_end));
}
.dynsym _image_binary_end : { *(.dynsym) }
.dynbss : { *(.dynbss) }
.dynstr : { *(.dynstr*) }
.dynamic : { *(.dynamic*) }
.gnu.hash : { *(.gnu.hash) }
.plt : { *(.plt*) }
.interp : { *(.interp*) }
.gnu : { *(.gnu*) }
.ARM.exidx : { *(.ARM.exidx*) }
}

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@ -1,26 +0,0 @@
if TARGET_AM335X_NRHW24
config SYS_BOARD
default "nrhw24"
config SYS_VENDOR
default "nm"
config SYS_SOC
default "am33xx"
config SYS_CONFIG_NAME
default "am335x_nrhw24"
config CONS_INDEX
int "UART used for console"
range 1 6
default 2
help
The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
in documentation, etc) available to it. Depending on your specific
board you may want something other than UART0 as for example the IDK
uses UART3 so enter 4 here.
endif

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@ -1,13 +0,0 @@
#
# Makefile
#
# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
#
# SPDX-License-Identifier: GPL-2.0+
#
ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
obj-y += board.o ../common/bdparser.o ../common/board_descriptor.o ../common/da9063.o shield.o shield_can.o shield_comio.o fileaccess.o

File diff suppressed because it is too large Load Diff

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@ -1,28 +0,0 @@
/*
* board.h
*
* TI AM335x boards information header
*
* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* We have three pin mux functions that must exist. We must be able to enable
* uart0, for initial output and i2c2 to read the main EEPROM. We then have a
* main pinmux function that can be overridden to enable all other pinmux that
* is required on the board.
*/
void enable_uart0_pin_mux(void);
void disable_uart0_pin_mux(void);
void enable_uart1_pin_mux(void);
void enable_board_pin_mux(void);
#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
#endif

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@ -1,40 +0,0 @@
#include <common.h>
#include <fs.h>
#define BLOCK_DEVICE "mmc"
#define OVERLAY_PART "1:3"
int read_file(const char* filename, char *buf, int size)
{
loff_t filesize = 0;
loff_t len;
int ret;
if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
puts("Error, can not set blk device\n");
return -1;
}
/* Read at most file size bytes */
if (fs_size(filename, &filesize)) {
return -1;
}
if (filesize < size)
size = filesize;
/* For very unclear reasons the block device needs to be set again after the call to fs_size() */
if (fs_set_blk_dev(BLOCK_DEVICE, OVERLAY_PART, FS_TYPE_EXT) != 0) {
puts("Error, can not set blk device\n");
return -1;
}
if ((ret = fs_read(filename, (ulong)buf, 0, size, &len))) {
printf("Can't read file %s (size %d, len %lld, ret %d)\n", filename, size, len, ret);
return -1;
}
buf[len] = 0;
return len;
}

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@ -1,14 +0,0 @@
/**@file /home/eichenberger/projects/nbhw16/u-boot/board/nm/netbird_v2/fileaccess.h
* @author eichenberger
* @version 704
* @date
* Created: Tue 06 Jun 2017 02:02:33 PM CEST \n
* Last Update: Tue 06 Jun 2017 02:02:33 PM CEST
*/
#ifndef FILEACCESS_H
#define FILEACCESS_H
void fs_set_console(void);
int read_file(const char* filename, char *buf, int size);
#endif // FILEACCESS_H

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@ -1,233 +0,0 @@
/*
* mux.c
*
* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
#include <asm/io.h>
#include "board.h"
static struct module_pin_mux gpio_pin_mux[] = {
/*
* CPU GPIOs
*
* (A17) GPIO0_2: RST_GNSS~
* (A16) GPIO0_5: EXTINT_GNSS
* (C15) GPIO0_6: TIMEPULSE
* (C18) GPIO0_7: PWM / SHIELD LATCH
* (J18) GPIO0_16: RST_PHY~
* (U12) GPIO0_27: RST_SHIELD~
*
* (R14) GPIO1_20: BT_EN
* (V15) GPIO1_21: GSM_PWR_EN
* (U16) GPIO1_25: RST_GSM
* (T16) GPIO1_26: WLAN_EN
* (V17) GPIO1_27: WLAN_IRQ
*
* (C12) GPIO3_17: SIM_SEL
*/
/* Bank 0 */
{OFFSET(spi0_sclk), (MODE(7) | PULLUDDIS)}, /* (A17) gpio0[2] */ /* RST_GNSS */
{OFFSET(spi0_cs0), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (A16) gpio0[5] */ /* EXTINT_GNSS */
{OFFSET(spi0_cs1), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (C15) gpio0[6] */ /* TIMEPULSE */
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (C18) gpio0[7] */ /* IO_SHIELD */
{OFFSET(mii1_txd3), (MODE(7) | PULLUDDIS)}, /* (J18) gpio0[16] */ /* RST_PHY~ */
{OFFSET(gpmc_ad11), (MODE(7) | PULLUDDIS)}, /* (U12) gpio0[27] */ /* RST_SHIELD~ */
/* Bank 1 */
{OFFSET(gpmc_a4), (MODE(7) | PULLUDDIS)}, /* (R14) gpio1[20] */ /* BT_EN */
{OFFSET(gpmc_a5), (MODE(7) | PULLUDDIS)}, /* (V15) gpio1[21] */ /* GSM_PWR_EN */
{OFFSET(gpmc_a9), (MODE(7) | PULLUDDIS)}, /* (U16) gpio1[25] */ /* RST_GSM */
{OFFSET(gpmc_a10), (MODE(7) | PULLUDDIS)}, /* (T16) gpio1[26] */ /* WLAN_EN */
{OFFSET(gpmc_a11), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (V17) gpio1[27] */ /* WLAN_IRQ */
/* TODO: What about all the unused GPMC pins ? */
/* Bank 2 */
#if 0
/* TODO: What is this meant for? */
{OFFSET(lcd_data3), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (R4) gpio2[9] */ /* SYSBOOT_3 */
{OFFSET(lcd_data4), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (T1) gpio2[10] */ /* SYSBOOT_4 */
/* TODO: Check other unued pins from sysboot block */
/* Ensure PU/PD does not work against external signal */
/*
* SYSBOOT 0,1,5,12,13 = Low
* SYSBOOT 2 = High
*/
#endif
/* Bank 3 */
{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDEN | PULLDOWN_EN)}, /* (C12) gpio3[17] */ /* SIM_SEL */
{-1}
};
/* I2C0 PMIC */
static struct module_pin_mux i2c0_pin_mux[] = {
{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (C17) I2C0_SDA */
{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (C16) I2C0_SCL */
{-1}
};
/* I2C2 System */
static struct module_pin_mux i2c2_pin_mux[] = {
{OFFSET(uart1_rtsn), (MODE(3) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (D17) I2C2_SCL */
{OFFSET(uart1_ctsn), (MODE(3) | RXACTIVE | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (D18) I2C2_SDA */
{-1},
};
/* RMII1: Ethernet */
static struct module_pin_mux rmii1_pin_mux[] = {
/* RMII */
{OFFSET(mii1_crs), MODE(1) | PULLUDDIS | RXACTIVE}, /* (H17) rmii1_crs */
{OFFSET(mii1_rxerr), MODE(7) | PULLUDEN | PULLDOWN_EN | RXACTIVE}, /* (J15) gpio */
{OFFSET(mii1_rxd0), MODE(1) | PULLUDDIS | RXACTIVE}, /* (M16) rmii1_rxd0 */
{OFFSET(mii1_rxd1), MODE(1) | PULLUDDIS | RXACTIVE}, /* (L15) rmii1_rxd1 */
{OFFSET(mii1_txen), MODE(1) | PULLUDDIS}, /* (J16) rmii1_txen */
{OFFSET(mii1_txd0), MODE(1) | PULLUDDIS}, /* (K17) rmii1_txd0 */
{OFFSET(mii1_txd1), MODE(1) | PULLUDDIS}, /* (K16) rmii1_txd1 */
{OFFSET(rmii1_refclk), MODE(0) | PULLUDDIS | RXACTIVE}, /* (H18) rmii1_refclk */
/* SMI */
{OFFSET(mdio_clk), MODE(0) | PULLUDDIS}, /* (M18) mdio_clk */
{OFFSET(mdio_data), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE}, /* (M17) mdio_data */
/* 25MHz Clock Output */
{OFFSET(xdma_event_intr0), MODE(3)}, /* (A15) clkout1 (25 MHz clk for PHY) */
{-1}
};
/* MMC0: WiFi */
static struct module_pin_mux mmc0_sdio_pin_mux[] = {
{OFFSET(mmc0_clk), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G17) MMC0_CLK */
{OFFSET(mmc0_cmd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G18) MMC0_CMD */
{OFFSET(mmc0_dat0), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G16) MMC0_DAT0 */
{OFFSET(mmc0_dat1), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (G15) MMC0_DAT1 */
{OFFSET(mmc0_dat2), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (F18) MMC0_DAT2 */
{OFFSET(mmc0_dat3), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (F17) MMC0_DAT3 */
{-1}
};
/* MMC1: eMMC */
static struct module_pin_mux mmc1_emmc_pin_mux[] = {
{OFFSET(gpmc_csn1), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U9) MMC1_CLK */
{OFFSET(gpmc_csn2), (MODE(2) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V9) MMC1_CMD */
{OFFSET(gpmc_ad0), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U7) MMC1_DAT0 */
{OFFSET(gpmc_ad1), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V7) MMC1_DAT1 */
{OFFSET(gpmc_ad2), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R8) MMC1_DAT2 */
{OFFSET(gpmc_ad3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T8) MMC1_DAT3 */
{OFFSET(gpmc_ad4), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U8) MMC1_DAT4 */
{OFFSET(gpmc_ad5), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V8) MMC1_DAT5 */
{OFFSET(gpmc_ad6), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (R9) MMC1_DAT6 */
{OFFSET(gpmc_ad7), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (T9) MMC1_DAT7 */
{-1}
};
/* USB_DRVBUS not used -> configure as GPIO */
static struct module_pin_mux usb_pin_mux[] = {
{OFFSET(usb0_drvvbus), (MODE(7) | PULLUDDIS)}, /* (F16) USB0_DRVVBUS */
{OFFSET(usb1_drvvbus), (MODE(7) | PULLUDDIS)}, /* (F15) USB1_DRVVBUS */
{-1}
};
/* UART0: RS232/RS485 shield mode */
static struct module_pin_mux uart0_pin_mux[] = {
{OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (E15) UART0_RXD */
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (E16) UART0_TXD */
{-1},
};
/* UART0: Shield I/F (UART, CAN) */
/* Leave UART0 unconfigured because we want to configure it as needed by Linux (can/spi/uart/etc) */
/* Mode 7 = GPIO */
static struct module_pin_mux uart0_disabled_pin_mux[] = {
{OFFSET(uart0_rxd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E15) GPIO1_10 */
{OFFSET(uart0_txd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E16) GPIO1_11 */
{OFFSET(uart0_ctsn), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E18) GPIO1_8 */
{OFFSET(uart0_rtsn), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (E17) GPIO1_9 */
{-1},
};
/* UART1: User (Debug/Console) */
static struct module_pin_mux uart1_pin_mux[] = {
{OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (D16) uart1_rxd */
{OFFSET(uart1_txd), (MODE(0) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (D15) uart1_txd */
{-1},
};
/* UART3: GNSS */
static struct module_pin_mux uart3_pin_mux[] = {
{OFFSET(mii1_rxd3), (MODE(1) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (L17) UART3_RXD */
{OFFSET(mii1_rxd2), (MODE(1) | PULLUDEN | PULLUP_EN | SLEWCTRL)}, /* (L16) UART3_TXD */
{-1}
};
/* UART5: Highspeed UART for Bluetooth (no SLEWCTRL) */
static struct module_pin_mux uart5_pin_mux[] = {
{OFFSET(lcd_data9), (MODE(4) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (U2) UART5_RXD */
{OFFSET(lcd_data8), (MODE(4) | PULLUDEN | PULLUP_EN)}, /* (U1) UART5_TXD */
{OFFSET(lcd_data14), (MODE(6) | PULLUDEN | PULLUP_EN | RXACTIVE)}, /* (V4) uart5_ctsn */
{OFFSET(lcd_data15), (MODE(6) | PULLUDEN | PULLUP_EN)}, /* (T5) uart5_rtsn */
{-1}
};
static struct module_pin_mux unused_pin_mux[] = {
/* SYSBOOT6, 7, 10, 11: Not used pulldown active, receiver disabled */
{OFFSET(lcd_data6), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
{OFFSET(lcd_data7), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
{OFFSET(lcd_data10), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
{OFFSET(lcd_data11), (MODE(7) | PULLUDEN | PULLDOWN_EN)},
/* TODO: GPMCA1..3, A6..8 */
{-1}
};
void enable_board_pin_mux(void)
{
configure_module_pin_mux(gpio_pin_mux);
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_sdio_pin_mux);
configure_module_pin_mux(mmc1_emmc_pin_mux);
configure_module_pin_mux(usb_pin_mux);
configure_module_pin_mux(i2c0_pin_mux);
configure_module_pin_mux(i2c2_pin_mux);
configure_module_pin_mux(uart3_pin_mux);
configure_module_pin_mux(uart5_pin_mux);
configure_module_pin_mux(unused_pin_mux);
}
void enable_uart0_pin_mux(void)
{
configure_module_pin_mux(uart0_pin_mux);
}
void disable_uart0_pin_mux(void)
{
configure_module_pin_mux(uart0_disabled_pin_mux);
}
void enable_uart1_pin_mux(void)
{
configure_module_pin_mux(uart1_pin_mux);
}

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@ -1,74 +0,0 @@
#undef DEBUG
#include <common.h>
#include <asm/gpio.h>
#include <asm/arch/mux.h>
#include "shield.h"
#include "board.h"
#define MAX_SHIELDS 16
static struct shield_t *shields[MAX_SHIELDS];
static int shield_count = 0;
/* Perhaps this function shouldn't leave in shields.c? */
int shield_gpio_request_as_input(unsigned int gpio, const char *label)
{
int ret;
ret = gpio_request(gpio, label);
if ((ret < 0)) {
printf("Could not request shield slot %s gpio\n", label);
return -1;
}
ret = gpio_direction_input(gpio);
if ((ret < 0)) {
printf("Could not configure shield slot %s gpio as input\n", label);
return -1;
}
return 0;
}
void shield_register(struct shield_t *shield)
{
if (shield_count >= MAX_SHIELDS) {
printf("Max shield count reached (%d), please increment MAX_SHIELDS\n", MAX_SHIELDS);
return;
}
shields[shield_count++] = shield;
}
int shield_set_mode(const char* shield_type, int argc, char * const argv[])
{
int i;
for (i = 0; i < shield_count; i++) {
if (strcmp(shield_type, shields[i]->name) == 0) {
return shields[i]->setmode(argv, argc);
}
}
printf("## Error: No %s shield installed\n", shield_type);
/* Do not return error, to not show usage (request by rs) */
return 0;
}
static int do_shieldmode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
if (argc < 2) {
return -1;
}
return shield_set_mode(argv[1], argc - 2, &argv[2]);
}
U_BOOT_CMD(
shield, 6, 1, do_shieldmode,
"Set the shield mode",
"dualcan termination [on|off] [on|off]\n"
"shield dualcan-passive\n"
"shield comio mode [rs232|rs485] termination [on|off]\n"
);

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@ -1,26 +0,0 @@
/**@file /home/eichenberger/projects/nbhw16/u-boot/board/nm/netbird_v2/shield.h
* @author eichenberger
* @version 704
* @date
* Created: Wed 31 May 2017 02:56:16 PM CEST \n
* Last Update: Wed 31 May 2017 02:56:16 PM CEST
*/
#ifndef SHIELD_H
#define SHIELD_H
#define SHIELD_COM_IO 0
#define SHIELD_DUALCAN 1
#define SHIELD_CAN_GNSS 2
#define SHIELD_DUALCAN_PASSIVE 3
struct shield_t{
char name[64];
int (*setmode)(char * const argv[], int argc);
};
int shield_setmode(int mode);
void shield_register(struct shield_t *shield);
int shield_gpio_request_as_input(unsigned int gpio, const char *label);
#endif // SHIELD_H

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@ -1,214 +0,0 @@
#undef DEBUG
#include <common.h>
#include <asm/gpio.h>
#include <asm/arch/mux.h>
#include "shield.h"
#include "board.h"
#define CAN_PORTS 2
#define NETBIRD_GPIO_RST_SHIELD_N GPIO_TO_PIN(0, 27)
#define NETBIRD_GPIO_LATCH GPIO_TO_PIN(0, 7)
#define NETBIRD_GPIO_MODE_0 GPIO_TO_PIN(1, 10)
#define NETBIRD_GPIO_MODE_1 GPIO_TO_PIN(1, 8)
static int shield_slot_initialized = 0;
static struct module_pin_mux can_shield_netbird_pin_mux_config[] = {
/* Leave UART0 unconfigured because we want to configure it as needed by linux (can/spi/uart/etc) */
{OFFSET(uart0_ctsn), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (E18) gpio1_8 */ /* Mode 0 */
{OFFSET(uart0_rxd), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (E15) gpio1_10 */ /* Mode 1 */
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (C18) eCAP0_in_PWM0_out.gpio0[7] */ /* Latch EN */
{-1},
};
static struct module_pin_mux can_shield_netbird_pin_mux_final[] = {
{OFFSET(uart0_txd), (MODE(2) | PULLUDDIS | RXACTIVE)}, /* (E16) dcan0_rx */
{OFFSET(uart0_rxd), (MODE(2) | PULLUDEN | PULLUP_EN)}, /* (E15) dcan0_tx */
{OFFSET(uart0_rtsn), (MODE(2) | PULLUDDIS | RXACTIVE)}, /* (E17) dcan1_rx */
{OFFSET(uart0_ctsn), (MODE(2) | PULLUDEN | PULLUP_EN)}, /* (E18) dcan1_tx */
{-1},
};
static int request_gpios(void)
{
int ret;
debug("Shield configure gpios\n");
ret = shield_gpio_request_as_input(NETBIRD_GPIO_RST_SHIELD_N, "shield-rst");
if ((ret < 0))
return -1;
ret = shield_gpio_request_as_input(NETBIRD_GPIO_LATCH, "shield-load");
if ((ret < 0))
return -1;
ret = shield_gpio_request_as_input(NETBIRD_GPIO_MODE_0, "shield-mode0");
if ((ret < 0))
return -1;
ret = shield_gpio_request_as_input(NETBIRD_GPIO_MODE_1, "shield-mode1");
if ((ret < 0))
return -1;
shield_slot_initialized = 1;
return 0;
}
static int configure_shieldmode(int mode)
{
int ret;
if (mode < 0 || mode > 3) {
debug("Invalid shield mode %d\n", mode);
return -1;
}
debug("Shield type dualcan\n");
debug ("Set shield mode to %d\n", mode);
if (!shield_slot_initialized) {
if (request_gpios()) {
puts("Failed to request gpios\n");
return -1;
}
}
debug("Configure shield pin muxing for configuration\n");
configure_module_pin_mux(can_shield_netbird_pin_mux_config);
debug("Make sure shield module is in reset\n");
ret = gpio_direction_output(NETBIRD_GPIO_RST_SHIELD_N, 0);
if (ret < 0) {
puts("Can not set shield-rst as output\n");
return -1;
}
udelay(10);
debug("Set latch to high\n");
ret = gpio_direction_output(NETBIRD_GPIO_LATCH, 1);
if (ret < 0) {
puts("Can not set shield-load as output\n");
return -1;
}
udelay(10);
debug("Write mode to GPIOs\n");
ret = gpio_direction_output(NETBIRD_GPIO_MODE_0, mode & 0x01);
if (ret < 0) {
puts("Can not set shield-mode0 as output\n");
return -1;
}
ret = gpio_direction_output(NETBIRD_GPIO_MODE_1, mode & 0x02);
if (ret < 0) {
puts("Can not set shield-mode1 as output\n");
return -1;
}
udelay(10);
debug("Set latch to low\n");
gpio_set_value(NETBIRD_GPIO_LATCH, 0);
udelay(10);
debug("Set mode0 and mode1 to highz again\n");
ret = gpio_direction_input(NETBIRD_GPIO_MODE_0);
if ((ret < 0)) {
puts("Could not configure shield slot mode0 gpio as input\n");
return -1;
}
ret = gpio_direction_input(NETBIRD_GPIO_MODE_1);
if ((ret < 0)) {
puts("Could not configure shield slot mode1 gpio as input\n");
return -1;
}
udelay(10);
debug("Take shield out of reset\n");
gpio_set_value(NETBIRD_GPIO_RST_SHIELD_N, 1);
udelay(10);
debug("Set final can shield muxing\n");
configure_module_pin_mux(can_shield_netbird_pin_mux_final);
return 0;
}
static int get_termination(const char* termination)
{
if (strcmp("on", termination) == 0) {
return 1;
}
else if (strcmp("off", termination) == 0) {
return 0;
}
debug ("Invalid termination mode %s (falling back to off)", termination);
return -1;
}
static int get_mode_from_args(char * const argv[], int argc)
{
int terminations[CAN_PORTS];
int i;
assert(argc == (CAN_PORTS + 1));
if (strcmp ("termination", argv[0])) {
debug("The only option for dualcan is terminations\n");
return -1;
}
for (i = 0; i < CAN_PORTS; i ++) {
terminations[i] = get_termination(argv[i + 1]);
if (terminations[i] < 0) {
return -1;
}
}
/* Termination is inverse */
/* TODO: Double check */
return (!terminations[0] << 0) | (!terminations[1] << 1);
}
static int set_shieldmode(char * const argv[], int argc)
{
if (argc != 3) {
debug("Too few arguments for dualcan\n");
return -1;
}
return configure_shieldmode(get_mode_from_args(argv, argc));
}
static int no_options(char * const argv[], int argc)
{
if (argc != 0) {
debug("Too many arguments\n");
return -1;
}
return 0;
}
static struct shield_t can_shield = {
"dualcan", set_shieldmode
};
void can_shield_init(void)
{
shield_register(&can_shield);
}
static struct shield_t can_shield_passive = {
"dualcan-passive", no_options
};
void can_shield_passive_init(void)
{
shield_register(&can_shield_passive);
}

View File

@ -1,10 +0,0 @@
#ifndef SHIELD_CAN_H
#define SHIELD_CAN_H
int shield_can_init(void);
int shield_can_setmode(int mode);
void can_shield_init(void);
void can_shield_passive_init(void);
#endif // SHIELD_CAN_H

View File

@ -1,252 +0,0 @@
#undef DEBUG
#include <common.h>
#include <asm/gpio.h>
#include <asm/arch/mux.h>
#include "shield.h"
#include "board.h"
/* TODO: Double Check */
#define NETBIRD_GPIO_RST_SHIELD_N GPIO_TO_PIN(0, 27)
#define NETBIRD_GPIO_LOAD GPIO_TO_PIN(1, 9)
/* TODO: Who configures UART0_RTSn, GPIO1_9 ? */
#define NETBIRD_GPIO_MODE_0 GPIO_TO_PIN(1, 11)
#define NETBIRD_GPIO_MODE_1 GPIO_TO_PIN(1, 10)
static int shield_slot_initialized = 0;
/* TODO: Naming -> config, final */
static struct module_pin_mux shield_gpio_netbird_pin_mux[] = {
{OFFSET(uart0_rxd), (MODE(7) | PULLUDDIS)}, /* (E15) gpio1_10 */ /* Mode 0 */
{OFFSET(uart0_txd), (MODE(7) | PULLUDEN | PULLUP_EN)}, /* (E16) gpio1_11 */ /* Mode 1 */
{-1},
};
static struct module_pin_mux shield_gpio_safe_netbird_pin_mux[] = {
/* Leave UART0 unconfigured (GPIO) because we want to configure it as needed by linux (can/spi/uart/etc) */
{OFFSET(uart0_rxd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E15) gpio1_10 */ /* Mode 0 */
{OFFSET(uart0_txd), (MODE(7) | PULLUDDIS | RXACTIVE)}, /* (E16) gpio1_11 */ /* Mode 1 */
{-1},
};
static int request_gpios(void)
{
int ret;
debug("Extension slot init\n");
ret = shield_gpio_request_as_input(NETBIRD_GPIO_RST_SHIELD_N, "shield-rst");
if ((ret < 0))
return -1;
ret = shield_gpio_request_as_input(NETBIRD_GPIO_LOAD, "shield-load");
if ((ret < 0))
return -1;
ret = shield_gpio_request_as_input(NETBIRD_GPIO_MODE_0, "shield-mode0");
if ((ret < 0))
return -1;
ret = shield_gpio_request_as_input(NETBIRD_GPIO_MODE_1, "shield-mode1");
if ((ret < 0))
return -1;
shield_slot_initialized = 1;
return 0;
}
static int configure_shieldmode(int mode)
{
int ret;
if (mode < 0 || mode > 3) {
debug ("Invalid shield mode %d\n", mode);
return -1;
}
debug("Shield type comio\n");
debug ("Set shield mode to %d\n", mode);
if (!shield_slot_initialized) {
if (request_gpios()) {
puts("Failed to request gpios\n");
return -1;
}
}
debug("Make sure shield module is in reset\n");
ret = gpio_direction_output(NETBIRD_GPIO_RST_SHIELD_N, 0);
if (ret < 0) {
puts("Can not set shield-rst as output\n");
return -1;
}
udelay(10);
debug("Enable gpio pull-ups\n");
configure_module_pin_mux(shield_gpio_netbird_pin_mux);
debug("Set load to low\n");
ret = gpio_direction_output(NETBIRD_GPIO_LOAD, 0);
if (ret < 0) {
puts("Can not set shield-load as output\n");
return -1;
}
udelay(10);
debug("Write mode to GPIOs\n");
ret = gpio_direction_output(NETBIRD_GPIO_MODE_0, mode & 0x01);
if (ret < 0) {
puts("Can not set shield-mode0 as output\n");
return -1;
}
ret = gpio_direction_output(NETBIRD_GPIO_MODE_1, mode & 0x02);
if (ret < 0) {
puts("Can not set shield-mode1 as output\n");
return -1;
}
udelay(10);
debug("Set load to high\n");
gpio_set_value(NETBIRD_GPIO_LOAD, 1);
udelay(10);
debug("Set mode0 and mode1 to highz again\n");
ret = gpio_direction_input(NETBIRD_GPIO_MODE_0);
if ((ret < 0)) {
puts("Could not configure shield slot mode0 gpio as input\n");
return -1;
}
ret = gpio_direction_input(NETBIRD_GPIO_MODE_1);
if ((ret < 0)) {
puts("Could not configure shield slot mode1 gpio as input\n");
return -1;
}
udelay(10);
debug("Disable pullups on shield gpios\n");
configure_module_pin_mux(shield_gpio_safe_netbird_pin_mux);
udelay(10);
debug("Take shield out of reset\n");
gpio_set_value(NETBIRD_GPIO_RST_SHIELD_N, 1);
udelay(10);
debug("Set gpio load as input again\n");
ret = gpio_direction_input(NETBIRD_GPIO_LOAD);
if (ret < 0) {
puts("Can not configure shield slot load as input");
return -1;
}
return 0;
}
enum mode_nr {
RS232,
RS485,
UNKNOWN
};
struct mode {
enum mode_nr nr;
const char* name;
int argc;
};
struct mode modes[] = {
{ RS232, "rs232", 0 },
{ RS485, "rs485", 2 }
};
static const struct mode *get_mode(const char *mode)
{
int i;
for (i = 0; i < ARRAY_SIZE(modes); i++) {
if (strcmp(modes[i].name, mode) == 0) {
return &modes[i];
}
}
return NULL;
}
static int get_termination(const char* termination)
{
if (strcmp("on", termination) == 0) {
return 1;
}
else if (strcmp("off", termination) == 0) {
return 0;
}
debug ("Invalid termination mode %s (falling back to off)", termination);
return -1;
}
static int get_mode_from_args(char * const argv[], int argc)
{
int termination = 0;
int rs232 = 0;
const struct mode *selected_mode;
assert(argc >= 2);
if (strcmp ("mode", argv[0])) {
debug("Invalid arguments (see help)\n");
return -1;
}
selected_mode = get_mode(argv[1]);
if (selected_mode == NULL) {
debug("Mode %s not supported\n", argv[1]);
return -1;
}
debug ("Mode %s, index %d, argc %d\n", selected_mode->name,
selected_mode->nr, selected_mode->argc);
if (selected_mode->argc != argc - 2) {
debug("Invalid argument count for mode %s (should %d is %d)\n",
argv[1], selected_mode->argc, argc - 2);
return -1;
}
if (selected_mode->nr == RS485) {
if (strcmp("termination", argv[2])) {
debug("Invalid arguments, do not configure termination\n");
return -1;
}
termination = get_termination(argv[3]);
if (termination < 0) {
debug("Invalid termination %s\n", argv[3]);
return -1;
}
}
else {
rs232 = 1;
}
/* Termination is inverse */
return (rs232 << 0) | ((!termination) << 1);
}
int set_shieldmode(char * const argv[], int argc)
{
if (argc < 2) {
debug("Too few arguments for comio\n");
return -1;
}
/* -1 will make configure_shieldmode to faile and is okay therefore */
return configure_shieldmode(get_mode_from_args(argv, argc));
}
/* TODO: Static ? */
struct shield_t comio_shield = {
"comio", set_shieldmode
};
void comio_shield_init(void)
{
shield_register(&comio_shield);
}

View File

@ -1,6 +0,0 @@
#ifndef SHIELD_COMIO_H
#define SHIELD_COMIO_H
void comio_shield_init(void);
#endif // SHIELD_COMIO_H

View File

@ -1,158 +0,0 @@
/*
* Copyright (c) 2004-2008 Texas Instruments
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
*(.__image_copy_start)
*(.vectors)
CPUDIR/start.o (.text*)
board/nm/nrhw24/built-in.o (.text*)
*(.text*)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : {
*(.data*)
}
. = ALIGN(4);
. = .;
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
. = ALIGN(4);
.__efi_runtime_start : {
*(.__efi_runtime_start)
}
.efi_runtime : {
*(efi_runtime_text)
*(efi_runtime_data)
}
.__efi_runtime_stop : {
*(.__efi_runtime_stop)
}
.efi_runtime_rel_start :
{
*(.__efi_runtime_rel_start)
}
.efi_runtime_rel : {
*(.relefi_runtime_text)
*(.relefi_runtime_data)
}
.efi_runtime_rel_stop :
{
*(.__efi_runtime_rel_stop)
}
. = ALIGN(4);
.image_copy_end :
{
*(.__image_copy_end)
}
.rel_dyn_start :
{
*(.__rel_dyn_start)
}
.rel.dyn : {
*(.rel*)
}
.rel_dyn_end :
{
*(.__rel_dyn_end)
}
.hash : { *(.hash*) }
.end :
{
*(.__end)
}
_image_binary_end = .;
/*
* Deprecated: this MMU section is used by pxa at present but
* should not be used by new boards/CPUs.
*/
. = ALIGN(4096);
.mmutable : {
*(.mmutable)
}
/*
* Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
* __bss_base and __bss_limit are for linker only (overlay ordering)
*/
.bss_start __rel_dyn_start (OVERLAY) : {
KEEP(*(.__bss_start));
__bss_base = .;
}
.bss __bss_base (OVERLAY) : {
*(.bss*)
. = ALIGN(4);
__bss_limit = .;
}
.bss_end __bss_limit (OVERLAY) : {
KEEP(*(.__bss_end));
}
.dynsym _image_binary_end : { *(.dynsym) }
.dynbss : { *(.dynbss) }
.dynstr : { *(.dynstr*) }
.dynamic : { *(.dynamic*) }
.gnu.hash : { *(.gnu.hash) }
.plt : { *(.plt*) }
.interp : { *(.interp*) }
.gnu : { *(.gnu*) }
.ARM.exidx : { *(.ARM.exidx*) }
}

View File

@ -69,3 +69,14 @@ U_BOOT_CMD(
""
);
#endif
#ifdef CONFIG_CMD_NB_TEST
extern int do_hwreset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
U_BOOT_CMD(
hwreset, 1, 0, do_hwreset,
"Perform HARD RESET of the CPU",
""
);
#endif /* CONFIG_CMD_NB_TEST */

View File

@ -58,7 +58,7 @@ static int fdt_value_setenv(const void *nodep, int len, const char *var)
else if (len == 4) {
char buf[11];
sprintf(buf, "0x%08X", *(uint32_t *)nodep);
sprintf(buf, "0x%08X", fdt32_to_cpu(*(fdt32_t *)nodep));
setenv(var, buf);
} else if (len%4 == 0 && len <= 20) {
/* Needed to print things like sha1 hashes. */
@ -740,7 +740,7 @@ static int fdt_parse_prop(char * const *newval, int count, char *data, int *len)
cp = newp;
tmp = simple_strtoul(cp, &newp, 0);
*(__be32 *)data = __cpu_to_be32(tmp);
*(fdt32_t *)data = cpu_to_fdt32(tmp);
data += 4;
*len += 4;

View File

@ -24,29 +24,6 @@ static uint last_devad_hi;
static uint last_reg_lo;
static uint last_reg_hi;
static int mdio_wait_for_link(struct phy_device *phydev, struct mii_dev *bus)
{
int link;
int res;
printf("waiting for link up on %s\n", bus->name);
phy_startup(phydev);
link = phydev->link;
if (link) {
printf("link up\n");
res = 0;
}
else {
printf("no link\n");
res = 1;
}
return res;
}
static int extract_range(char *input, int *plo, int *phi)
{
char *end;
@ -214,7 +191,6 @@ static int do_mdio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
struct mii_dev *bus;
struct phy_device *phydev = NULL;
int extended = 0;
int res = 0;
if (argc < 2)
return CMD_RET_USAGE;
@ -237,14 +213,7 @@ static int do_mdio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
if (flag & CMD_FLAG_REPEAT)
op[0] = last_op[0];
if (strcmp(argv[1], "up") == 0) {
if (argc >= 3) {
phydev = mdio_phydev_for_ethname(argv[2]);
} else {
return CMD_RET_USAGE;
}
}
else if (strlen(argv[1]) > 1) {
if (strlen(argv[1]) > 1) {
op[1] = argv[1][1];
if (op[1] == 'x') {
phydev = mdio_phydev_for_ethname(argv[2]);
@ -305,10 +274,6 @@ static int do_mdio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
mdio_read_ranges(phydev, bus, addrlo, addrhi, devadlo, devadhi,
reglo, reghi, extended);
break;
case 'u':
res = mdio_wait_for_link(phydev, bus);
break;
}
/*
@ -323,7 +288,7 @@ static int do_mdio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
last_reg_hi = reghi;
last_data = data;
return res;
return 0;
}
/***************************************************/
@ -340,7 +305,6 @@ U_BOOT_CMD(
"read PHY's extended register at <devad>.<reg>\n"
"mdio wx <phydev> [<devad>.]<reg> <data> - "
"write PHY's extended register at <devad>.<reg>\n"
"mdio up <phydev> - wait for PHY link to become ready (up)\n"
"<phydev> may be:\n"
" <busname> <addr>\n"
" <addr>\n"

View File

@ -620,7 +620,7 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
char initrd_str[22];
char mac_str[29] = "";
char ip_str[68] = "";
int bootm_argc = 2;
int bootm_argc = 3;
int len = 0;
ulong kernel_addr;
void *buf;
@ -652,6 +652,8 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
strcpy(bootm_argv[2], getenv("ramdisk_addr_r"));
strcat(bootm_argv[2], ":");
strcat(bootm_argv[2], getenv("filesize"));
} else {
bootm_argv[2] = "-";
}
if (get_relfile_envaddr(cmdtp, label->kernel, "kernel_addr_r") < 0) {
@ -783,11 +785,8 @@ static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
if (!bootm_argv[3])
bootm_argv[3] = getenv("fdt_addr");
if (bootm_argv[3]) {
if (!bootm_argv[2])
bootm_argv[2] = "-";
if (bootm_argv[3])
bootm_argc = 4;
}
kernel_addr = genimg_get_kernel_addr(bootm_argv[1]);
buf = map_sysmem(kernel_addr, 0);

View File

@ -888,10 +888,8 @@ static init_fnc_t init_sequence_f[] = {
init_timebase,
#endif
init_baud_rate, /* initialze baudrate settings */
#if !defined(CONFIG_PRE_CONSOLE_BUFFER)
serial_init, /* serial communications setup */
console_init_f, /* stage 1 init of console */
#endif
#ifdef CONFIG_SANDBOX
sandbox_early_getopt_check,
#endif

View File

@ -414,7 +414,7 @@ int tstc(void)
#define PRE_CONSOLE_FLUSHPOINT2_EVERYTHING_BUT_SERIAL 1
#ifdef CONFIG_PRE_CONSOLE_BUFFER
#define CIRC_BUF_IDX(idx) ((idx) % (unsigned long)(CONFIG_PRE_CON_BUF_SZ))
#define CIRC_BUF_IDX(idx) ((idx) % (unsigned long)CONFIG_PRE_CON_BUF_SZ)
static void pre_console_putc(const char c)
{

View File

@ -13,21 +13,8 @@
#include <console.h>
#include <version.h>
#ifdef CONFIG_NM_LOGIN
#include <fs.h>
#include <u-boot/md5.h>
#include <malloc.h>
#include <crypt.h>
/* Set defaults for passwd file location */
#ifndef CONFIG_NM_LOGIN_PART
#define CONFIG_NM_LOGIN_PART "1:3"
#endif
#ifndef CONFIG_NM_LOGIN_PASSWD
#define CONFIG_NM_LOGIN_PASSWD "/root/boot/bootpass"
#endif
#endif
DECLARE_GLOBAL_DATA_PTR;
@ -38,103 +25,74 @@ __weak void show_boot_progress(int val) {}
#ifdef CONFIG_NM_LOGIN
/****************************************************************************
* check if ubootpwd exists in data partition and perform a login,
* otherwise continue booting
*/
int login (void)
{
#define MAX_TRIES_ENTER 4096
#define PASSWORD_LEN 256
char stored_pw_hash[PASSWORD_LEN];
char password[PASSWORD_LEN];
#define PASS_LEN 256
char stored[16];
char buf[PASS_LEN], entered[16];
int res, i, tries;
int legacy_md5 = 0;
loff_t actread;
char c;
puts("\nautoboot has been stopped, press 'e' to enter: ");
for (i=0; i<=MAX_TRIES_ENTER; i++) {
c = getc();
if (c == 'e' || c == '\n') {
for (i=0; i<=4096; i++) {
buf[0] = getc();
if (buf[0] == 'e' || buf[0] == '\n') {
puts("e");
break;
}
/* Enter condition not given -> restart */
if (i == MAX_TRIES_ENTER)
return 0;
if (i == 4096) return 0;
}
puts("\n");
/* Try to get password hash file */
memset(stored_pw_hash, 0x0, sizeof(stored_pw_hash));
if (fs_set_blk_dev("mmc", CONFIG_NM_LOGIN_PART, FS_TYPE_EXT) != 0) {
puts("Error, can not set blk device\n");
return 1;
}
memset(stored, 0x0, sizeof(stored));
res = fs_read(CONFIG_NM_LOGIN_PASSWD, (ulong)stored_pw_hash, 0, sizeof(stored_pw_hash), &actread);
if ((res != 0) || (actread <= 0)) {
/* no file or hash found -> allow login w/o password */
if (fs_set_blk_dev("mmc", "1:3", FS_TYPE_EXT) != 0) {
puts("Error, can not set blk devicet");
return 1;
}
res = fs_read("/root/boot/bootpass", (ulong)stored, 0, sizeof(stored), &actread);
if ((res!=0) || (actread != sizeof(stored))) {
/* no file or md5 hash found */
puts("Login succeeded\n\n");
return 1;
} else if (actread == 16) {
legacy_md5 = 1;
}
for (tries = 1; ; tries++) {
puts("\nEnter password: ");
/* TODO: no backspace ? */
/* TODO: rename buf to something more useful */
/* TODO: print a dot or blind? */
password[0] = 0;
for (i=0; i<PASSWORD_LEN; i++) {
password[i] = getc();
if (password[i] == '\r' || password[i] == '\n') {
password[i] = 0;
buf[0] = 0;
for (i=0; i<PASS_LEN; i++) {
buf[i] = getc();
if (buf[i] == '\r' || buf[i] == '\n') {
buf[i] = 0;
break;
}
}
password[PASSWORD_LEN-1] = 0;
buf[PASS_LEN-1] = 0;
if (strlen(password) > 0) {
if (strlen(buf) > 0) {
puts("\n");
if (legacy_md5) {
/* MD5 - legacy */
char entered[32]; /* TODO: Why 32, MD5 algo uses only 16 bytes */
md5((unsigned char *)password, strlen(password), (unsigned char *)entered);
if (memcmp(stored_pw_hash, entered, 16) == 0) {
break;
md5((unsigned char*) buf, strlen(buf), (unsigned char *)entered);
if (memcmp(stored, entered, 16) == 0) {
break;
} else {
puts("Login incorrect\n");
if (tries == 3) {
return 0;
}
}
else {
/* SHA256 */
char *cp = sha_crypt(password, stored_pw_hash); /* TODO: Salt = PW? */
res = memcmp(cp, stored_pw_hash, actread);
free(cp);
if (res == 0)
break;
}
/* TODO: exponentional delay */
puts("Login incorrect\n");
if (tries == 3) {
return 0;
}
}
/* TODO: remove password from memory !!!!! */
memset(password, 0, sizeof(password));
}
/* succeeded */
puts("Login succeeded\n\n");
return 1;
}

View File

@ -18,10 +18,7 @@
#include <malloc.h>
#include <dm/root.h>
#include <linux/compiler.h>
#ifdef CONFIG_NRSW_BUILD
#include <spl_version_autogenerated.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
@ -457,11 +454,7 @@ void preloader_console_init(void)
gd->have_console = 1;
#ifdef CONFIG_NRSW_BUILD
puts("\n" SPL_VERSION "\n");
#else
puts("\n");
#endif
puts("U-Boot SPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
U_BOOT_TIME ")\n");
#ifdef CONFIG_SPL_DISPLAY_PRINT

View File

@ -15,165 +15,26 @@
#include <errno.h>
#include <mmc.h>
#include <image.h>
#include <crc.h>
DECLARE_GLOBAL_DATA_PTR;
#define UBOOT_MIN_SIZE_BYTES (128*1024)
#define UBOOT_MAX_SIZE_BYTES (2500*1024)
#if defined(CONFIG_NM_BOOTLOADER_FORMAT)
static int image_nm_header_ok(const struct nm_header *header)
{
u32 start_tag = __be32_to_cpu(header->nm_start_tag);
u32 length = __be32_to_cpu(header->nm_length);
if ((start_tag == 0x424c5354) &&
(length >= UBOOT_MIN_SIZE_BYTES) && (length <= UBOOT_MAX_SIZE_BYTES))
{
return 0;
}
else {
return -EFAULT;
}
}
static int mmc_load_netmodule(struct mmc *mmc, ulong sector,
const struct nm_header *header)
{
u32 nm_header_size = sizeof(struct nm_header) -sizeof(struct image_header);
const struct image_header *im_header;
const __be32* end_tag_position;
u32 image_size_sectors;
unsigned long count;
u32 end_tag;
int ret;
im_header = &(header->header);
/* decode header and fill out spl_image structure */
ret = spl_parse_image_header(im_header);
if (ret) {
return ret;
}
/*
* convert size to sectors - round up,
* add 256 bytes for NetModule header, 4 bytes for NetModule trailer
*/
image_size_sectors = (spl_image.size + nm_header_size + sizeof(u32) +
mmc->read_bl_len - 1) /
mmc->read_bl_len;
/*
* Read the header too to avoid extra memcpy,
* compensate the load address for the NetModule header
*/
count = blk_dread(mmc_get_blk_desc(mmc), sector, image_size_sectors,
(void *)(ulong)spl_image.load_addr - nm_header_size);
debug("read %x sectors to %x\n", image_size_sectors,
spl_image.load_addr);
if (count != image_size_sectors) {
puts(", read error");
return -EIO;
}
/* Check NetModule end tag to be sure image is completely written */
end_tag_position = (const __be32*)(spl_image.load_addr + spl_image.size);
end_tag = __be32_to_cpu(*end_tag_position);
if (end_tag != 0x424c454e) {
puts(", end marker fail");
return -EFAULT;
}
puts(", end marker ok");
return 0;
}
static int mmc_load_image_raw_sector_netmodule(struct mmc *mmc, unsigned long sector)
{
unsigned long count;
struct nm_header *header;
int ret = 0;
printf("Checking NM U-Boot at sector 0x%lx: ", sector);
header = (struct nm_header *)(CONFIG_SYS_TEXT_BASE -
sizeof(struct nm_header));
/* read image header to find the image size and load address */
count = blk_dread(mmc_get_blk_desc(mmc), sector, 1, header);
debug("hdr read sector %lx, count=%lu\n", sector, count);
if (count == 0) {
ret = -EIO;
goto end;
}
if (image_nm_header_ok(header)) {
puts("hdr fail");
ret = -EFAULT;
goto end;
}
puts("hdr ok");
ret = mmc_load_netmodule(mmc, sector, header);
end:
if (ret) {
puts(" -> skipping\n");
return -1;
}
puts("\n");
return 0;
}
#endif /* CONFIG_NM_BOOTLOADER_FORMAT) */
static int mmc_load_legacy(struct mmc *mmc, ulong sector,
struct image_header *header)
{
u32 header_size = sizeof(struct image_header);
u32 image_size_sectors;
u32 image_size_bytes;
u32 data_crc;
u32 data_crc_memory;
unsigned long count;
int ret;
/*
* Note: spl_parse_image_header() always returns 0
* Own header check required here.
*/
if (image_get_magic(header) != IH_MAGIC) {
puts("hdr fail");
return -EFAULT;
}
int nm_additional_header_bytes;
int nm_additional_trailer_bytes;
ret = spl_parse_image_header(header);
if (ret)
return ret;
puts("hdr ok");
/* TODO: This assumes a header is present (e.g. no PPC images) */
/* Could also check spl_image.flags & SPL_COPY_PAYLOAD_ONLY above */
image_size_bytes = __be32_to_cpu(header->ih_size);
data_crc = __be32_to_cpu(header->ih_dcrc);
if ((image_size_bytes < UBOOT_MIN_SIZE_BYTES) || (image_size_bytes > UBOOT_MAX_SIZE_BYTES)) {
puts(", data len fail");
return -EFAULT;
}
puts(", data len ok");
nm_additional_header_bytes = sizeof(struct nm_header) - sizeof(struct image_header);
nm_additional_trailer_bytes = sizeof(__be32);
spl_image.load_addr -= nm_additional_header_bytes;
spl_image.size += nm_additional_header_bytes + nm_additional_trailer_bytes;
/* convert size to sectors - round up */
image_size_sectors = (spl_image.size + mmc->read_bl_len - 1) /
@ -182,22 +43,10 @@ static int mmc_load_legacy(struct mmc *mmc, ulong sector,
/* Read the header too to avoid extra memcpy */
count = blk_dread(mmc_get_blk_desc(mmc), sector, image_size_sectors,
(void *)(ulong)spl_image.load_addr);
debug("read %x sectors to %x\n", image_size_sectors,
spl_image.load_addr);
if (count != image_size_sectors) {
puts(", read error");
if (count != image_size_sectors)
return -EIO;
}
/* Check data CRC */
data_crc_memory = crc32(0, (const u8*)(spl_image.load_addr + header_size), image_size_bytes);
if (data_crc_memory != data_crc) {
puts(", data crc fail");
return -EFAULT;
}
puts(", data crc ok");
return 0;
}
@ -212,28 +61,32 @@ static ulong h_spl_load_read(struct spl_load_info *load, ulong sector,
static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector)
{
const unsigned int START_MAGIC = 0x424c5354;
const unsigned int END_MAGIC = 0x424c454e;
unsigned long count;
struct nm_header *nm_header;
struct image_header *header;
int ret = 0;
__be32* end_tag_position;
printf("Checking U-Boot at sector 0x%lx: ", sector);
header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
sizeof(struct image_header));
nm_header = (struct nm_header *)(CONFIG_SYS_TEXT_BASE -
sizeof(struct nm_header));
/* read image header to find the image size & load address */
count = blk_dread(mmc_get_blk_desc(mmc), sector, 1, header);
count = blk_dread(mmc_get_blk_desc(mmc), sector, 1, nm_header);
debug("hdr read sector %lx, count=%lu\n", sector, count);
if (count == 0) {
/*
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
puts("mmc_load_image_raw_sector: mmc block read error\n");
#endif
*/
ret = -EIO;
goto end;
}
if (be32_to_cpu(nm_header->nm_start_tag) != START_MAGIC) return -1;
if (be32_to_cpu(nm_header->nm_length)>10000000) return -1;
end_tag_position = (__be32*)(((void*)nm_header) + sizeof(struct nm_header) - sizeof(struct image_header) + (be32_to_cpu(nm_header->nm_length)));
header = &(nm_header->header);
if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
image_get_magic(header) == FDT_MAGIC) {
struct spl_load_info load;
@ -249,13 +102,17 @@ static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector)
ret = mmc_load_legacy(mmc, sector, header);
}
if (be32_to_cpu(*end_tag_position) != END_MAGIC) return -1;
end:
if (ret) {
puts(" -> skipping\n");
#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
puts("mmc_load_image_raw_sector: mmc block read error\n");
#endif
return -1;
}
puts("\n");
printf("Found valid u-boot image at sector %ld\n", sector);
return 0;
}
@ -486,36 +343,14 @@ int spl_mmc_load_image(u32 boot_device)
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION);
if (!err)
return err;
#if defined(CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR)
#if defined(CONFIG_NM_BOOTLOADER_FORMAT)
/* Try to load NetModule packed bootloader from main location */
err = mmc_load_image_raw_sector_netmodule(mmc,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
if (!err)
return err; /* found -> ok */
#endif
/* Try to load bootloader from main location */
err = mmc_load_image_raw_sector(mmc,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR);
if (err)
err = mmc_load_image_raw_sector(mmc,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR_ALTERNATE);
if (!err)
return err; /* found -> ok */
#if defined(CONFIG_NM_BOOTLOADER_FORMAT)
/* Try to load NetModule packed bootloader from alternate location */
err = mmc_load_image_raw_sector_netmodule(mmc,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR_ALTERNATE);
if (!err)
return err; /* found -> ok */
#endif
/* Try to load regular bootloader from alternate location */
err = mmc_load_image_raw_sector(mmc,
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR_ALTERNATE);
if (!err) {
return err; /* found -> ok */
}
return err;
#endif
/* If RAW mode fails, try FS mode. */
case MMCSD_MODE_FS:

View File

@ -1,49 +0,0 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_HW25=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press s to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_STOP_STR="s"
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_DFU_TFTP=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
CONFIG_G_DNL_VENDOR_NUM=0x0451
CONFIG_G_DNL_PRODUCT_NUM=0xd022
CONFIG_OF_LIBFDT=y
# CONFIG_BOOTP_PXE_CLIENTARCH is not set
# CONFIG_CMD_PXE is not set
# CONFIG_CMD_BOOTEFI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ELF is not set
# CONFIG_FPGA is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_PMIC is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set

View File

@ -1,49 +0,0 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_NMHW21=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press s to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_STOP_STR="s"
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_DFU_TFTP=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
CONFIG_G_DNL_VENDOR_NUM=0x0451
CONFIG_G_DNL_PRODUCT_NUM=0xd022
CONFIG_OF_LIBFDT=y
# CONFIG_BOOTP_PXE_CLIENTARCH is not set
# CONFIG_CMD_PXE is not set
# CONFIG_CMD_BOOTEFI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ELF is not set
# CONFIG_FPGA is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_PMIC is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set

View File

@ -1,49 +0,0 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_NRHW20=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press s to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_STOP_STR="s"
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_DFU_TFTP=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
CONFIG_G_DNL_VENDOR_NUM=0x0451
CONFIG_G_DNL_PRODUCT_NUM=0xd022
CONFIG_OF_LIBFDT=y
# CONFIG_BOOTP_PXE_CLIENTARCH is not set
# CONFIG_CMD_PXE is not set
# CONFIG_CMD_BOOTEFI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ELF is not set
# CONFIG_FPGA is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_PMIC is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set

View File

@ -1,49 +0,0 @@
CONFIG_ARM=y
CONFIG_TARGET_AM335X_NRHW24=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
CONFIG_HUSH_PARSER=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press s to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_STOP_STR="s"
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_DFU_TFTP=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
CONFIG_G_DNL_VENDOR_NUM=0x0451
CONFIG_G_DNL_PRODUCT_NUM=0xd022
CONFIG_OF_LIBFDT=y
# CONFIG_BOOTP_PXE_CLIENTARCH is not set
# CONFIG_CMD_PXE is not set
# CONFIG_CMD_BOOTEFI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_ELF is not set
# CONFIG_FPGA is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_PMIC is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set

View File

@ -420,10 +420,8 @@ static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
}
if (status == 0 || (status & I2C_STAT_NACK)) {
i2c_error = 1;
#ifdef CONFIG_NRSW_BUILD
printf("i2c_read: error waiting for addr ACK (status=0x%x)\n",
status);
#endif
goto rd_exit;
}
if (alen) {
@ -738,7 +736,7 @@ U_BOOT_I2C_ADAP_COMPLETE(omap24_1, omap24_i2c_init, omap24_i2c_probe,
#endif
U_BOOT_I2C_ADAP_COMPLETE(omap24_2, omap24_i2c_init, omap24_i2c_probe,
omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed,
omap24_i2c_read, omap24_i2c_write, NULL,
CONFIG_SYS_OMAP24_I2C_SPEED2,
CONFIG_SYS_OMAP24_I2C_SLAVE2,
2)
@ -751,7 +749,7 @@ U_BOOT_I2C_ADAP_COMPLETE(omap24_2, omap24_i2c_init, omap24_i2c_probe,
#endif
U_BOOT_I2C_ADAP_COMPLETE(omap24_3, omap24_i2c_init, omap24_i2c_probe,
omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed,
omap24_i2c_read, omap24_i2c_write, NULL,
CONFIG_SYS_OMAP24_I2C_SPEED3,
CONFIG_SYS_OMAP24_I2C_SLAVE3,
3)
@ -764,7 +762,7 @@ U_BOOT_I2C_ADAP_COMPLETE(omap24_3, omap24_i2c_init, omap24_i2c_probe,
#endif
U_BOOT_I2C_ADAP_COMPLETE(omap24_4, omap24_i2c_init, omap24_i2c_probe,
omap24_i2c_read, omap24_i2c_write, omap24_i2c_setspeed,
omap24_i2c_read, omap24_i2c_write, NULL,
CONFIG_SYS_OMAP24_I2C_SPEED4,
CONFIG_SYS_OMAP24_I2C_SLAVE4,
4)

View File

@ -6,7 +6,6 @@
#
obj-$(CONFIG_BITBANGMII) += miiphybb.o
obj-$(CONFIG_MV88E60XX_SWITCH) += mv88e60xx.o
obj-$(CONFIG_MV88E61XX_SWITCH) += mv88e61xx.o
obj-$(CONFIG_MV88E6352_SWITCH) += mv88e6352.o

File diff suppressed because it is too large Load Diff

View File

@ -222,12 +222,6 @@ int genphy_update_link(struct phy_device *phydev)
{
unsigned int mii_reg;
#ifdef __CONFIG_AM335X_NRHW20_H
/* TODO: Check and remove this NRHW20 work around */
phydev->link = 1;
return 0;
#endif
/*
* Wait if the link is up, and autonegotiation is in progress
* (ie - we're capable and it's not done)
@ -467,9 +461,6 @@ static LIST_HEAD(phy_drivers);
int phy_init(void)
{
#ifdef CONFIG_MV88E60XX_SWITCH
phy_mv88e60xx_init();
#endif
#ifdef CONFIG_MV88E61XX_SWITCH
phy_mv88e61xx_init();
#endif

View File

@ -27,17 +27,6 @@ static const unsigned long baudrate_table[] = CONFIG_SYS_BAUDRATE_TABLE;
#error "Serial is required before relocation - define CONFIG_SYS_MALLOC_F_LEN to make this work"
#endif
#ifdef CONFIG_CONS_INDEX
static int console_index = CONFIG_CONS_INDEX - 1;
#else
static int console_index = 0;
#endif
void serial_set_console_index(int index)
{
console_index = index;
}
static void serial_find_console_or_panic(void)
{
const void *blob = gd->fdt_blob;
@ -95,12 +84,18 @@ static void serial_find_console_or_panic(void)
* extremis just the first serial device we can find. But we
* insist on having a console (even if it is silent).
*/
if (!uclass_get_device_by_seq(UCLASS_SERIAL, console_index, &dev) ||
!uclass_get_device(UCLASS_SERIAL, console_index, &dev) ||
#ifdef CONFIG_CONS_INDEX
#define INDEX (CONFIG_CONS_INDEX - 1)
#else
#define INDEX 0
#endif
if (!uclass_get_device_by_seq(UCLASS_SERIAL, INDEX, &dev) ||
!uclass_get_device(UCLASS_SERIAL, INDEX, &dev) ||
(!uclass_first_device(UCLASS_SERIAL, &dev) && dev)) {
gd->cur_serial_dev = dev;
return;
}
#undef INDEX
}
#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
@ -120,9 +115,7 @@ int serial_init(void)
/* Called after relocation */
void serial_initialize(void)
{
#if !defined(CONFIG_PRE_CONSOLE_BUFFER)
serial_init();
#endif
}
static void _serial_putc(struct udevice *dev, char ch)

View File

@ -307,6 +307,8 @@ int fs_read(const char *filename, ulong addr, loff_t offset, loff_t len,
unmap_sysmem(buf);
/* If we requested a specific number of bytes, check we got it */
if (ret == 0 && len && *actread != len)
printf("** %s shorter than offset + len **\n", filename);
fs_close();
return ret;

View File

@ -1,320 +0,0 @@
/*
* am335x_hw25.h
*
* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __CONFIG_AM335X_HW25_H
#define __CONFIG_AM335X_HW25_H
#include <configs/ti_am335x_common.h>
/* Disable U-Boot load from filesystems, to save around 10 kB SPL image size */
#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
# undef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
#endif
#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
#undef CONFIG_HW_WATCHDOG
#undef CONFIG_OMPAP_WATCHDOG
#undef CONFIG_SPL_WATCHDOG_SUPPORT
#ifndef CONFIG_SPL_BUILD
# define CONFIG_TIMESTAMP
# define CONFIG_LZO
#endif
#define CONFIG_SYS_BOOTM_LEN (16 << 20)
#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
#define CONFIG_BOARD_LATE_INIT
/* TODO: It could be preconsole buffer is not properly working in SPL
* Observed lock ups when printing too much text.
#define CONFIG_PRE_CONSOLE_BUFFER
#define CONFIG_PRE_CON_BUF_ADDR 0x80000000
#define CONFIG_PRE_CON_BUF_SZ 64*1024
*/
/* Clock Defines */
#define V_OSCK 0 /* 0 means detect from sysboot1 config */
#define V_SCLK (V_OSCK)
#include <config_distro_bootcmd.h>
/* Dynamic override for PHY_ANEG_TIMEOUT value */
#ifndef CONFIG_SPL_BUILD
# ifndef __ASSEMBLER__
int eth_phy_timeout(void);
# endif
#endif
#define PHY_ANEG_TIMEOUT eth_phy_timeout()
#define PHY_ANEG_DEFAULT_TIMEOUT 5000
#define CONFIG_ARP_TIMEOUT 200
#undef CONFIG_NET_RETRY_COUNT
#define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_BOOTP_MAY_FAIL
#ifndef CONFIG_SPL_BUILD
/*
* Memory map for booting Linux
*
* 0x80000000 32MB KERNEL_ADDR (kernel_addr), kernel execution address
* 0x82000000 190MB KERNEL_ADDR_R (kernel_addr_r), FIT image/kernel loading address
* kernel will be relocated kernel_addr
* for FIT images, ramdisc and dtb will be relocated to
* top of bootmemory (0x8e000000 downwards)
* 0x8BE00000 1MB FDT_ADDR_R (fdt_addr_r), device tree if separate from kernel/FIT
* 0x8BF00000 1MB PXE_ADDR (pxefile_addr_r), pxe configuration file (pxe get command)
* 0x8C000000 32MB LOAD_ADDR (load_addr), loading address for generic files
* <end of boot memory>
* 0x8E000000 4B NRSW reset reason
* 32MB <>, Free space
* 0x90000000 256MB <>, Free space, 512MB systems
* 0xA0000000 512MB <>, Free space, 1GB systems only
* 0xC0000000 End of RAM
*/
#define KERNEL_ADDR "0x80000000"
#define KERNEL_ADDR_R "0x82000000"
#define FDT_ADDR_R "0x8BE00000"
#define PXE_ADDR "0x8BF00000"
#define LOAD_ADDR "0x8C000000"
/*
* Limit boot memory to 256 MBytes to comply with kernel initial memory layout
* This is the official way to restrict image load addresses.
* Don't use xx_high_addr variables.
*/
#define BOOTM_SIZE "0x0E000000"
/* Set boot command depending of software environment */
#ifndef CONFIG_NRSW_BUILD
/* Yocto/OSTree boot command */
#define MAIN_BOOTCMD "run boot_ostree"
#else
/* NRSW boot command */
#define MAIN_BOOTCMD "run sdboot"
#endif
/* TODO: Might need to check ti_cpsw.rx_packet_max when running on top of AM335x switch */
#define CONFIG_EXTRA_ENV_SETTINGS \
/* Memory Adresses */ \
"fdt_addr_r=" FDT_ADDR_R "\0" \
"kernel_addr=" KERNEL_ADDR "\0" /* NRSW only */ \
"kernel_addr_r=" KERNEL_ADDR_R "\0" \
"load_addr=" LOAD_ADDR "\0" \
"pxefile_addr_r=" PXE_ADDR "\0" \
"bootm_size=" BOOTM_SIZE "\0" \
\
/* Misc */ \
"defaultconsole=ttyS0\0" \
"fdt_skip_update=yes\0" \
"bootdelay=0\0" \
\
/* Networking */ \
"ethprime=cpsw\0" \
"ethopts=ti_cpsw.rx_packet_max=1526\0" \
"ipaddr=192.168.1.1\0" \
"serverip=192.168.1.254\0" \
"tftptimeout=2000\0" \
"tftptimeoutcountmax=5\0" \
"bootpretryperiod=10000\0" \
"autoload=false\0" \
\
/* OSTree boot */ \
"bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; " \
"setenv bootargs_prev $bootargs; " \
"env import -t $load_addr $filesize; setenv bootargs $bootargs_prev $bootargs root=/dev/ram0 console=$defaultconsole,115200 " \
"$ethopts rw ostree_root=/dev/mmcblk1p1\0" \
"bootcmd_rd_in_mmc=ext4load mmc 1:1 $kernel_addr_r /boot$kernel_image; " \
"bootm $kernel_addr_r\0" \
"boot_ostree=run bootcmd_otenv; run bootcmd_rd_in_mmc\0" \
\
/* NRSW boot */ \
"root_part=1\0" /* from NRSW, required here? set from board.c */ \
"kernel_image=kernel.bin\0" \
"fdt_image=am335x-hw25-prod1.dtb\0" \
"add_sd_bootargs=setenv bootargs $bootargs root=/dev/${mmc_dev}p$root_part rootfstype=ext4 " \
"console=$defaultconsole,115200 rootwait loglevel=4 ti_cpsw.rx_packet_max=1526\0" \
"add_version_bootargs=setenv bootargs $bootargs\0" \
"sdbringup=echo Try bringup boot && ext4load mmc 1:$root_part $kernel_addr /boot/zImage && " \
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs rw;\0" \
"sdprod=ext4load mmc 1:$root_part $kernel_addr /boot/$kernel_image && " \
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs ro;\0" \
"sdboot=env set fdt_addr " FDT_ADDR_R "; "\
"if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
"else run sdbringup; fi; " \
/* For v4.19 kernel $mmc_dev should be "mmcblk1" (read from DT), for v3.18 kernel: "mmcblk0" */ \
"fdt addr $fdt_addr;if fdt get value mmc_dev /nm_env nm,mmc-dev;then;else setenv mmc_dev mmcblk0;fi;" \
"run add_sd_bootargs; run add_version_bootargs; " \
"bootz $kernel_addr - $fdt_addr; fi\0" \
\
/* Boot command */ \
"bootcmd=" MAIN_BOOTCMD "\0" \
\
/* Recovery boot (same for OSTree and NRSW) */ \
"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" \
/* setenv ipaddr and serverip is necessary, because dhclient destroys the IPs internally */ \
"pxe_recovery=mdio up $ethprime && dhcp && pxe get && pxe boot\0" \
"tftp_recovery=tftpboot $kernel_addr_r recovery-image; tftpboot $fdt_addr_r recovery-dtb; " \
"setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 " \
"debug $ethopts; " \
"bootz $kernel_addr_r - $fdt_addr_r\0" /* kernel_addr_r */
#endif
/* TODO: Check if ok for NRSW? */
#define CONFIG_ZERO_BOOTDELAY_CHECK
/* UART Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0: XModem Boot, Debug UART */
/* TODO: Preparation in case UART5 shall be used later */
#if 0
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1: Unused, see note below */
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2: Unused, see note below */
/* NOTE: NS16550 definitions are cumulative, need to set COM2 to have COM3 */
#define CONFIG_SYS_NS16550_COM4 0x481A6000 /* UART3: - */
#define CONFIG_SYS_NS16550_COM5 0x481A8000 /* UART4: - */
#define CONFIG_SYS_NS16550_COM6 0x481AA000 /* UART5: User UART */
#endif
#define CONFIG_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 50 /* TODO: Can this be reduced to 20ms */
/* Put Environment in eMMC */
#define CONFIG_ENV_OFFSET (512 * 128) /* @ 512*256 SPL starts */
#define CONFIG_ENV_SIZE (4 * 1024)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1
#undef CONFIG_SPL_ENV_SUPPORT
#undef CONFIG_SPL_NAND_SUPPORT
#undef CONFIG_SPL_ONENAND_SUPPORT
/* We need to disable SPI to not confuse the eeprom env driver */
#undef CONFIG_SPI
#undef CONFIG_SPI_BOOT
#undef CONFIG_SPL_OS_BOOT
#define CONFIG_SPL_YMODEM_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
#define CONFIG_SUPPORT_EMMC_BOOT
/*
* USB configuration. We enable MUSB support, both for host and for
* gadget. We set USB0 as peripheral and USB1 as host, based on the
* board schematic and physical port wired to each. Then for host we
* add mass storage support and for gadget we add both RNDIS ethernet
* and DFU.
*/
#define CONFIG_USB_MUSB_DSPS
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_USB_MUSB_PIO_ONLY
#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
#define CONFIG_AM335X_USB0
#define CONFIG_AM335X_USB0_MODE MUSB_HOST
/* To support eMMC booting */
#define CONFIG_STORAGE_EMMC
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
#ifdef CONFIG_USB_MUSB_HOST
#define CONFIG_USB_STORAGE
#endif
#ifdef CONFIG_USB_MUSB_GADGET
/* Removing USB gadget and can be enabled adter adding support usb DM */
#ifndef CONFIG_DM_ETH
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
#endif /* CONFIG_DM_ETH */
#endif /* CONFIG_USB_MUSB_GADGET */
/*
* Disable MMC DM for SPL build and can be re-enabled after adding
* DM support in SPL
*/
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_MMC
#undef CONFIG_TIMER
#endif
#if defined(CONFIG_SPL_BUILD)
/* Remove other SPL modes. */
#undef CONFIG_SPL_NAND_SUPPORT
#define CONFIG_ENV_IS_NOWHERE
#undef CONFIG_PARTITION_UUIDS
#undef CONFIG_EFI_PARTITION
#endif
/* Network. */
#define CONFIG_IP_DEFRAG /* so we can use large tftp blocks */
#define CONFIG_TFTP_TSIZE /* tftp transfer size, progress bar */
#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START 0x84000000
#define CONFIG_SYS_MEMTEST_END 0x87900000
#ifdef CONFIG_NRSW_BUILD
/* support for NM packed bootloader */
#define CONFIG_NM_BOOTLOADER_FORMAT
/* password protected login */
#define CONFIG_CRYPT
#define CONFIG_NM_LOGIN
#define CONFIG_NM_LOGIN_PART "1:3" /* TODO: Define location of file for OSTree/Yocto */
#define CONFIG_NM_LOGIN_PASSWD "/root/boot/bootpass"
#endif
#define CONFIG_CMD_PXE
#define CONFIG_OF_BOARD_SETUP
#define CONFIG_JTAG_MARKER_SPL 0x402FFF00
#define CONFIG_JTAG_MARKER_UBOOT 0x807FFF00
/* NRSW PMIC Reset Reason */
#define RESET_REASON_SHM_LOCATION 0x8e000000
/* SPL command is not needed */
#undef CONFIG_CMD_SPL
/* Never enable ISO it is broken and can lead to a crash */
#undef CONFIG_ISO_PARTITION
#endif /* ! __CONFIG_AM335X_HW25_H */

View File

@ -28,6 +28,10 @@
# define CONFIG_LZO
#endif
#define CONFIG_CMD_NB_TEST
#define CONFIG_NM_LOGIN
#define CONFIG_SYS_BOOTM_LEN (16 << 20)
#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */

View File

@ -46,7 +46,7 @@
#define CONFIG_BOOTP_MAY_FAIL
#ifndef CONFIG_SPL_BUILD
#define KERNEL_ADDR "0x8C100000"
#define KERNEL_ADDR "0x80000000"
#define LOAD_ADDR "0x83000000"
#define FDT_ADDR "0x82000000"
#define PXE_ADDR "0x82800000"
@ -59,7 +59,7 @@
"load_addr=" LOAD_ADDR "\0" \
"root_part=1\0" /* Default root partition, overwritte in board file */ \
"defaultconsole=ttyS1\0" /* Default output console */ \
"add_sd_bootargs=setenv bootargs $bootargs root=/dev/mmcblk1p$root_part rootfstype=ext4 console=$defaultconsole,115200 rootwait loglevel=4\0" \
"add_sd_bootargs=setenv bootargs $bootargs root=/dev/${mmc_dev}p$root_part rootfstype=ext4 console=$defaultconsole,115200 rootwait loglevel=4\0" \
"add_version_bootargs=setenv bootargs $bootargs\0" \
"fdt_skip_update=yes\0" \
"ethprime=cpsw\0" \
@ -70,9 +70,9 @@
"sdboot=if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
"else run sdbringup; fi; " \
"run add_sd_bootargs; run add_version_bootargs; run shieldcmd; run modifyfdtcmd; " \
"run add_version_bootargs;run shieldcmd;run modifyfdtcmd;run add_sd_bootargs;" \
"bootz $kernel_addr - $fdt_addr; fi\0" \
"bootcmd=run bootcmd_otenv; run bootcmd_rd_in_mmc\0" \
"bootcmd=run sdboot\0" \
"ipaddr=192.168.1.1\0" \
"serverip=192.168.1.254\0" \
"pxefile_addr_r=" PXE_ADDR "\0" \
@ -86,16 +86,11 @@
"autoload=false\0" \
"shieldcmd=\0" \
"fdtshieldcmd=\0" \
"modifyfdtcmd=fdt addr $fdt_addr; run fdtshieldcmd;\0" \
/* For v4.19 kernel $mmc_dev should be "mmcblk1" (read from DT), for v3.18 kernel: "mmcblk0". */ \
"modifyfdtcmd=fdt addr $fdt_addr;run fdtshieldcmd;if fdt get value mmc_dev /nm_env nm,mmc-dev;then;else setenv mmc_dev mmcblk0;fi\0" \
"tftp_recovery=tftpboot $kernel_addr recovery-image; tftpboot $fdt_addr recovery-dtb; setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 debug; run shieldcmd; run modifyfdtcmd; bootz $kernel_addr - $fdt_addr\0" \
"pxe_recovery=sleep 3 && dhcp && pxe get && pxe boot\0" \
"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" /* setenv ipaddr and serverip is necessary, because dhclient can destroy the IPs inernally */ \
"bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; " \
"setenv bootargs_prev $bootargs; " \
"env import -t $load_addr $filesize; setenv bootargs $bootargs_prev $bootargs root=/dev/ram0 console=$defaultconsole,115200 " \
"bootcmd_rd_in_mmc=ext4load mmc 1:1 $kernel_addr_r /boot$kernel_image; bootm $kernel_addr_r#conf@am335x-nrhw16-prod4.dtb\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0"
"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" /* setenv ipaddr and serverip is necessary, because dhclient can destroy the IPs inernally */
#endif

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@ -1,311 +0,0 @@
/*
* am335x_nmhw21.h
*
* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __CONFIG_AM335X_NMHW21_H
#define __CONFIG_AM335X_NMHW21_H
#include <configs/ti_am335x_common.h>
/* Disable U-Boot load from filesystems, to save around 10 kB SPL image size */
#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
# undef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
#endif
#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
#undef CONFIG_HW_WATCHDOG
#undef CONFIG_OMPAP_WATCHDOG
#undef CONFIG_SPL_WATCHDOG_SUPPORT
#ifndef CONFIG_SPL_BUILD
# define CONFIG_TIMESTAMP
# define CONFIG_LZO
#endif
#define CONFIG_SYS_BOOTM_LEN (16 << 20)
#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
#define CONFIG_BOARD_LATE_INIT
/* Clock Defines */
#define V_OSCK 0 /* 0 means detect from sysboot1 config */
#define V_SCLK (V_OSCK)
#include <config_distro_bootcmd.h>
/* Dynamic override for PHY_ANEG_TIMEOUT value */
#ifndef CONFIG_SPL_BUILD
# ifndef __ASSEMBLER__
int eth_phy_timeout(void);
# endif
#endif
#define PHY_ANEG_TIMEOUT eth_phy_timeout()
#define PHY_ANEG_DEFAULT_TIMEOUT 5000
#define CONFIG_ARP_TIMEOUT 200
#undef CONFIG_NET_RETRY_COUNT
#define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_BOOTP_MAY_FAIL
#ifndef CONFIG_SPL_BUILD
/*
* Memory map for booting Linux
*
* 0x80000000 32MB KERNEL_ADDR (kernel_addr), kernel execution address
* 0x82000000 190MB KERNEL_ADDR_R (kernel_addr_r), FIT image/kernel loading address
* kernel will be relocated kernel_addr
* for FIT images, ramdisc and dtb will be relocated to
* top of bootmemory (0x8e000000 downwards)
* 0x8BE00000 1MB FDT_ADDR_R (fdt_addr_r), device tree if separate from kernel/FIT
* 0x8BF00000 1MB PXE_ADDR (pxefile_addr_r), pxe configuration file (pxe get command)
* 0x8C000000 32MB LOAD_ADDR (load_addr), loading address for generic files
* <end of boot memory>
* 0x8E000000 4B NRSW reset reason
* 32MB <>, Free space
* 0x90000000 256MB <>, Free space, 512MB systems
* 0xA0000000 512MB <>, Free space, 1GB systems only
* 0xC0000000 End of RAM
*/
#define KERNEL_ADDR "0x80000000"
#define KERNEL_ADDR_R "0x82000000"
#define FDT_ADDR_R "0x8BE00000"
#define PXE_ADDR "0x8BF00000"
#define LOAD_ADDR "0x8C000000"
/*
* Limit boot memory to 256 MBytes to comply with kernel initial memory layout
* This is the official way to restrict image load addresses.
* Don't use xx_high_addr variables.
*/
#define BOOTM_SIZE "0x0E000000"
/* Set boot command depending of software environment */
#ifndef CONFIG_NRSW_BUILD
/* Yocto/OSTree boot command */
#define MAIN_BOOTCMD "run boot_ostree"
#else
/* NRSW boot command */
#define MAIN_BOOTCMD "run sdboot"
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
/* Memory Adresses */ \
"fdt_addr_r=" FDT_ADDR_R "\0" \
"kernel_addr=" KERNEL_ADDR "\0" /* NRSW only */ \
"kernel_addr_r=" KERNEL_ADDR_R "\0" \
"load_addr=" LOAD_ADDR "\0" \
"pxefile_addr_r=" PXE_ADDR "\0" \
"bootm_size=" BOOTM_SIZE "\0" \
\
/* Misc */ \
"defaultconsole=ttyS2\0" \
"fdt_skip_update=yes\0" \
"bootdelay=0\0" \
\
/* Networking */ \
"ethprime=cpsw\0" \
"ethopts=ti_cpsw.rx_packet_max=1526\0" \
"ipaddr=192.168.1.1\0" \
"serverip=192.168.1.254\0" \
"tftptimeout=2000\0" \
"tftptimeoutcountmax=5\0" \
"bootpretryperiod=10000\0" /* 2000 */ \
"autoload=false\0" \
\
/* OSTree boot */ \
"bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; " \
"setenv bootargs_prev $bootargs; " \
"env import -t $load_addr $filesize; setenv bootargs $bootargs_prev $bootargs root=/dev/ram0 console=$defaultconsole,115200 " \
"$ethopts rw ostree_root=/dev/mmcblk1p1\0" \
"bootcmd_rd_in_mmc=ext4load mmc 1:1 $kernel_addr_r /boot$kernel_image; " \
"bootm $kernel_addr_r\0" \
"boot_ostree=run bootcmd_otenv; run bootcmd_rd_in_mmc\0" \
\
/* NRSW boot */ \
"root_part=1\0" /* from NRSW, required here? set from board.c */ \
"kernel_image=kernel.bin\0" \
"fdt_image=am335x-nmhw21-prod1.dtb\0" \
"add_sd_bootargs=setenv bootargs $bootargs root=/dev/${mmc_dev}p$root_part rootfstype=ext4 " \
"console=$defaultconsole,115200 rootwait loglevel=4 ti_cpsw.rx_packet_max=1526\0" \
"add_version_bootargs=setenv bootargs $bootargs\0" \
"sdbringup=echo Try bringup boot && ext4load mmc 1:$root_part $kernel_addr /boot/zImage && " \
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs rw;\0" \
"sdprod=ext4load mmc 1:$root_part $kernel_addr /boot/$kernel_image && " \
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs ro;\0" \
"sdboot=env set fdt_addr " FDT_ADDR_R "; "\
"if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
"else run sdbringup; fi; " \
/* For v4.19 kernel $mmc_dev should be "mmcblk1" (read from DT), for v3.18 kernel: "mmcblk0" */ \
"fdt addr $fdt_addr;if fdt get value mmc_dev /nm_env nm,mmc-dev;then;else setenv mmc_dev mmcblk0;fi;" \
"run add_sd_bootargs; run add_version_bootargs; " \
"bootz $kernel_addr - $fdt_addr; fi\0" \
\
/* Boot command */ \
"bootcmd=" MAIN_BOOTCMD "\0" \
\
/* Recovery boot (same for OSTree and NRSW) */ \
"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" \
/* setenv ipaddr and serverip is necessary, because dhclient destroys the IPs internally */ \
"pxe_recovery=mdio up $ethprime && dhcp && pxe get && pxe boot\0" \
"tftp_recovery=tftpboot $kernel_addr_r recovery-image; tftpboot $fdt_addr_r recovery-dtb; " \
"setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 " \
"debug $ethopts; " \
"bootz $kernel_addr_r - $fdt_addr_r\0" /* kernel_addr_r */
#endif
#define CONFIG_ZERO_BOOTDELAY_CHECK
/* UART Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0: XModem Boot */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1: Unused, see note below */
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2: eMMC Boot, User UART */
/* NOTE: NS16550 definitions are cumulative, need to set COM2 to have COM3 */
#define CONFIG_SYS_NS16550_COM4 0x481A6000 /* UART3: xxx */
#define CONFIG_SYS_NS16550_COM5 0x481A8000 /* UART4: yyy */
#define CONFIG_SYS_NS16550_COM6 0x481AA000 /* UART5: zzz */
#define CONFIG_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 50 /* TODO: Can this be reduced to 20ms */
/* Put Environment in eMMC */
#define CONFIG_ENV_OFFSET (512 * 128) /* @ 512*256 SPL starts */
#define CONFIG_ENV_SIZE (4 * 1024)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1
#undef CONFIG_SPL_ENV_SUPPORT
#undef CONFIG_SPL_NAND_SUPPORT
#undef CONFIG_SPL_ONENAND_SUPPORT
/* We need to disable SPI to not confuse the eeprom env driver */
/* SPI IP Block */
#define CONFIG_OMAP3_SPI /* Already define in ti_armv7_omap.h, included by ti_am335x_common.h */
#define CONFIG_SJA1105_SPI_BUS 1 /* bus 1 = spi1 = McSPI2 */
#define CONFIG_SJA1105_SPI_CS 1 /* SJA1105 uses CS1~ */
#undef CONFIG_SPI
#undef CONFIG_SPI_BOOT
#undef CONFIG_SPL_OS_BOOT
#define CONFIG_SPL_YMODEM_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
#define CONFIG_SUPPORT_EMMC_BOOT
/*
* USB configuration. We enable MUSB support, both for host and for
* gadget. We set USB0 as peripheral and USB1 as host, based on the
* board schematic and physical port wired to each. Then for host we
* add mass storage support and for gadget we add both RNDIS ethernet
* and DFU.
*/
#define CONFIG_USB_MUSB_DSPS
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_USB_MUSB_PIO_ONLY
#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
#define CONFIG_AM335X_USB0
#define CONFIG_AM335X_USB0_MODE MUSB_HOST
/* To support eMMC booting */
#define CONFIG_STORAGE_EMMC
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
#ifdef CONFIG_USB_MUSB_HOST
#define CONFIG_USB_STORAGE
#endif
#ifdef CONFIG_USB_MUSB_GADGET
/* Removing USB gadget and can be enabled adter adding support usb DM */
#ifndef CONFIG_DM_ETH
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
#endif /* CONFIG_DM_ETH */
#endif /* CONFIG_USB_MUSB_GADGET */
/*
* Disable MMC DM for SPL build and can be re-enabled after adding
* DM support in SPL
*/
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_MMC
#undef CONFIG_TIMER
#endif
#if defined(CONFIG_SPL_BUILD)
/* Remove other SPL modes. */
#undef CONFIG_SPL_NAND_SUPPORT
#define CONFIG_ENV_IS_NOWHERE
#undef CONFIG_PARTITION_UUIDS
#undef CONFIG_EFI_PARTITION
#endif
/* Network. */
#define CONFIG_IP_DEFRAG /* so we can use large tftp blocks */
#define CONFIG_TFTP_TSIZE /* tftp transfer size, progress bar */
#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START 0x84000000
#define CONFIG_SYS_MEMTEST_END 0x87900000
#ifdef CONFIG_NRSW_BUILD
/* support for NM packed bootloader */
#define CONFIG_NM_BOOTLOADER_FORMAT
/* password protected login */
#define CONFIG_CRYPT
#define CONFIG_NM_LOGIN
#define CONFIG_NM_LOGIN_PART "1:3" /* TODO: Define location of file for OSTree/Yocto */
#define CONFIG_NM_LOGIN_PASSWD "/root/boot/bootpass"
#endif
#define CONFIG_CMD_PXE
#define CONFIG_OF_BOARD_SETUP
#define CONFIG_JTAG_MARKER_SPL 0x402FFF00
#define CONFIG_JTAG_MARKER_UBOOT 0x807FFF00
/* Reset and Start Reason */
#define RESET_REASON_SHM_LOCATION 0x8e000000
/* SPL command is not needed */
#undef CONFIG_CMD_SPL
/* Never enable ISO it is broken and can lead to a crash */
#undef CONFIG_ISO_PARTITION
#endif /* ! __CONFIG_AM335X_NMHW21_H */

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@ -1,332 +0,0 @@
/*
* am335x_nrhw20.h
*
* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __CONFIG_AM335X_NRHW20_H
#define __CONFIG_AM335X_NRHW20_H
#include <configs/ti_am335x_common.h>
/* Disable U-Boot load from filesystems, to save around 10 kB SPL image size */
#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
# undef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
#endif
#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
#undef CONFIG_HW_WATCHDOG
#undef CONFIG_OMPAP_WATCHDOG
#undef CONFIG_SPL_WATCHDOG_SUPPORT
#ifndef CONFIG_SPL_BUILD
# define CONFIG_TIMESTAMP
# define CONFIG_LZO
#endif
#define CONFIG_SYS_BOOTM_LEN (16 << 20)
#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
#define CONFIG_BOARD_LATE_INIT
/* TODO: It could be preconsole buffer is not properly working in SPL
* Observed lock ups when printing too much text.
#define CONFIG_PRE_CONSOLE_BUFFER
#define CONFIG_PRE_CON_BUF_ADDR 0x80000000
#define CONFIG_PRE_CON_BUF_SZ 64*1024
*/
/* Clock Defines */
#define V_OSCK 0 /* 0 means detect from sysboot1 config */
#define V_SCLK (V_OSCK)
#include <config_distro_bootcmd.h>
/* Dynamic override for PHY_ANEG_TIMEOUT value */
#if 0 /* TODO */
#ifndef CONFIG_SPL_BUILD
# ifndef __ASSEMBLER__
int eth_phy_timeout(void);
# endif
#endif
#define PHY_ANEG_TIMEOUT eth_phy_timeout()
#endif
#define PHY_ANEG_DEFAULT_TIMEOUT 5000
#define CONFIG_ARP_TIMEOUT 200
#undef CONFIG_NET_RETRY_COUNT
#define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_BOOTP_MAY_FAIL
#ifndef CONFIG_SPL_BUILD
/*
* Memory map for booting Linux
*
* 0x80000000 32MB KERNEL_ADDR (kernel_addr), kernel execution address
* 0x82000000 190MB KERNEL_ADDR_R (kernel_addr_r), FIT image/kernel loading address
* kernel will be relocated kernel_addr
* for FIT images, ramdisc and dtb will be relocated to
* top of bootmemory (0x8e000000 downwards)
* 0x8BE00000 1MB FDT_ADDR_R (fdt_addr_r), device tree if separate from kernel/FIT
* 0x8BF00000 1MB PXE_ADDR (pxefile_addr_r), pxe configuration file (pxe get command)
* 0x8C000000 32MB LOAD_ADDR (load_addr), loading address for generic files
* <end of boot memory>
* 0x8E000000 4B NRSW reset reason
* 32MB <>, Free space
* 0x90000000 256MB <>, Free space, 512MB systems
* 0xA0000000 512MB <>, Free space, 1GB systems only
* 0xC0000000 End of RAM
*/
#define KERNEL_ADDR "0x80000000"
#define KERNEL_ADDR_R "0x82000000"
#define FDT_ADDR_R "0x8BE00000"
#define PXE_ADDR "0x8BF00000"
#define LOAD_ADDR "0x8C000000"
/*
* Limit boot memory to 256 MBytes to comply with kernel initial memory layout
* This is the official way to restrict image load addresses.
* Don't use xx_high_addr variables.
*/
#define BOOTM_SIZE "0x0E000000"
/* Set boot command depending of software environment */
#ifndef CONFIG_NRSW_BUILD
/* Yocto/OSTree boot command */
#define MAIN_BOOTCMD "run boot_ostree"
#else
/* NRSW boot command */
#define MAIN_BOOTCMD "run sdboot"
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
/* Memory Adresses */ \
"fdt_addr_r=" FDT_ADDR_R "\0" \
"kernel_addr=" KERNEL_ADDR "\0" /* NRSW only */ \
"kernel_addr_r=" KERNEL_ADDR_R "\0" \
"load_addr=" LOAD_ADDR "\0" \
"pxefile_addr_r=" PXE_ADDR "\0" \
"bootm_size=" BOOTM_SIZE "\0" \
\
/* Misc */ \
"defaultconsole=ttyS1\0" \
"fdt_skip_update=yes\0" \
"bootdelay=0\0" \
\
/* Networking */ \
"ethprime=cpsw\0" \
"ethopts=ti_cpsw.rx_packet_max=1526\0" \
"ipaddr=192.168.1.1\0" \
"serverip=192.168.1.254\0" \
"tftptimeout=2000\0" \
"tftptimeoutcountmax=5\0" \
"bootpretryperiod=10000\0" /* 2000 */ \
"autoload=false\0" \
\
/* OSTree boot */ \
"bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; " \
"setenv bootargs_prev $bootargs; " \
"env import -t $load_addr $filesize; setenv bootargs $bootargs_prev $bootargs root=/dev/ram0 console=$defaultconsole,115200 " \
"$ethopts rw ostree_root=/dev/mmcblk1p1\0" \
"bootcmd_rd_in_mmc=ext4load mmc 1:1 $kernel_addr_r /boot$kernel_image; " \
"bootm $kernel_addr_r\0" \
"boot_ostree=run shieldcmd; run bootcmd_otenv; run bootcmd_rd_in_mmc\0" \
\
/* NRSW boot */ \
"root_part=1\0" /* from NRSW, required here? set from board.c */ \
"kernel_image=kernel.bin\0" \
"fdt_image=am335x-nmhw24-prod1.dtb\0" /* diff, openwrt-nrhw24-nb801.dtb, not relevant as it will be overwritten */ \
"add_sd_bootargs=setenv bootargs $bootargs root=/dev/${mmc_dev}p$root_part rootfstype=ext4 " \
"console=$defaultconsole,115200 rootwait loglevel=4 ti_cpsw.rx_packet_max=1526\0" \
"add_version_bootargs=setenv bootargs $bootargs\0" \
"sdbringup=echo Try bringup boot && ext4load mmc 1:$root_part $kernel_addr /boot/zImage && " \
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs rw;\0" \
"sdprod=ext4load mmc 1:$root_part $kernel_addr /boot/$kernel_image && " \
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs ro;\0" \
"sdboot=env set fdt_addr " FDT_ADDR_R "; "\
"if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
"else run sdbringup; fi; " \
/* For v4.19 kernel $mmc_dev should be "mmcblk1" (read from DT), for v3.18 kernel: "mmcblk0" */ \
"fdt addr $fdt_addr;if fdt get value mmc_dev /nm_env nm,mmc-dev;then;else setenv mmc_dev mmcblk0;fi;" \
"run add_sd_bootargs; run add_version_bootargs; run shieldcmd; " \
"bootz $kernel_addr - $fdt_addr; fi\0" \
\
/* Boot command */ \
"bootcmd=" MAIN_BOOTCMD "\0" \
\
/* Recovery boot (same for OSTree and NRSW) */ \
"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" \
/* setenv ipaddr and serverip is necessary, because dhclient destroys the IPs internally */ \
"pxe_recovery=mdio up $ethprime && dhcp && pxe get && pxe boot\0" \
"tftp_recovery=tftpboot $kernel_addr_r recovery-image; tftpboot $fdt_addr_r recovery-dtb; " \
"setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 " \
"debug $ethopts; " \
"bootz $kernel_addr_r - $fdt_addr_r\0" /* kernel_addr_r */
#endif
/* TODO: Check if ok for NRSW? */
#define CONFIG_ZERO_BOOTDELAY_CHECK
/* UART Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0: XModem Boot, Shield */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1: eMMC Boot, User UART */
/* TODO: Can the following be removed, as they shouldn't be required for bootloader */
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* Unused */
#define CONFIG_SYS_NS16550_COM4 0x481A6000 /* GNSS */
#define CONFIG_SYS_NS16550_COM5 0x481A8000 /* Unused */
#define CONFIG_SYS_NS16550_COM6 0x481AA000 /* Bluetooth */
#define CONFIG_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 50 /* TODO: Can this be reduced to 20ms */
#define CONFIG_PCA953X
#define CONFIG_SYS_I2C_PCA953X_BUS 2
#define CONFIG_SYS_I2C_PCA953X_ADDR 0x74
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x74, 16} }
#define CONFIG_CMD_PCA953X
#define CONFIG_CMD_PCA953X_INFO
/* Put Environment in eMMC */
#define CONFIG_ENV_OFFSET (512 * 128) /* @ 512*256 SPL starts */
#define CONFIG_ENV_SIZE (4 * 1024)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1
#undef CONFIG_SPL_ENV_SUPPORT
#undef CONFIG_SPL_NAND_SUPPORT
#undef CONFIG_SPL_ONENAND_SUPPORT
/* We need to disable SPI to not confuse the eeprom env driver */
#undef CONFIG_SPI
#undef CONFIG_SPI_BOOT
#undef CONFIG_SPL_OS_BOOT
#define CONFIG_SPL_YMODEM_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
#define CONFIG_SUPPORT_EMMC_BOOT
/*
* USB configuration. We enable MUSB support, both for host and for
* gadget. We set USB0 as peripheral and USB1 as host, based on the
* board schematic and physical port wired to each. Then for host we
* add mass storage support and for gadget we add both RNDIS ethernet
* and DFU.
*/
#define CONFIG_USB_MUSB_DSPS
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_USB_MUSB_PIO_ONLY
#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
#define CONFIG_AM335X_USB0
#define CONFIG_AM335X_USB0_MODE MUSB_HOST
/* To support eMMC booting */
#define CONFIG_STORAGE_EMMC
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
#ifdef CONFIG_USB_MUSB_HOST
#define CONFIG_USB_STORAGE
#endif
#ifdef CONFIG_USB_MUSB_GADGET
/* Removing USB gadget and can be enabled adter adding support usb DM */
#ifndef CONFIG_DM_ETH
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
#endif /* CONFIG_DM_ETH */
#endif /* CONFIG_USB_MUSB_GADGET */
/*
* Disable MMC DM for SPL build and can be re-enabled after adding
* DM support in SPL
*/
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_MMC
#undef CONFIG_TIMER
#endif
#if defined(CONFIG_SPL_BUILD)
/* Remove other SPL modes. */
#undef CONFIG_SPL_NAND_SUPPORT
#define CONFIG_ENV_IS_NOWHERE
#undef CONFIG_PARTITION_UUIDS
#undef CONFIG_EFI_PARTITION
#endif
/* Network. */
#define CONFIG_IP_DEFRAG /* so we can use large tftp blocks */
#define CONFIG_TFTP_TSIZE /* tftp transfer size, progress bar */
#define CONFIG_PHYLIB
/* Ethernet Switch Support */
#define CONFIG_MV88E60XX_SWITCH
#define CONFIG_MV88E60XX_PHY_PORTS 0x0F
#define CONFIG_MV88E60XX_CPU_PORT 5
#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START 0x84000000
#define CONFIG_SYS_MEMTEST_END 0x87900000
#ifdef CONFIG_NRSW_BUILD
/* support for NM packed bootloader */
#define CONFIG_NM_BOOTLOADER_FORMAT
/* password protected login */
#define CONFIG_CRYPT
#define CONFIG_NM_LOGIN
#define CONFIG_NM_LOGIN_PART "1:3" /* TODO: Define location of file for OSTree/Yocto */
#define CONFIG_NM_LOGIN_PASSWD "/root/boot/bootpass"
#endif
#define CONFIG_CMD_PXE
#define CONFIG_OF_BOARD_SETUP
#define CONFIG_JTAG_MARKER_SPL 0x402FFF00
#define CONFIG_JTAG_MARKER_UBOOT 0x807FFF00
/* NRSW PMIC Reset Reason */
#ifdef CONFIG_NRSW_BUILD
#define RESET_REASON_SHM_LOCATION 0x8e000000
#define EXTERNAL_WATCHDOG_PATTERN 0x781f9ce2
#endif
/* SPL command is not needed */
#undef CONFIG_CMD_SPL
/* Never enable ISO it is broken and can lead to a crash */
#undef CONFIG_ISO_PARTITION
#endif /* ! __CONFIG_AM335X_NRHW20_H */

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@ -1,313 +0,0 @@
/*
* am335x_nrhw24.h
*
* Copyright (C) 2018-2019 NetModule AG - http://www.netmodule.com/
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __CONFIG_AM335X_NRHW24_H
#define __CONFIG_AM335X_NRHW24_H
#include <configs/ti_am335x_common.h>
/* Disable U-Boot load from filesystems, to save around 10 kB SPL image size */
#ifdef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
# undef CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
#endif
#undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
#undef CONFIG_HW_WATCHDOG
#undef CONFIG_OMPAP_WATCHDOG
#undef CONFIG_SPL_WATCHDOG_SUPPORT
#ifndef CONFIG_SPL_BUILD
# define CONFIG_TIMESTAMP
# define CONFIG_LZO
#endif
#define CONFIG_SYS_BOOTM_LEN (16 << 20)
#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
#define CONFIG_BOARD_LATE_INIT
/* TODO: It could be preconsole buffer is not properly working in SPL
* Observed lock ups when printing too much text.
#define CONFIG_PRE_CONSOLE_BUFFER
#define CONFIG_PRE_CON_BUF_ADDR 0x80000000
#define CONFIG_PRE_CON_BUF_SZ 64*1024
*/
/* Clock Defines */
#define V_OSCK 0 /* 0 means detect from sysboot1 config */
#define V_SCLK (V_OSCK)
#include <config_distro_bootcmd.h>
/* Dynamic override for PHY_ANEG_TIMEOUT value */
#ifndef CONFIG_SPL_BUILD
# ifndef __ASSEMBLER__
int eth_phy_timeout(void);
# endif
#endif
#define PHY_ANEG_TIMEOUT eth_phy_timeout()
#define PHY_ANEG_DEFAULT_TIMEOUT 5000
#define CONFIG_ARP_TIMEOUT 200
#undef CONFIG_NET_RETRY_COUNT
#define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_BOOTP_MAY_FAIL
#ifndef CONFIG_SPL_BUILD
/*
* Memory map for booting Linux
*
* 0x80000000 32MB KERNEL_ADDR (kernel_addr), kernel execution address
* 0x82000000 190MB KERNEL_ADDR_R (kernel_addr_r), FIT image/kernel loading address
* kernel will be relocated kernel_addr
* for FIT images, ramdisc and dtb will be relocated to
* top of bootmemory (0x8e000000 downwards)
* 0x8BE00000 1MB FDT_ADDR_R (fdt_addr_r), device tree if separate from kernel/FIT
* 0x8BF00000 1MB PXE_ADDR (pxefile_addr_r), pxe configuration file (pxe get command)
* 0x8C000000 32MB LOAD_ADDR (load_addr), loading address for generic files
* <end of boot memory>
* 0x8E000000 4B NRSW reset reason
* 32MB <>, Free space
* 0x90000000 256MB <>, Free space, 512MB systems
* 0xA0000000 512MB <>, Free space, 1GB systems only
* 0xC0000000 End of RAM
*/
#define KERNEL_ADDR "0x80000000"
#define KERNEL_ADDR_R "0x82000000"
#define FDT_ADDR_R "0x8BE00000"
#define PXE_ADDR "0x8BF00000"
#define LOAD_ADDR "0x8C000000"
/*
* Limit boot memory to 256 MBytes to comply with kernel initial memory layout
* This is the official way to restrict image load addresses.
* Don't use xx_high_addr variables.
*/
#define BOOTM_SIZE "0x0E000000"
/* Set boot command depending of software environment */
#ifndef CONFIG_NRSW_BUILD
/* Yocto/OSTree boot command */
#define MAIN_BOOTCMD "run boot_ostree"
#else
/* NRSW boot command */
#define MAIN_BOOTCMD "run sdboot"
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
/* Memory Adresses */ \
"fdt_addr_r=" FDT_ADDR_R "\0" \
"kernel_addr=" KERNEL_ADDR "\0" /* NRSW only */ \
"kernel_addr_r=" KERNEL_ADDR_R "\0" \
"load_addr=" LOAD_ADDR "\0" \
"pxefile_addr_r=" PXE_ADDR "\0" \
"bootm_size=" BOOTM_SIZE "\0" \
\
/* Misc */ \
"defaultconsole=ttyS1\0" \
"fdt_skip_update=yes\0" \
"bootdelay=0\0" \
\
/* Networking */ \
"ethprime=cpsw\0" \
"ethopts=ti_cpsw.rx_packet_max=1526\0" \
"ipaddr=192.168.1.1\0" \
"serverip=192.168.1.254\0" \
"tftptimeout=2000\0" \
"tftptimeoutcountmax=5\0" \
"bootpretryperiod=10000\0" /* 2000 */ \
"autoload=false\0" \
\
/* OSTree boot */ \
"bootcmd_otenv=ext4load mmc 1:1 $load_addr /boot/loader/uEnv.txt; " \
"setenv bootargs_prev $bootargs; " \
"env import -t $load_addr $filesize; setenv bootargs $bootargs_prev $bootargs root=/dev/ram0 console=$defaultconsole,115200 " \
"$ethopts rw ostree_root=/dev/mmcblk1p1\0" \
"bootcmd_rd_in_mmc=ext4load mmc 1:1 $kernel_addr_r /boot$kernel_image; " \
"bootm $kernel_addr_r\0" \
"boot_ostree=run shieldcmd; run bootcmd_otenv; run bootcmd_rd_in_mmc\0" \
\
/* NRSW boot */ \
"root_part=1\0" /* from NRSW, required here? set from board.c */ \
"kernel_image=kernel.bin\0" \
"fdt_image=am335x-nmhw24-prod1.dtb\0" /* diff, openwrt-nrhw24-nb801.dtb, not relevant as it will be overwritten */ \
"add_sd_bootargs=setenv bootargs $bootargs root=/dev/${mmc_dev}p$root_part rootfstype=ext4 " \
"console=$defaultconsole,115200 rootwait loglevel=4 ti_cpsw.rx_packet_max=1526\0" \
"add_version_bootargs=setenv bootargs $bootargs\0" \
"sdbringup=echo Try bringup boot && ext4load mmc 1:$root_part $kernel_addr /boot/zImage && " \
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs rw;\0" \
"sdprod=ext4load mmc 1:$root_part $kernel_addr /boot/$kernel_image && " \
"ext4load mmc 1:$root_part $fdt_addr /boot/$fdt_image && setenv bootargs $bootargs ro;\0" \
"sdboot=env set fdt_addr " FDT_ADDR_R "; "\
"if mmc dev 1; then echo Copying Linux from SD to RAM...; "\
"if test -e mmc 1:$root_part /boot/$kernel_image; then run sdprod; " \
"else run sdbringup; fi; " \
/* For v4.19 kernel $mmc_dev should be "mmcblk1" (read from DT), for v3.18 kernel: "mmcblk0" */ \
"fdt addr $fdt_addr;if fdt get value mmc_dev /nm_env nm,mmc-dev;then;else setenv mmc_dev mmcblk0;fi;" \
"run add_sd_bootargs; run add_version_bootargs; run shieldcmd; " \
"bootz $kernel_addr - $fdt_addr; fi\0" \
\
/* Boot command */ \
"bootcmd=" MAIN_BOOTCMD "\0" \
\
/* Recovery boot (same for OSTree and NRSW) */ \
"recovery=run pxe_recovery || setenv ipaddr $ipaddr; setenv serverip $serverip; run tftp_recovery\0" \
/* setenv ipaddr and serverip is necessary, because dhclient destroys the IPs internally */ \
"pxe_recovery=mdio up $ethprime && dhcp && pxe get && pxe boot\0" \
"tftp_recovery=tftpboot $kernel_addr_r recovery-image; tftpboot $fdt_addr_r recovery-dtb; " \
"setenv bootargs rdinit=/etc/preinit console=$defaultconsole,115200 " \
"debug $ethopts; " \
"run shieldcmd; " \
"bootz $kernel_addr_r - $fdt_addr_r\0" /* kernel_addr_r */
#endif
/* TODO: Check if ok for NRSW? */
#define CONFIG_ZERO_BOOTDELAY_CHECK
/* UART Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0: XModem Boot, Shield */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1: Debug UART (Internal) */
#define CONFIG_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 50 /* TODO: Can this be reduced to 20ms */
/* Put Environment in eMMC */
#define CONFIG_ENV_OFFSET (512 * 128) /* @ 512*256 SPL starts */
#define CONFIG_ENV_SIZE (4 * 1024)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 1
#undef CONFIG_SPL_ENV_SUPPORT
#undef CONFIG_SPL_NAND_SUPPORT
#undef CONFIG_SPL_ONENAND_SUPPORT
/* We need to disable SPI to not confuse the eeprom env driver */
#undef CONFIG_SPI
#undef CONFIG_SPI_BOOT
#undef CONFIG_SPL_OS_BOOT
#define CONFIG_SPL_YMODEM_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
#define CONFIG_SUPPORT_EMMC_BOOT
/*
* USB configuration. We enable MUSB support, both for host and for
* gadget. We set USB0 as peripheral and USB1 as host, based on the
* board schematic and physical port wired to each. Then for host we
* add mass storage support and for gadget we add both RNDIS ethernet
* and DFU.
*/
#define CONFIG_USB_MUSB_DSPS
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_USB_MUSB_PIO_ONLY
#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT
#define CONFIG_AM335X_USB0
#define CONFIG_AM335X_USB0_MODE MUSB_HOST
/* To support eMMC booting */
#define CONFIG_STORAGE_EMMC
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
#ifdef CONFIG_USB_MUSB_HOST
#define CONFIG_USB_STORAGE
#endif
#ifdef CONFIG_USB_MUSB_GADGET
/* Removing USB gadget and can be enabled adter adding support usb DM */
#ifndef CONFIG_DM_ETH
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
#endif /* CONFIG_DM_ETH */
#endif /* CONFIG_USB_MUSB_GADGET */
/*
* Disable MMC DM for SPL build and can be re-enabled after adding
* DM support in SPL
*/
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_MMC
#undef CONFIG_TIMER
#endif
#if defined(CONFIG_SPL_BUILD)
/* Remove other SPL modes. */
#undef CONFIG_SPL_NAND_SUPPORT
#define CONFIG_ENV_IS_NOWHERE
#undef CONFIG_PARTITION_UUIDS
#undef CONFIG_EFI_PARTITION
#endif
/* Network. */
#define CONFIG_IP_DEFRAG /* so we can use large tftp blocks */
#define CONFIG_TFTP_TSIZE /* tftp transfer size, progress bar */
#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_MEMTEST_START 0x84000000
#define CONFIG_SYS_MEMTEST_END 0x87900000
#ifdef CONFIG_NRSW_BUILD
/* support for NM packed bootloader */
#define CONFIG_NM_BOOTLOADER_FORMAT
/* password protected login */
#define CONFIG_CRYPT
#define CONFIG_NM_LOGIN
#define CONFIG_NM_LOGIN_PART "1:3" /* TODO: Define location of file for OSTree/Yocto */
#define CONFIG_NM_LOGIN_PASSWD "/root/boot/bootpass"
#endif
#define CONFIG_CMD_PXE
#define CONFIG_OF_BOARD_SETUP
#define CONFIG_JTAG_MARKER_SPL 0x402FFF00
#define CONFIG_JTAG_MARKER_UBOOT 0x807FFF00
/* NRSW PMIC Reset Reason */
#ifdef CONFIG_NRSW_BUILD
#define RESET_REASON_SHM_LOCATION 0x8e000000
#define EXTERNAL_WATCHDOG_PATTERN 0x781f9ce2
#endif
/* SPL command is not needed */
#undef CONFIG_CMD_SPL
/* Never enable ISO it is broken and can lead to a crash */
#undef CONFIG_ISO_PARTITION
#endif /* ! __CONFIG_AM335X_NRHW24_H */

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@ -1,6 +0,0 @@
#ifndef _CRYPT_H
#define _CRYPT_H
extern char * sha_crypt(const char *key, const char *salt);
#endif /* _CRYPT_H */

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@ -287,10 +287,10 @@ typedef struct image_header {
} image_header_t;
typedef struct nm_header {
__be32 nm_start_tag; /* BLST (0x424c5354) */
__be32 nm_version; /* U-boot version number */
__be32 nm_length; /* U-boot image length */
uint8_t reserved[244]; /* Reserved */
__be32 nm_start_tag; /* BLST (0x424c5354) */
__be32 nm_version; /* U-boot version number */
__be32 nm_length; /* U-boot image length */
uint8_t reserved[244]; /* Reserved */
struct image_header header;
} nm_header_t;

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@ -296,7 +296,7 @@ struct ethernet_hdr {
u8 et_dest[6]; /* Destination node */
u8 et_src[6]; /* Source node */
u16 et_protlen; /* Protocol or length */
} __attribute__((packed));
};
/* Ethernet header size */
#define ETHER_HDR_SIZE (sizeof(struct ethernet_hdr))
@ -314,7 +314,7 @@ struct e802_hdr {
u8 et_snap2;
u8 et_snap3;
u16 et_prot; /* 802 protocol */
} __attribute__((packed));
};
/* 802 + SNAP + ethernet header size */
#define E802_HDR_SIZE (sizeof(struct e802_hdr))
@ -328,7 +328,7 @@ struct vlan_ethernet_hdr {
u16 vet_vlan_type; /* PROT_VLAN */
u16 vet_tag; /* TAG of VLAN */
u16 vet_type; /* protocol type */
} __attribute__((packed));
};
/* VLAN Ethernet header size */
#define VLAN_ETHER_HDR_SIZE (sizeof(struct vlan_ethernet_hdr))
@ -357,7 +357,7 @@ struct ip_hdr {
u16 ip_sum; /* checksum */
struct in_addr ip_src; /* Source IP address */
struct in_addr ip_dst; /* Destination IP address */
} __attribute__((packed));
};
#define IP_OFFS 0x1fff /* ip offset *= 8 */
#define IP_FLAGS 0xe000 /* first 3 bits */
@ -385,7 +385,7 @@ struct ip_udp_hdr {
u16 udp_dst; /* UDP destination port */
u16 udp_len; /* Length of UDP packet */
u16 udp_xsum; /* Checksum */
} __attribute__((packed));
};
#define IP_UDP_HDR_SIZE (sizeof(struct ip_udp_hdr))
#define UDP_HDR_SIZE (IP_UDP_HDR_SIZE - IP_HDR_SIZE)
@ -424,7 +424,7 @@ struct arp_hdr {
u8 ar_tha[]; /* Target hardware address */
u8 ar_tpa[]; /* Target protocol address */
#endif /* 0 */
} __attribute__((packed));
};
#define ARP_HDR_SIZE (8+20) /* Size assuming ethernet */
@ -459,7 +459,7 @@ struct icmp_hdr {
} frag;
u8 data[0];
} un;
} __attribute__((packed));
};
#define ICMP_HDR_SIZE (sizeof(struct icmp_hdr))
#define IP_ICMP_HDR_SIZE (IP_HDR_SIZE + ICMP_HDR_SIZE)

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@ -249,7 +249,6 @@ int gen10g_startup(struct phy_device *phydev);
int gen10g_shutdown(struct phy_device *phydev);
int gen10g_discover_mmds(struct phy_device *phydev);
int phy_mv88e60xx_init(void);
int phy_mv88e61xx_init(void);
int phy_aquantia_init(void);
int phy_atheros_init(void);

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@ -20,7 +20,6 @@ obj-$(CONFIG_CMD_DHRYSTONE) += dhry/
obj-$(CONFIG_AES) += aes.o
obj-$(CONFIG_USB_TTY) += circbuf.o
obj-$(CONFIG_CRYPT) += crypt.o
obj-y += crc7.o
obj-y += crc8.o
obj-y += crc16.o

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