114 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			114 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * (C) Copyright 2007-2011
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|  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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|  * Tom Cubie <tangliang@allwinnertech.com>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #include <common.h>
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| #include <asm/io.h>
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| #include <asm/arch/timer.h>
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| 
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| DECLARE_GLOBAL_DATA_PTR;
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| 
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| #define TIMER_MODE   (0x0 << 7)	/* continuous mode */
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| #define TIMER_DIV    (0x0 << 4)	/* pre scale 1 */
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| #define TIMER_SRC    (0x1 << 2)	/* osc24m */
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| #define TIMER_RELOAD (0x1 << 1)	/* reload internal value */
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| #define TIMER_EN     (0x1 << 0)	/* enable timer */
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| 
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| #define TIMER_CLOCK		(24 * 1000 * 1000)
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| #define COUNT_TO_USEC(x)	((x) / 24)
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| #define USEC_TO_COUNT(x)	((x) * 24)
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| #define TICKS_PER_HZ		(TIMER_CLOCK / CONFIG_SYS_HZ)
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| #define TICKS_TO_HZ(x)		((x) / TICKS_PER_HZ)
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| 
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| #define TIMER_LOAD_VAL		0xffffffff
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| 
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| #define TIMER_NUM		0	/* we use timer 0 */
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| 
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| /* read the 32-bit timer */
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| static ulong read_timer(void)
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| {
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| 	struct sunxi_timer_reg *timers =
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| 		(struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
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| 	struct sunxi_timer *timer = &timers->timer[TIMER_NUM];
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| 
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| 	/*
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| 	 * The hardware timer counts down, therefore we invert to
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| 	 * produce an incrementing timer.
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| 	 */
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| 	return ~readl(&timer->val);
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| }
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| 
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| /* init timer register */
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| int timer_init(void)
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| {
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| 	struct sunxi_timer_reg *timers =
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| 		(struct sunxi_timer_reg *)SUNXI_TIMER_BASE;
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| 	struct sunxi_timer *timer = &timers->timer[TIMER_NUM];
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| 	writel(TIMER_LOAD_VAL, &timer->inter);
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| 	writel(TIMER_MODE | TIMER_DIV | TIMER_SRC | TIMER_RELOAD | TIMER_EN,
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| 	       &timer->ctl);
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| 
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| 	return 0;
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| }
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| 
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| /* timer without interrupts */
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| ulong get_timer(ulong base)
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| {
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| 	return get_timer_masked() - base;
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| }
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| 
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| ulong get_timer_masked(void)
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| {
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| 	/* current tick value */
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| 	ulong now = TICKS_TO_HZ(read_timer());
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| 
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| 	if (now >= gd->arch.lastinc)	/* normal (non rollover) */
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| 		gd->arch.tbl += (now - gd->arch.lastinc);
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| 	else {
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| 		/* rollover */
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| 		gd->arch.tbl += (TICKS_TO_HZ(TIMER_LOAD_VAL)
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| 				- gd->arch.lastinc) + now;
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| 	}
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| 	gd->arch.lastinc = now;
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| 
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| 	return gd->arch.tbl;
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| }
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| 
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| /* delay x useconds */
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| void __udelay(unsigned long usec)
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| {
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| 	long tmo = USEC_TO_COUNT(usec);
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| 	ulong now, last = read_timer();
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| 
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| 	while (tmo > 0) {
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| 		now = read_timer();
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| 		if (now > last)	/* normal (non rollover) */
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| 			tmo -= now - last;
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| 		else		/* rollover */
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| 			tmo -= TIMER_LOAD_VAL - last + now;
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| 		last = now;
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| 	}
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| }
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| 
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| /*
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|  * This function is derived from PowerPC code (read timebase as long long).
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|  * On ARM it just returns the timer value.
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|  */
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| unsigned long long get_ticks(void)
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| {
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| 	return get_timer(0);
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| }
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| 
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| /*
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|  * This function is derived from PowerPC code (timebase clock frequency).
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|  * On ARM it returns the number of timer ticks per second.
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|  */
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| ulong get_tbclk(void)
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| {
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| 	return CONFIG_SYS_HZ;
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| }
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