100 lines
1.8 KiB
C
100 lines
1.8 KiB
C
/*
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* (C) Copyright 2016
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* Vikas Manocha, <vikas.manocha@st.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/armv7m.h>
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#include <asm/arch/stm32.h>
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#include <asm/arch/gpio.h>
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#include <dm/platdata.h>
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#include <dm/platform_data/serial_stm32x7.h>
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#include <asm/arch/stm32_periph.h>
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#include <asm/arch/stm32_defs.h>
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DECLARE_GLOBAL_DATA_PTR;
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const struct stm32_gpio_ctl gpio_ctl_gpout = {
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.mode = STM32_GPIO_MODE_OUT,
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.otype = STM32_GPIO_OTYPE_PP,
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.speed = STM32_GPIO_SPEED_50M,
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.pupd = STM32_GPIO_PUPD_NO,
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.af = STM32_GPIO_AF0
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};
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const struct stm32_gpio_ctl gpio_ctl_usart = {
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.mode = STM32_GPIO_MODE_AF,
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.otype = STM32_GPIO_OTYPE_PP,
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.speed = STM32_GPIO_SPEED_50M,
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.pupd = STM32_GPIO_PUPD_UP,
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.af = STM32_GPIO_AF7
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};
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static const struct stm32_gpio_dsc usart_gpio[] = {
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{STM32_GPIO_PORT_A, STM32_GPIO_PIN_9}, /* TX */
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{STM32_GPIO_PORT_B, STM32_GPIO_PIN_7}, /* RX */
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};
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int uart_setup_gpio(void)
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{
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int i;
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int rv = 0;
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clock_setup(GPIO_A_CLOCK_CFG);
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clock_setup(GPIO_B_CLOCK_CFG);
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for (i = 0; i < ARRAY_SIZE(usart_gpio); i++) {
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rv = stm32_gpio_config(&usart_gpio[i], &gpio_ctl_usart);
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if (rv)
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goto out;
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}
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out:
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return rv;
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}
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static const struct stm32x7_serial_platdata serial_platdata = {
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.base = (struct stm32_usart *)USART1_BASE,
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.clock = CONFIG_SYS_CLK_FREQ,
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};
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U_BOOT_DEVICE(stm32x7_serials) = {
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.name = "serial_stm32x7",
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.platdata = &serial_platdata,
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};
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u32 get_board_rev(void)
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{
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return 0;
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}
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int board_early_init_f(void)
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{
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int res;
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res = uart_setup_gpio();
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clock_setup(USART1_CLOCK_CFG);
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if (res)
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return res;
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return 0;
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}
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int board_init(void)
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{
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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return 0;
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}
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int dram_init(void)
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{
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gd->bd->bi_dram[0].start = CONFIG_SYS_RAM_BASE;
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gd->bd->bi_dram[0].size = CONFIG_SYS_RAM_SIZE;
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gd->ram_size = CONFIG_SYS_RAM_SIZE;
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return 0;
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}
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